WebSVN – HelenOS – Diff – /trunk/kernel/arch/amd64/src/amd64.c


/*
 * Copyright (c) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <proc/thread.h>
#include <genarch/multiboot/multiboot.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/drivers/i8042/i8042.h>
#include <genarch/kbrd/kbrd.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
#include <arch/boot/boot.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
#include <arch/bios/bios.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm volatile (
        "pushfq\n"
        "pop %%rax\n"
        "and $~(0x7000), %%rax\n"
        "pushq %%rax\n"
        "popfq\n"
        ::: "%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm volatile (
        "mov %%cr0, %%rax\n"
        "and $~(0x40000), %%rax\n"
        "mov %%rax, %%cr0\n"
        ::: "%rax"
    );
}
 
/** Perform amd64-specific initialization before main_bsp() is called.
 *
 * @param signature Should contain the multiboot signature.
 * @param mi        Pointer to the multiboot information structure.
 */
void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
{
    /* Parse multiboot information obtained from the bootloader. */
    multiboot_info_parse(signature, mi);
   
#ifdef CONFIG_SMP
    /* Copy AP bootstrap routines below 1 MB. */
    memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
        (size_t) &_hardcoded_unmapped_size);
#endif
}
 
void arch_pre_mm_init(void)
{
    /* Enable no-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
   
    /* Disable I/O on nonprivileged levels
     * clear the NT (nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        interrupt_init();
        bios_init();
       
        /* PIC */
        i8259_init();
    }
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* hard clock */
        i8254_init();
       
#ifdef CONFIG_FB
        if (vesa_present())
            vesa_init();
        else
#endif
#ifdef CONFIG_EGA
            ega_init(EGA_BASE, EGA_VIDEORAM);  /* video */
#else
            {}
#endif
       
        /* Enable debugger */
        debugger_init();
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
   
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
}
 
void arch_post_cpu_init()
{
#ifdef CONFIG_SMP
    if (config.cpu_active > 1) {
        l_apic_init();
        l_apic_debug();
    }
#endif
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
#ifdef CONFIG_SMP
        acpi_init();
#endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
#ifdef CONFIG_PC_KBD
    devno_t devno = device_assign_devno();
   
    /*
     * Initialize the i8042 controller. Then initialize the keyboard
     * module and connect it to i8042. Enable keyboard interrupts.
     */
    indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
    if (kbrdin) {
        kbrd_init(kbrdin);
 
        trap_virtual_enable_irqs(1 << IRQ_KBD);
    }
   
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    sysinfo_set_item_val("kbd.address.physical", NULL,
        (uintptr_t) I8042_BASE);
    sysinfo_set_item_val("kbd.address.kernel", NULL,
        (uintptr_t) I8042_BASE);
#endif
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
        i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in FS register. Unfortunately the 64-bit
 * part can be set only in CPL0 mode.
 *
 * The specs say, that on %fs:0 there is stored contents of %fs register,
 * we need not to go to CPL0 to read it.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    write_msr(AMD_MSR_FS, addr);
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef CONFIG_FB
    if (vesa_present())
        vesa_redraw();
    else
#endif
#ifdef CONFIG_EGA
        ega_redraw();
#else
        {}
#endif
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4057	Rev 4102
1	/*	1	/*
2	* Copyright (c) 2005 Ondrej Palkovsky	2	* Copyright (c) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38		38
39	#include <config.h>	39	#include <config.h>
40		40
41	#include <proc/thread.h>	41	#include <proc/thread.h>
42	#include <genarch/multiboot/multiboot.h>	42	#include <genarch/multiboot/multiboot.h>
43	#include <genarch/drivers/legacy/ia32/io.h>	43	#include <genarch/drivers/legacy/ia32/io.h>
44	#include <genarch/drivers/ega/ega.h>	44	#include <genarch/drivers/ega/ega.h>
45	#include <arch/drivers/vesa.h>	45	#include <arch/drivers/vesa.h>
46	#include <genarch/drivers/i8042/i8042.h>	46	#include <genarch/drivers/i8042/i8042.h>
47	#include <genarch/kbrd/kbrd.h>	47	#include <genarch/kbrd/kbrd.h>
48	#include <arch/drivers/i8254.h>	48	#include <arch/drivers/i8254.h>
49	#include <arch/drivers/i8259.h>	49	#include <arch/drivers/i8259.h>
50	#include <arch/boot/boot.h>	50	#include <arch/boot/boot.h>
51		51
52	#ifdef CONFIG_SMP	52	#ifdef CONFIG_SMP
53	#include <arch/smp/apic.h>	53	#include <arch/smp/apic.h>
54	#endif	54	#endif
55		55
56	#include <arch/bios/bios.h>	56	#include <arch/bios/bios.h>
57	#include <arch/cpu.h>	57	#include <arch/cpu.h>
58	#include <print.h>	58	#include <print.h>
59	#include <arch/cpuid.h>	59	#include <arch/cpuid.h>
60	#include <genarch/acpi/acpi.h>	60	#include <genarch/acpi/acpi.h>
61	#include <panic.h>	61	#include <panic.h>
62	#include <interrupt.h>	62	#include <interrupt.h>
63	#include <arch/syscall.h>	63	#include <arch/syscall.h>
64	#include <arch/debugger.h>	64	#include <arch/debugger.h>
65	#include <syscall/syscall.h>	65	#include <syscall/syscall.h>
66	#include <console/console.h>	66	#include <console/console.h>
67	#include <ddi/irq.h>	67	#include <ddi/irq.h>
68	#include <ddi/device.h>	68	#include <ddi/device.h>
69	#include <sysinfo/sysinfo.h>	69	#include <sysinfo/sysinfo.h>
70		70
71	/** Disable I/O on non-privileged levels	71	/** Disable I/O on non-privileged levels
72	*	72	*
73	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	73	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
74	*/	74	*/
75	static void clean_IOPL_NT_flags(void)	75	static void clean_IOPL_NT_flags(void)
76	{	76	{
77	asm volatile (	77	asm volatile (
78	"pushfq\n"	78	"pushfq\n"
79	"pop %%rax\n"	79	"pop %%rax\n"
80	"and $~(0x7000), %%rax\n"	80	"and $~(0x7000), %%rax\n"
81	"pushq %%rax\n"	81	"pushq %%rax\n"
82	"popfq\n"	82	"popfq\n"
83	::: "%rax"	83	::: "%rax"
84	);	84	);
85	}	85	}
86		86
87	/** Disable alignment check	87	/** Disable alignment check
88	*	88	*
89	* Clean AM(18) flag in CR0 register	89	* Clean AM(18) flag in CR0 register
90	*/	90	*/
91	static void clean_AM_flag(void)	91	static void clean_AM_flag(void)
92	{	92	{
93	asm volatile (	93	asm volatile (
94	"mov %%cr0, %%rax\n"	94	"mov %%cr0, %%rax\n"
95	"and $~(0x40000), %%rax\n"	95	"and $~(0x40000), %%rax\n"
96	"mov %%rax, %%cr0\n"	96	"mov %%rax, %%cr0\n"
97	::: "%rax"	97	::: "%rax"
98	);	98	);
99	}	99	}
100		100
101	/** Perform amd64-specific initialization before main_bsp() is called.	101	/** Perform amd64-specific initialization before main_bsp() is called.
102	*	102	*
103	* @param signature Should contain the multiboot signature.	103	* @param signature Should contain the multiboot signature.
104	* @param mi Pointer to the multiboot information structure.	104	* @param mi Pointer to the multiboot information structure.
105	*/	105	*/
106	void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)	106	void arch_pre_main(uint32_t signature, const multiboot_info_t *mi)
107	{	107	{
108	/* Parse multiboot information obtained from the bootloader. */	108	/* Parse multiboot information obtained from the bootloader. */
109	multiboot_info_parse(signature, mi);	109	multiboot_info_parse(signature, mi);
110		110
111	#ifdef CONFIG_SMP	111	#ifdef CONFIG_SMP
112	/* Copy AP bootstrap routines below 1 MB. */	112	/* Copy AP bootstrap routines below 1 MB. */
113	memcpy((void ) AP_BOOT_OFFSET, (void ) BOOT_OFFSET,	113	memcpy((void ) AP_BOOT_OFFSET, (void ) BOOT_OFFSET,
114	(size_t) &_hardcoded_unmapped_size);	114	(size_t) &_hardcoded_unmapped_size);
115	#endif	115	#endif
116	}	116	}
117		117
118	void arch_pre_mm_init(void)	118	void arch_pre_mm_init(void)
119	{	119	{
120	/* Enable no-execute pages */	120	/* Enable no-execute pages */
121	set_efer_flag(AMD_NXE_FLAG);	121	set_efer_flag(AMD_NXE_FLAG);
122	/* Enable FPU */	122	/* Enable FPU */
123	cpu_setup_fpu();	123	cpu_setup_fpu();
124		124
125	/* Initialize segmentation */	125	/* Initialize segmentation */
126	pm_init();	126	pm_init();
127		127
128	/* Disable I/O on nonprivileged levels	128	/* Disable I/O on nonprivileged levels
129	* clear the NT (nested-thread) flag	129	* clear the NT (nested-thread) flag
130	*/	130	*/
131	clean_IOPL_NT_flags();	131	clean_IOPL_NT_flags();
132	/* Disable alignment check */	132	/* Disable alignment check */
133	clean_AM_flag();	133	clean_AM_flag();
134		134
135	if (config.cpu_active == 1) {	135	if (config.cpu_active == 1) {
136	interrupt_init();	136	interrupt_init();
137	bios_init();	137	bios_init();
138		138
139	/* PIC */	139	/* PIC */
140	i8259_init();	140	i8259_init();
141	}	141	}
142	}	142	}
143		143
144		144
145	void arch_post_mm_init(void)	145	void arch_post_mm_init(void)
146	{	146	{
147	if (config.cpu_active == 1) {	147	if (config.cpu_active == 1) {
148	/* Initialize IRQ routing */	148	/* Initialize IRQ routing */
149	irq_init(IRQ_COUNT, IRQ_COUNT);	149	irq_init(IRQ_COUNT, IRQ_COUNT);
150		150
151	/* hard clock */	151	/* hard clock */
152	i8254_init();	152	i8254_init();
153		153
154	#ifdef CONFIG_FB	154	#ifdef CONFIG_FB
155	if (vesa_present())	155	if (vesa_present())
156	vesa_init();	156	vesa_init();
157	else	157	else
158	#endif	158	#endif
159	#ifdef CONFIG_EGA	159	#ifdef CONFIG_EGA
160	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */	160	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
161	#else	161	#else
162	{}	162	{}
163	#endif	163	#endif
164		164
165	/* Enable debugger */	165	/* Enable debugger */
166	debugger_init();	166	debugger_init();
167	/* Merge all memory zones to 1 big zone */	167	/* Merge all memory zones to 1 big zone */
168	zone_merge_all();	168	zone_merge_all();
169	}	169	}
170		170
171	/* Setup fast SYSCALL/SYSRET */	171	/* Setup fast SYSCALL/SYSRET */
172	syscall_setup_cpu();	172	syscall_setup_cpu();
173	}	173	}
174		174
175	void arch_post_cpu_init()	175	void arch_post_cpu_init()
176	{	176	{
177	#ifdef CONFIG_SMP	177	#ifdef CONFIG_SMP
178	if (config.cpu_active > 1) {	178	if (config.cpu_active > 1) {
179	l_apic_init();	179	l_apic_init();
180	l_apic_debug();	180	l_apic_debug();
181	}	181	}
182	#endif	182	#endif
183	}	183	}
184		184
185	void arch_pre_smp_init(void)	185	void arch_pre_smp_init(void)
186	{	186	{
187	if (config.cpu_active == 1) {	187	if (config.cpu_active == 1) {
188	#ifdef CONFIG_SMP	188	#ifdef CONFIG_SMP
189	acpi_init();	189	acpi_init();
190	#endif /* CONFIG_SMP */	190	#endif /* CONFIG_SMP */
191	}	191	}
192	}	192	}
193		193
194	void arch_post_smp_init(void)	194	void arch_post_smp_init(void)
195	{	195	{
-		196	#ifdef CONFIG_PC_KBD
196	devno_t devno = device_assign_devno();	197	devno_t devno = device_assign_devno();
197		198
198	/*	199	/*
199	* Initialize the keyboard module and conect it to stdin. Then	200	* Initialize the i8042 controller. Then initialize the keyboard
200	* initialize the i8042 controller and connect it to kbrdin. Enable	201	* module and connect it to i8042. Enable keyboard interrupts.
-		202	*/
201	* keyboard interrupts.	203	indev_t kbrdin = i8042_init((i8042_t ) I8042_BASE, devno, IRQ_KBD);
202	*/	204	if (kbrdin) {
203	kbrd_init(stdin);	205	kbrd_init(kbrdin);
204	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD, &kbrdin);	-
205	trap_virtual_enable_irqs(1 << IRQ_KBD);	206	trap_virtual_enable_irqs(1 << IRQ_KBD);
-		207	}
206		208
207	/*	209	/*
208	* This is the necessary evil until the userspace driver is entirely	210	* This is the necessary evil until the userspace driver is entirely
209	* self-sufficient.	211	* self-sufficient.
210	*/	212	*/
211	sysinfo_set_item_val("kbd", NULL, true);	213	sysinfo_set_item_val("kbd", NULL, true);
212	sysinfo_set_item_val("kbd.devno", NULL, devno);	214	sysinfo_set_item_val("kbd.devno", NULL, devno);
213	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);	215	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
214	sysinfo_set_item_val("kbd.address.physical", NULL,	216	sysinfo_set_item_val("kbd.address.physical", NULL,
215	(uintptr_t) I8042_BASE);	217	(uintptr_t) I8042_BASE);
216	sysinfo_set_item_val("kbd.address.kernel", NULL,	218	sysinfo_set_item_val("kbd.address.kernel", NULL,
217	(uintptr_t) I8042_BASE);	219	(uintptr_t) I8042_BASE);
-		220	#endif
218	}	221	}
219		222
220	void calibrate_delay_loop(void)	223	void calibrate_delay_loop(void)
221	{	224	{
222	i8254_calibrate_delay_loop();	225	i8254_calibrate_delay_loop();
223	if (config.cpu_active == 1) {	226	if (config.cpu_active == 1) {
224	/*	227	/*
225	* This has to be done only on UP.	228	* This has to be done only on UP.
226	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	229	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
227	*/	230	*/
228	i8254_normal_operation();	231	i8254_normal_operation();
229	}	232	}
230	}	233	}
231		234
232	/** Set thread-local-storage pointer	235	/** Set thread-local-storage pointer
233	*	236	*
234	* TLS pointer is set in FS register. Unfortunately the 64-bit	237	* TLS pointer is set in FS register. Unfortunately the 64-bit
235	* part can be set only in CPL0 mode.	238	* part can be set only in CPL0 mode.
236	*	239	*
237	* The specs say, that on %fs:0 there is stored contents of %fs register,	240	* The specs say, that on %fs:0 there is stored contents of %fs register,
238	* we need not to go to CPL0 to read it.	241	* we need not to go to CPL0 to read it.
239	*/	242	*/
240	unative_t sys_tls_set(unative_t addr)	243	unative_t sys_tls_set(unative_t addr)
241	{	244	{
242	THREAD->arch.tls = addr;	245	THREAD->arch.tls = addr;
243	write_msr(AMD_MSR_FS, addr);	246	write_msr(AMD_MSR_FS, addr);
244	return 0;	247	return 0;
245	}	248	}
246		249
247	/** Acquire console back for kernel	250	/** Acquire console back for kernel
248	*	251	*
249	*/	252	*/
250	void arch_grab_console(void)	253	void arch_grab_console(void)
251	{	254	{
252	#ifdef CONFIG_FB	255	#ifdef CONFIG_FB
-		256	if (vesa_present())
253	vesa_redraw();	257	vesa_redraw();
-		258	else
-		259	#endif
-		260	#ifdef CONFIG_EGA
-		261	ega_redraw();
254	#else	262	#else
255	ega_redraw();	263	{}
256	#endif	264	#endif
257	}	265	}
258		266
259	/** Return console to userspace	267	/** Return console to userspace
260	*	268	*
261	*/	269	*/
262	void arch_release_console(void)	270	void arch_release_console(void)
263	{	271	{
264	}	272	}
265		273
266	/** Construct function pointer	274	/** Construct function pointer
267	*	275	*
268	* @param fptr function pointer structure	276	* @param fptr function pointer structure
269	* @param addr function address	277	* @param addr function address
270	* @param caller calling function address	278	* @param caller calling function address
271	*	279	*
272	* @return address of the function pointer	280	* @return address of the function pointer
273	*	281	*
274	*/	282	*/
275	void arch_construct_function(fncptr_t fptr, void addr, void caller)	283	void arch_construct_function(fncptr_t fptr, void addr, void caller)
276	{	284	{
277	return addr;	285	return addr;
278	}	286	}
279		287
280	/** @}	288	/** @}
281	*/	289	*/
282		290

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(root)/trunk/kernel/arch/amd64/src/amd64.c @ 2106 – Rev 4057 → 4102