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/*
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/*
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 * Copyright (c) 2005 Ondrej Palkovsky
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 * Copyright (c) 2005 Ondrej Palkovsky
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
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 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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28
 
29
/** @addtogroup amd64mm
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/** @addtogroup amd64mm
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 * @{
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 * @{
31
 */
31
 */
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/** @file
32
/** @file
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 */
33
 */
34
 
34
 
35
/** Paging on AMD64
35
/** Paging on AMD64
36
 *
36
 *
37
 * The space is divided in positive numbers - userspace and
37
 * The space is divided in positive numbers - userspace and
38
 * negative numbers - kernel space. The 'negative' space starting
38
 * negative numbers - kernel space. The 'negative' space starting
39
 * with 0xffff800000000000 and ending with 0xffffffff80000000
39
 * with 0xffff800000000000 and ending with 0xffffffff80000000
40
 * (-2GB) is identically mapped physical memory. The area
40
 * (-2GB) is identically mapped physical memory. The area
41
 * (0xffffffff80000000 ... 0xffffffffffffffff is again identically
41
 * (0xffffffff80000000 ... 0xffffffffffffffff is again identically
42
 * mapped first 2GB.
42
 * mapped first 2GB.
43
 *
43
 *
44
 * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel
44
 * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel
45
 */
45
 */
46
 
46
 
47
#ifndef KERN_amd64_PAGE_H_
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#ifndef KERN_amd64_PAGE_H_
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#define KERN_amd64_PAGE_H_
48
#define KERN_amd64_PAGE_H_
49
 
49
 
50
#include <arch/mm/frame.h>
50
#include <arch/mm/frame.h>
51
 
51
 
52
#define PAGE_WIDTH  FRAME_WIDTH
52
#define PAGE_WIDTH  FRAME_WIDTH
53
#define PAGE_SIZE   FRAME_SIZE
53
#define PAGE_SIZE   FRAME_SIZE
54
 
54
 
55
#define PAGE_COLOR_BITS 0           /* dummy */
55
#define PAGE_COLOR_BITS 0           /* dummy */
56
 
56
 
57
#ifdef KERNEL
57
#ifdef KERNEL
58
 
58
 
59
#ifndef __ASM__
59
#ifndef __ASM__
60
#  include <mm/page.h>
60
#   include <mm/mm.h>
61
#  include <arch/types.h>
61
#   include <arch/types.h>
62
#endif
62
#   include <arch/interrupt.h>
63
 
63
 
64
#ifndef __ASM__
-
 
65
static inline uintptr_t ka2pa(uintptr_t x)
64
static inline uintptr_t ka2pa(uintptr_t x)
66
{
65
{
67
    if (x > 0xffffffff80000000)
66
    if (x > 0xffffffff80000000)
68
        return x - 0xffffffff80000000;
67
        return x - 0xffffffff80000000;
69
    else
68
    else
70
        return x - 0xffff800000000000;
69
        return x - 0xffff800000000000;
71
}
70
}
-
 
71
 
72
# define KA2PA(x)      ka2pa((uintptr_t)x)
72
#   define KA2PA(x)      ka2pa((uintptr_t)x)
73
# define PA2KA_CODE(x)      (((uintptr_t) (x)) + 0xffffffff80000000)
73
#   define PA2KA_CODE(x)      (((uintptr_t) (x)) + 0xffffffff80000000)
74
# define PA2KA(x)      (((uintptr_t) (x)) + 0xffff800000000000)
74
#   define PA2KA(x)      (((uintptr_t) (x)) + 0xffff800000000000)
75
#else
75
#else
76
# define KA2PA(x)      ((x) - 0xffffffff80000000)
76
#   define KA2PA(x)      ((x) - 0xffffffff80000000)
77
# define PA2KA(x)      ((x) + 0xffffffff80000000)
77
#   define PA2KA(x)      ((x) + 0xffffffff80000000)
78
#endif
78
#endif
79
 
79
 
80
#define PTL0_ENTRIES_ARCH   512
80
#define PTL0_ENTRIES_ARCH   512
81
#define PTL1_ENTRIES_ARCH   512
81
#define PTL1_ENTRIES_ARCH   512
82
#define PTL2_ENTRIES_ARCH   512
82
#define PTL2_ENTRIES_ARCH   512
83
#define PTL3_ENTRIES_ARCH   512
83
#define PTL3_ENTRIES_ARCH   512
84
 
84
 
85
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>39)&0x1ff)
85
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>39)&0x1ff)
86
#define PTL1_INDEX_ARCH(vaddr)  (((vaddr)>>30)&0x1ff)
86
#define PTL1_INDEX_ARCH(vaddr)  (((vaddr)>>30)&0x1ff)
87
#define PTL2_INDEX_ARCH(vaddr)  (((vaddr)>>21)&0x1ff)
87
#define PTL2_INDEX_ARCH(vaddr)  (((vaddr)>>21)&0x1ff)
88
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x1ff)
88
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x1ff)
89
 
89
 
90
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 )))
90
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 )))
91
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 )))
91
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 )))
92
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 )))
92
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 )))
93
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t *) ((((uint64_t) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 )))
93
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t *) ((((uint64_t) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 )))
94
 
94
 
95
#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((uintptr_t) (ptl0)))
95
#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((uintptr_t) (ptl0)))
96
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   set_pt_addr((pte_t *)(ptl0), (index_t)(i), a)
96
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   set_pt_addr((pte_t *)(ptl0), (index_t)(i), a)
97
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)       set_pt_addr((pte_t *)(ptl1), (index_t)(i), a)
97
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)       set_pt_addr((pte_t *)(ptl1), (index_t)(i), a)
98
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)       set_pt_addr((pte_t *)(ptl2), (index_t)(i), a)
98
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)       set_pt_addr((pte_t *)(ptl2), (index_t)(i), a)
99
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  set_pt_addr((pte_t *)(ptl3), (index_t)(i), a)
99
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  set_pt_addr((pte_t *)(ptl3), (index_t)(i), a)
100
 
100
 
101
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
101
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
102
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        get_pt_flags((pte_t *)(ptl1), (index_t)(i))
102
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        get_pt_flags((pte_t *)(ptl1), (index_t)(i))
103
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        get_pt_flags((pte_t *)(ptl2), (index_t)(i))
103
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        get_pt_flags((pte_t *)(ptl2), (index_t)(i))
104
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
104
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
105
 
105
 
106
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
106
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
107
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)         set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x))
107
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)         set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x))
108
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)         set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x))
108
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)         set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x))
109
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
109
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
110
 
110
 
111
#define PTE_VALID_ARCH(p)           (*((uint64_t *) (p)) != 0)
111
#define PTE_VALID_ARCH(p)           (*((uint64_t *) (p)) != 0)
112
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
112
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
113
#define PTE_GET_FRAME_ARCH(p)           ((((uintptr_t)(p)->addr_12_31)<<12) | ((uintptr_t)(p)->addr_32_51<<32))
113
#define PTE_GET_FRAME_ARCH(p)           ((((uintptr_t)(p)->addr_12_31)<<12) | ((uintptr_t)(p)->addr_32_51<<32))
114
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
114
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
115
#define PTE_EXECUTABLE_ARCH(p)          ((p)->no_execute == 0)
115
#define PTE_EXECUTABLE_ARCH(p)          ((p)->no_execute == 0)
116
 
116
 
117
#ifndef __ASM__
117
#ifndef __ASM__
118
 
118
 
119
/* Page fault error codes. */
119
/* Page fault error codes. */
120
 
120
 
121
/** When bit on this position is 0, the page fault was caused by a not-present page. */
121
/** When bit on this position is 0, the page fault was caused by a not-present page. */
122
#define PFERR_CODE_P            (1<<0)  
122
#define PFERR_CODE_P            (1<<0)  
123
 
123
 
124
/** When bit on this position is 1, the page fault was caused by a write. */
124
/** When bit on this position is 1, the page fault was caused by a write. */
125
#define PFERR_CODE_RW           (1<<1)
125
#define PFERR_CODE_RW           (1<<1)
126
 
126
 
127
/** When bit on this position is 1, the page fault was caused in user mode. */
127
/** When bit on this position is 1, the page fault was caused in user mode. */
128
#define PFERR_CODE_US           (1<<2)
128
#define PFERR_CODE_US           (1<<2)
129
 
129
 
130
/** When bit on this position is 1, a reserved bit was set in page directory. */
130
/** When bit on this position is 1, a reserved bit was set in page directory. */
131
#define PFERR_CODE_RSVD         (1<<3)
131
#define PFERR_CODE_RSVD         (1<<3)
132
 
132
 
133
/** When bit on this position os 1, the page fault was caused during instruction fecth. */
133
/** When bit on this position os 1, the page fault was caused during instruction fecth. */
134
#define PFERR_CODE_ID       (1<<4)
134
#define PFERR_CODE_ID       (1<<4)
135
 
135
 
136
/** Page Table Entry. */
-
 
137
struct page_specifier {
-
 
138
    unsigned present : 1;
-
 
139
    unsigned writeable : 1;
-
 
140
    unsigned uaccessible : 1;
-
 
141
    unsigned page_write_through : 1;
-
 
142
    unsigned page_cache_disable : 1;
-
 
143
    unsigned accessed : 1;
-
 
144
    unsigned dirty : 1;
-
 
145
    unsigned unused: 1;
-
 
146
    unsigned global : 1;
-
 
147
    unsigned soft_valid : 1;        /**< Valid content even if present bit is cleared. */
-
 
148
    unsigned avl : 2;
-
 
149
    unsigned addr_12_31 : 30;
-
 
150
    unsigned addr_32_51 : 21;
-
 
151
    unsigned no_execute : 1;
-
 
152
} __attribute__ ((packed));
-
 
153
 
-
 
154
static inline int get_pt_flags(pte_t *pt, index_t i)
136
static inline int get_pt_flags(pte_t *pt, index_t i)
155
{
137
{
156
    pte_t *p = &pt[i];
138
    pte_t *p = &pt[i];
157
   
139
   
158
    return (
140
    return (
159
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
141
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
160
        (!p->present)<<PAGE_PRESENT_SHIFT |
142
        (!p->present)<<PAGE_PRESENT_SHIFT |
161
        p->uaccessible<<PAGE_USER_SHIFT |
143
        p->uaccessible<<PAGE_USER_SHIFT |
162
        1<<PAGE_READ_SHIFT |
144
        1<<PAGE_READ_SHIFT |
163
        p->writeable<<PAGE_WRITE_SHIFT |
145
        p->writeable<<PAGE_WRITE_SHIFT |
164
        (!p->no_execute)<<PAGE_EXEC_SHIFT |
146
        (!p->no_execute)<<PAGE_EXEC_SHIFT |
165
        p->global<<PAGE_GLOBAL_SHIFT
147
        p->global<<PAGE_GLOBAL_SHIFT
166
    );
148
    );
167
}
149
}
168
 
150
 
169
static inline void set_pt_addr(pte_t *pt, index_t i, uintptr_t a)
151
static inline void set_pt_addr(pte_t *pt, index_t i, uintptr_t a)
170
{
152
{
171
    pte_t *p = &pt[i];
153
    pte_t *p = &pt[i];
172
 
154
 
173
    p->addr_12_31 = (a >> 12) & 0xfffff;
155
    p->addr_12_31 = (a >> 12) & 0xfffff;
174
    p->addr_32_51 = a >> 32;
156
    p->addr_32_51 = a >> 32;
175
}
157
}
176
 
158
 
177
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
159
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
178
{
160
{
179
    pte_t *p = &pt[i];
161
    pte_t *p = &pt[i];
180
   
162
   
181
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
163
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
182
    p->present = !(flags & PAGE_NOT_PRESENT);
164
    p->present = !(flags & PAGE_NOT_PRESENT);
183
    p->uaccessible = (flags & PAGE_USER) != 0;
165
    p->uaccessible = (flags & PAGE_USER) != 0;
184
    p->writeable = (flags & PAGE_WRITE) != 0;
166
    p->writeable = (flags & PAGE_WRITE) != 0;
185
    p->no_execute = (flags & PAGE_EXEC) == 0;
167
    p->no_execute = (flags & PAGE_EXEC) == 0;
186
    p->global = (flags & PAGE_GLOBAL) != 0;
168
    p->global = (flags & PAGE_GLOBAL) != 0;
187
   
169
   
188
    /*
170
    /*
189
     * Ensure that there is at least one bit set even if the present bit is cleared.
171
     * Ensure that there is at least one bit set even if the present bit is cleared.
190
     */
172
     */
191
    p->soft_valid = 1;
173
    p->soft_valid = 1;
192
}
174
}
193
 
175
 
194
extern void page_arch_init(void);
176
extern void page_arch_init(void);
195
extern void page_fault(int n, istate_t *istate);
177
extern void page_fault(int n, istate_t *istate);
196
 
178
 
197
#endif /* __ASM__ */
179
#endif /* __ASM__ */
198
 
180
 
199
#endif /* KERNEL */
181
#endif /* KERNEL */
200
 
182
 
201
#endif
183
#endif
202
 
184
 
203
/** @}
185
/** @}
204
 */
186
 */
205
 
187