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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** Paging on AMD64 |
29 | /** Paging on AMD64 |
30 | * |
30 | * |
31 | * The space is divided in positive numbers - userspace and |
31 | * The space is divided in positive numbers - userspace and |
32 | * negative numbers - kernel space. The 'negative' space starting |
32 | * negative numbers - kernel space. The 'negative' space starting |
33 | * with 0xffff800000000000 and ending with 0xffffffff80000000 |
33 | * with 0xffff800000000000 and ending with 0xffffffff80000000 |
34 | * (-2GB) is identically mapped physical memory. The area |
34 | * (-2GB) is identically mapped physical memory. The area |
35 | * (0xffffffff80000000 ... 0xffffffffffffffff is again identically |
35 | * (0xffffffff80000000 ... 0xffffffffffffffff is again identically |
36 | * mapped first 2GB. |
36 | * mapped first 2GB. |
37 | * |
37 | * |
38 | * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel |
38 | * ATTENTION - PA2KA(KA2PA(x)) != x if 'x' is in kernel |
39 | */ |
39 | */ |
40 | 40 | ||
41 | #ifndef __amd64_PAGE_H__ |
41 | #ifndef __amd64_PAGE_H__ |
42 | #define __amd64_PAGE_H__ |
42 | #define __amd64_PAGE_H__ |
43 | 43 | ||
44 | #include <arch/mm/frame.h> |
44 | #include <arch/mm/frame.h> |
45 | 45 | ||
46 | #define PAGE_WIDTH FRAME_WIDTH |
46 | #define PAGE_WIDTH FRAME_WIDTH |
47 | #define PAGE_SIZE FRAME_SIZE |
47 | #define PAGE_SIZE FRAME_SIZE |
48 | 48 | ||
49 | #ifdef KERNEL |
49 | #ifdef KERNEL |
50 | 50 | ||
51 | #ifndef __ASM__ |
51 | #ifndef __ASM__ |
52 | # include <mm/page.h> |
52 | # include <mm/page.h> |
53 | # include <arch/types.h> |
53 | # include <arch/types.h> |
54 | #endif |
54 | #endif |
55 | 55 | ||
56 | #ifndef __ASM__ |
56 | #ifndef __ASM__ |
57 | static inline __address ka2pa(__address x) |
57 | static inline __address ka2pa(__address x) |
58 | { |
58 | { |
59 | if (x > 0xffffffff80000000) |
59 | if (x > 0xffffffff80000000) |
60 | return x - 0xffffffff80000000; |
60 | return x - 0xffffffff80000000; |
61 | else |
61 | else |
62 | return x - 0xffff800000000000; |
62 | return x - 0xffff800000000000; |
63 | } |
63 | } |
64 | # define KA2PA(x) ka2pa((__address)x) |
64 | # define KA2PA(x) ka2pa((__address)x) |
65 | # define PA2KA_CODE(x) (((__address) (x)) + 0xffffffff80000000) |
65 | # define PA2KA_CODE(x) (((__address) (x)) + 0xffffffff80000000) |
66 | # define PA2KA(x) (((__address) (x)) + 0xffff800000000000) |
66 | # define PA2KA(x) (((__address) (x)) + 0xffff800000000000) |
67 | #else |
67 | #else |
68 | # define KA2PA(x) ((x) - 0xffffffff80000000) |
68 | # define KA2PA(x) ((x) - 0xffffffff80000000) |
69 | # define PA2KA(x) ((x) + 0xffffffff80000000) |
69 | # define PA2KA(x) ((x) + 0xffffffff80000000) |
70 | #endif |
70 | #endif |
71 | 71 | ||
72 | #define PTL0_ENTRIES_ARCH 512 |
72 | #define PTL0_ENTRIES_ARCH 512 |
73 | #define PTL1_ENTRIES_ARCH 512 |
73 | #define PTL1_ENTRIES_ARCH 512 |
74 | #define PTL2_ENTRIES_ARCH 512 |
74 | #define PTL2_ENTRIES_ARCH 512 |
75 | #define PTL3_ENTRIES_ARCH 512 |
75 | #define PTL3_ENTRIES_ARCH 512 |
76 | 76 | ||
77 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr)>>39)&0x1ff) |
77 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr)>>39)&0x1ff) |
78 | #define PTL1_INDEX_ARCH(vaddr) (((vaddr)>>30)&0x1ff) |
78 | #define PTL1_INDEX_ARCH(vaddr) (((vaddr)>>30)&0x1ff) |
79 | #define PTL2_INDEX_ARCH(vaddr) (((vaddr)>>21)&0x1ff) |
79 | #define PTL2_INDEX_ARCH(vaddr) (((vaddr)>>21)&0x1ff) |
80 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>12)&0x1ff) |
80 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>12)&0x1ff) |
81 | 81 | ||
82 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 ))) |
82 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 ))) |
83 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 ))) |
83 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 ))) |
84 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 ))) |
84 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) ((((__u64) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 ))) |
85 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((__address *) ((((__u64) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 ))) |
85 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((__address *) ((((__u64) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((__u64) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 ))) |
86 | 86 | ||
87 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((__address) (ptl0))) |
87 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((__address) (ptl0))) |
88 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) set_pt_addr((pte_t *)(ptl0), (index_t)(i), a) |
88 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) set_pt_addr((pte_t *)(ptl0), (index_t)(i), a) |
89 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) set_pt_addr((pte_t *)(ptl1), (index_t)(i), a) |
89 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) set_pt_addr((pte_t *)(ptl1), (index_t)(i), a) |
90 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) set_pt_addr((pte_t *)(ptl2), (index_t)(i), a) |
90 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) set_pt_addr((pte_t *)(ptl2), (index_t)(i), a) |
91 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) set_pt_addr((pte_t *)(ptl3), (index_t)(i), a) |
91 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) set_pt_addr((pte_t *)(ptl3), (index_t)(i), a) |
92 | 92 | ||
93 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
93 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
94 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) get_pt_flags((pte_t *)(ptl1), (index_t)(i)) |
94 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) get_pt_flags((pte_t *)(ptl1), (index_t)(i)) |
95 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) get_pt_flags((pte_t *)(ptl2), (index_t)(i)) |
95 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) get_pt_flags((pte_t *)(ptl2), (index_t)(i)) |
96 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
96 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
97 | 97 | ||
98 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
98 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
99 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x)) |
99 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x)) |
100 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x)) |
100 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x)) |
101 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
101 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
102 | 102 | ||
103 | #define PTE_VALID_ARCH(p) (*((__u64 *) (p)) != 0) |
103 | #define PTE_VALID_ARCH(p) (*((__u64 *) (p)) != 0) |
104 | #define PTE_PRESENT_ARCH(p) ((p)->present != 0) |
104 | #define PTE_PRESENT_ARCH(p) ((p)->present != 0) |
105 | #define PTE_GET_FRAME_ARCH(p) ((((__address)(p)->addr_12_31)<<12) | ((__address)(p)->addr_32_51<<32)) |
105 | #define PTE_GET_FRAME_ARCH(p) ((((__address)(p)->addr_12_31)<<12) | ((__address)(p)->addr_32_51<<32)) |
106 | 106 | ||
107 | #ifndef __ASM__ |
107 | #ifndef __ASM__ |
108 | 108 | ||
- | 109 | /* Page fault error codes. */ |
|
- | 110 | ||
- | 111 | /** When bit on this position is 0, the page fault was caused by a not-present page. */ |
|
- | 112 | #define PFERR_CODE_P (1<<0) |
|
- | 113 | ||
- | 114 | /** When bit on this position is 1, the page fault was caused by a write. */ |
|
- | 115 | #define PFERR_CODE_RW (1<<1) |
|
- | 116 | ||
- | 117 | /** When bit on this position is 1, the page fault was caused in user mode. */ |
|
- | 118 | #define PFERR_CODE_US (1<<2) |
|
- | 119 | ||
- | 120 | /** When bit on this position is 1, a reserved bit was set in page directory. */ |
|
- | 121 | #define PFERR_CODE_RSVD (1<<3) |
|
- | 122 | ||
- | 123 | /** When bit on this position os 1, the page fault was caused during instruction fecth. */ |
|
- | 124 | #define PFERR_CODE_ID (1<<4) |
|
- | 125 | ||
109 | /** Page Table Entry. */ |
126 | /** Page Table Entry. */ |
110 | struct page_specifier { |
127 | struct page_specifier { |
111 | unsigned present : 1; |
128 | unsigned present : 1; |
112 | unsigned writeable : 1; |
129 | unsigned writeable : 1; |
113 | unsigned uaccessible : 1; |
130 | unsigned uaccessible : 1; |
114 | unsigned page_write_through : 1; |
131 | unsigned page_write_through : 1; |
115 | unsigned page_cache_disable : 1; |
132 | unsigned page_cache_disable : 1; |
116 | unsigned accessed : 1; |
133 | unsigned accessed : 1; |
117 | unsigned dirty : 1; |
134 | unsigned dirty : 1; |
118 | unsigned unused: 1; |
135 | unsigned unused: 1; |
119 | unsigned global : 1; |
136 | unsigned global : 1; |
120 | unsigned soft_valid : 1; /**< Valid content even if present bit is cleared. */ |
137 | unsigned soft_valid : 1; /**< Valid content even if present bit is cleared. */ |
121 | unsigned avl : 2; |
138 | unsigned avl : 2; |
122 | unsigned addr_12_31 : 30; |
139 | unsigned addr_12_31 : 30; |
123 | unsigned addr_32_51 : 21; |
140 | unsigned addr_32_51 : 21; |
124 | unsigned no_execute : 1; |
141 | unsigned no_execute : 1; |
125 | } __attribute__ ((packed)); |
142 | } __attribute__ ((packed)); |
126 | 143 | ||
127 | static inline int get_pt_flags(pte_t *pt, index_t i) |
144 | static inline int get_pt_flags(pte_t *pt, index_t i) |
128 | { |
145 | { |
129 | pte_t *p = &pt[i]; |
146 | pte_t *p = &pt[i]; |
130 | 147 | ||
131 | return ( |
148 | return ( |
132 | (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT | |
149 | (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT | |
133 | (!p->present)<<PAGE_PRESENT_SHIFT | |
150 | (!p->present)<<PAGE_PRESENT_SHIFT | |
134 | p->uaccessible<<PAGE_USER_SHIFT | |
151 | p->uaccessible<<PAGE_USER_SHIFT | |
135 | 1<<PAGE_READ_SHIFT | |
152 | 1<<PAGE_READ_SHIFT | |
136 | p->writeable<<PAGE_WRITE_SHIFT | |
153 | p->writeable<<PAGE_WRITE_SHIFT | |
137 | (!p->no_execute)<<PAGE_EXEC_SHIFT | |
154 | (!p->no_execute)<<PAGE_EXEC_SHIFT | |
138 | p->global<<PAGE_GLOBAL_SHIFT |
155 | p->global<<PAGE_GLOBAL_SHIFT |
139 | ); |
156 | ); |
140 | } |
157 | } |
141 | 158 | ||
142 | static inline void set_pt_addr(pte_t *pt, index_t i, __address a) |
159 | static inline void set_pt_addr(pte_t *pt, index_t i, __address a) |
143 | { |
160 | { |
144 | pte_t *p = &pt[i]; |
161 | pte_t *p = &pt[i]; |
145 | 162 | ||
146 | p->addr_12_31 = (a >> 12) & 0xfffff; |
163 | p->addr_12_31 = (a >> 12) & 0xfffff; |
147 | p->addr_32_51 = a >> 32; |
164 | p->addr_32_51 = a >> 32; |
148 | } |
165 | } |
149 | 166 | ||
150 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
167 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
151 | { |
168 | { |
152 | pte_t *p = &pt[i]; |
169 | pte_t *p = &pt[i]; |
153 | 170 | ||
154 | p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
171 | p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
155 | p->present = !(flags & PAGE_NOT_PRESENT); |
172 | p->present = !(flags & PAGE_NOT_PRESENT); |
156 | p->uaccessible = (flags & PAGE_USER) != 0; |
173 | p->uaccessible = (flags & PAGE_USER) != 0; |
157 | p->writeable = (flags & PAGE_WRITE) != 0; |
174 | p->writeable = (flags & PAGE_WRITE) != 0; |
158 | p->no_execute = (flags & PAGE_EXEC) == 0; |
175 | p->no_execute = (flags & PAGE_EXEC) == 0; |
159 | p->global = (flags & PAGE_GLOBAL) != 0; |
176 | p->global = (flags & PAGE_GLOBAL) != 0; |
160 | 177 | ||
161 | /* |
178 | /* |
162 | * Ensure that there is at least one bit set even if the present bit is cleared. |
179 | * Ensure that there is at least one bit set even if the present bit is cleared. |
163 | */ |
180 | */ |
164 | p->soft_valid = 1; |
181 | p->soft_valid = 1; |
165 | } |
182 | } |
166 | 183 | ||
167 | extern void page_arch_init(void); |
184 | extern void page_arch_init(void); |
168 | 185 | ||
169 | #endif /* __ASM__ */ |
186 | #endif /* __ASM__ */ |
170 | 187 | ||
171 | #endif /* KERNEL */ |
188 | #endif /* KERNEL */ |
172 | 189 | ||
173 | #endif |
190 | #endif |
174 | 191 |