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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup amd64 |
29 | /** @addtogroup amd64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_amd64_CPU_H_ |
35 | #ifndef KERN_amd64_CPU_H_ |
36 | #define KERN_amd64_CPU_H_ |
36 | #define KERN_amd64_CPU_H_ |
37 | 37 | ||
38 | #define RFLAGS_IF (1 << 9) |
38 | #define RFLAGS_IF (1 << 9) |
39 | #define RFLAGS_RF (1 << 16) |
39 | #define RFLAGS_RF (1 << 16) |
40 | 40 | ||
41 | #define EFER_MSR_NUM 0xc0000080 |
41 | #define EFER_MSR_NUM 0xc0000080 |
42 | #define AMD_SCE_FLAG 0 |
42 | #define AMD_SCE_FLAG 0 |
43 | #define AMD_LME_FLAG 8 |
43 | #define AMD_LME_FLAG 8 |
44 | #define AMD_LMA_FLAG 10 |
44 | #define AMD_LMA_FLAG 10 |
45 | #define AMD_FFXSR_FLAG 14 |
45 | #define AMD_FFXSR_FLAG 14 |
46 | #define AMD_NXE_FLAG 11 |
46 | #define AMD_NXE_FLAG 11 |
47 | 47 | ||
48 | /* MSR registers */ |
48 | /* MSR registers */ |
49 | #define AMD_MSR_STAR 0xc0000081 |
49 | #define AMD_MSR_STAR 0xc0000081 |
50 | #define AMD_MSR_LSTAR 0xc0000082 |
50 | #define AMD_MSR_LSTAR 0xc0000082 |
51 | #define AMD_MSR_SFMASK 0xc0000084 |
51 | #define AMD_MSR_SFMASK 0xc0000084 |
52 | #define AMD_MSR_FS 0xc0000100 |
52 | #define AMD_MSR_FS 0xc0000100 |
53 | #define AMD_MSR_GS 0xc0000101 |
53 | #define AMD_MSR_GS 0xc0000101 |
54 | 54 | ||
55 | #ifndef __ASM__ |
55 | #ifndef __ASM__ |
56 | 56 | ||
57 | #include <typedefs.h> |
- | |
58 | #include <arch/pm.h> |
57 | #include <arch/pm.h> |
59 | 58 | ||
60 | typedef struct { |
59 | typedef struct { |
61 | int vendor; |
60 | int vendor; |
62 | int family; |
61 | int family; |
63 | int model; |
62 | int model; |
64 | int stepping; |
63 | int stepping; |
65 | struct tss *tss; |
64 | struct tss *tss; |
66 | 65 | ||
67 | count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ |
66 | count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */ |
68 | } cpu_arch_t; |
67 | } cpu_arch_t; |
69 | 68 | ||
70 | struct star_msr { |
69 | struct star_msr { |
71 | 70 | ||
72 | }; |
71 | }; |
73 | 72 | ||
74 | struct lstar_msr { |
73 | struct lstar_msr { |
75 | 74 | ||
76 | }; |
75 | }; |
77 | 76 | ||
78 | extern void set_efer_flag(int flag); |
77 | extern void set_efer_flag(int flag); |
79 | extern uint64_t read_efer_flag(void); |
78 | extern uint64_t read_efer_flag(void); |
80 | void cpu_setup_fpu(void); |
79 | void cpu_setup_fpu(void); |
81 | 80 | ||
82 | #endif /* __ASM__ */ |
81 | #endif /* __ASM__ */ |
83 | 82 | ||
84 | #endif |
83 | #endif |
85 | 84 | ||
86 | /** @} |
85 | /** @} |
87 | */ |
86 | */ |
88 | 87 |