WebSVN – HelenOS – Diff – /trunk/boot/arch/ppc32/loader/asm.S


#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r7 = real_mode (pa)
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
 
 
 
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
 
 
 
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
			
 
 
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
 
 
	# initially fill segment registers
	
	li r31, 0
	
	li r29, 8
	mtctr r29
	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
 
	seg_fill_uspace:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_uspace
	
	li r29, 8
	mtctr r29
	lis r30, 0x4000               # priviledged access only
	ori r30, r30, 8               # ASID 0 (VSIDs 8 .. 15)
	
	seg_fill_kernel:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_kernel
	
	# invalidate block address translation registers
	
 
 
	li r30, 0
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create empty Page Hash Table
	# on top of memory, size 64 KB
	
 
 
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r30, 65536@h
	ori r30, r30, 65536@l         # r30 = 65536
	
	subi r29, r30, 1              # r29 = 65535
	
	sub r31, r31, r30
	andc r31, r31, r29            # pht = ALIGN_DOWN(memory_size - 65536, 65536)
	
	mtsdr1 r31
	
	li r29, 2
	srw r30, r30, r29             # r30 = 16384
	li r29, 0
	
	pht_clear:
		
		# write zeroes
		
		stw r29, 0(r31)
		
		addi r31, r31, 4
		subi r30, r30, 4
		
		cmpwi r30, 0
		beq clear_end
		
		bdnz pht_clear
 
 
		
	clear_end:
	
#ifdef CONFIG_BAT
	
	# create BAT identity mapping
	
 
 
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r29, 0x0002
	cmpw r31, r29
	blt no_bat                    # less than 128 KB -> no BAT
	
	li r29, 18
	srw r31, r31, r29             # r31 = total >> 18
	
	# create Block Length mask by replicating
	# the leading logical one 14 times
	
	li r29, 14
	mtctr r31
	li r29, 1
	
	bat_mask:
		srw r30, r31, r29         # r30 = mask >> 1
		or r31, r31, r30          # mask = mask | r30
		
		bdnz bat_mask
	
 
 
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
	
	li r29, 2
	slw r31, r31, r29             # mask = mask << 2
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
	
	lis r29, 0x8000
	or r29, r29, r31
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r29
	mtspr ibat0l, r30
	
	mtspr dbat0u, r29
	mtspr dbat0l, r30
	
	no_bat:
 
 
	
#endif
	
	tlbia
	tlbsync
	
 
 
	# start the kernel
	#
	# pc = KERNEL_START_ADDR
	# r3 = bootinfo (pa)
	# sprg0 = KA2PA(KERNEL_START_ADDR)
	# sprg3 = physical memory size
	# sp = 0 (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	subis r31, r31, 0x8000
	mtsprg0 r31
	
	lwz r31, 0(r3)
	mtsprg3 r31
	
	li sp, 0
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
 
 
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 2071	Rev 3824
1	#	1	#
2	# Copyright (c) 2006 Martin Decky	2	# Copyright (c) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31	#include "debug.inc"	-
32		31
33	.text	32	.text
34		33
35	.global halt	34	.global halt
36	.global memcpy	35	.global memcpy
37	.global jump_to_kernel	36	.global jump_to_kernel
38		37
39	halt:	38	halt:
40	b halt	39	b halt
41		40
42	memcpy:	41	memcpy:
43	srwi. r7, r5, 3	42	srwi. r7, r5, 3
44	addi r6, r3, -4	43	addi r6, r3, -4
45	addi r4, r4, -4	44	addi r4, r4, -4
46	beq 2f	45	beq 2f
47		46
48	andi. r0, r6, 3	47	andi. r0, r6, 3
49	mtctr r7	48	mtctr r7
50	bne 5f	49	bne 5f
51		50
52	1:	51	1:
53		52
54	lwz r7, 4(r4)	53	lwz r7, 4(r4)
55	lwzu r8, 8(r4)	54	lwzu r8, 8(r4)
56	stw r7, 4(r6)	55	stw r7, 4(r6)
57	stwu r8, 8(r6)	56	stwu r8, 8(r6)
58	bdnz 1b	57	bdnz 1b
59		58
60	andi. r5, r5, 7	59	andi. r5, r5, 7
61		60
62	2:	61	2:
63		62
64	cmplwi 0, r5, 4	63	cmplwi 0, r5, 4
65	blt 3f	64	blt 3f
66		65
67	lwzu r0, 4(r4)	66	lwzu r0, 4(r4)
68	addi r5, r5, -4	67	addi r5, r5, -4
69	stwu r0, 4(r6)	68	stwu r0, 4(r6)
70		69
71	3:	70	3:
72		71
73	cmpwi 0, r5, 0	72	cmpwi 0, r5, 0
74	beqlr	73	beqlr
75	mtctr r5	74	mtctr r5
76	addi r4, r4, 3	75	addi r4, r4, 3
77	addi r6, r6, 3	76	addi r6, r6, 3
78		77
79	4:	78	4:
80		79
81	lbzu r0, 1(r4)	80	lbzu r0, 1(r4)
82	stbu r0, 1(r6)	81	stbu r0, 1(r6)
83	bdnz 4b	82	bdnz 4b
84	blr	83	blr
85		84
86	5:	85	5:
87		86
88	subfic r0, r0, 4	87	subfic r0, r0, 4
89	mtctr r0	88	mtctr r0
90		89
91	6:	90	6:
92		91
93	lbz r7, 4(r4)	92	lbz r7, 4(r4)
94	addi r4, r4, 1	93	addi r4, r4, 1
95	stb r7, 4(r6)	94	stb r7, 4(r6)
96	addi r6, r6, 1	95	addi r6, r6, 1
97	bdnz 6b	96	bdnz 6b
98	subf r5, r0, r5	97	subf r5, r0, r5
99	rlwinm. r7, r5, 32-3, 3, 31	98	rlwinm. r7, r5, 32-3, 3, 31
100	beq 2b	99	beq 2b
101	mtctr r7	100	mtctr r7
102	b 1b	101	b 1b
103		102
104		103
105	jump_to_kernel:	104	jump_to_kernel:
106		105
107	# r3 = bootinfo (pa)	106	# r3 = bootinfo (pa)
108	# r4 = bootinfo_size	107	# r4 = bootinfo_size
109	# r5 = trans (pa)	108	# r5 = trans (pa)
110	# r6 = bytes to copy	109	# r6 = bytes to copy
111	# r7 = real_mode (pa)	110	# r7 = real_mode (pa)
112	# r8 = framebuffer (pa)	111	# r8 = framebuffer (pa)
113	# r9 = scanline	112	# r9 = scanline
114		113
115	# disable interrupts	114	# disable interrupts
116		115
117	mfmsr r31	116	mfmsr r31
118	rlwinm r31, r31, 0, 17, 15	117	rlwinm r31, r31, 0, 17, 15
119	mtmsr r31	118	mtmsr r31
120		119
121	# set real_mode meeting point address	120	# set real_mode meeting point address
122		121
123	mtspr srr0, r7	122	mtspr srr0, r7
124		123
125	# jumps to real_mode	124	# jumps to real_mode
126		125
127	mfmsr r31	126	mfmsr r31
128	lis r30, ~0@h	127	lis r30, ~0@h
129	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l	128	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l
130	and r31, r31, r30	129	and r31, r31, r30
131	mtspr srr1, r31	130	mtspr srr1, r31
132		131
133	sync	132	sync
134	isync	133	isync
135	rfi	134	rfi
136		135
137	.section REALMODE, "ax"	136	.section REALMODE, "ax"
138	.align PAGE_WIDTH	137	.align PAGE_WIDTH
139	.global real_mode	138	.global real_mode
140		139
141	real_mode:	140	real_mode:
142		141
143	DEBUG_INIT	-
144	DEBUG_real_mode	-
145		-
146	# copy kernel to proper location	142	# copy kernel to proper location
147	#	143	#
148	# r5 = trans (pa)	144	# r5 = trans (pa)
149	# r6 = bytes to copy	145	# r6 = bytes to copy
150	# r8 = framebuffer (pa)	146	# r8 = framebuffer (pa)
151	# r9 = scanline	147	# r9 = scanline
152		148
153	li r31, PAGE_SIZE >> 2	149	li r31, PAGE_SIZE >> 2
154	li r30, 0	150	li r30, 0
155		151
156	page_copy:	152	page_copy:
157		153
158	cmpwi r6, 0	154	cmpwi r6, 0
159	beq copy_end	155	beq copy_end
160		156
161	# copy page	157	# copy page
162		158
163	mtctr r31	159	mtctr r31
164	lwz r29, 0(r5)	160	lwz r29, 0(r5)
165		161
166	DEBUG_INIT	-
167	DEBUG_copy_loop	-
168		-
169	copy_loop:	162	copy_loop:
170		163
171	lwz r28, 0(r29)	164	lwz r28, 0(r29)
172	stw r28, 0(r30)	165	stw r28, 0(r30)
173		166
174	addi r29, r29, 4	167	addi r29, r29, 4
175	addi r30, r30, 4	168	addi r30, r30, 4
176	subi r6, r6, 4	169	subi r6, r6, 4
177		170
178	cmpwi r6, 0	171	cmpwi r6, 0
179	beq copy_end	172	beq copy_end
180		173
181	bdnz copy_loop	174	bdnz copy_loop
182		175
183	DEBUG_end_copy_loop	-
184		-
185	addi r5, r5, 4	176	addi r5, r5, 4
186	b page_copy	177	b page_copy
187		178
188	copy_end:	179	copy_end:
189		180
190	DEBUG_segments	-
191		-
192	# initially fill segment registers	181	# initially fill segment registers
193		182
194	li r31, 0	183	li r31, 0
195		184
196	li r29, 8	185	li r29, 8
197	mtctr r29	186	mtctr r29
198	li r30, 0 # ASID 0 (VSIDs 0 .. 7)	187	li r30, 0 # ASID 0 (VSIDs 0 .. 7)
199		188
200	seg_fill_uspace:	189	seg_fill_uspace:
201		190
202	mtsrin r30, r31	191	mtsrin r30, r31
203	addi r30, r30, 1	192	addi r30, r30, 1
204	addis r31, r31, 0x1000 # move to next SR	193	addis r31, r31, 0x1000 # move to next SR
205		194
206	bdnz seg_fill_uspace	195	bdnz seg_fill_uspace
207		196
208	li r29, 8	197	li r29, 8
209	mtctr r29	198	mtctr r29
210	lis r30, 0x4000 # priviledged access only	199	lis r30, 0x4000 # priviledged access only
211	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)	200	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
212		201
213	seg_fill_kernel:	202	seg_fill_kernel:
214		203
215	mtsrin r30, r31	204	mtsrin r30, r31
216	addi r30, r30, 1	205	addi r30, r30, 1
217	addis r31, r31, 0x1000 # move to next SR	206	addis r31, r31, 0x1000 # move to next SR
218		207
219	bdnz seg_fill_kernel	208	bdnz seg_fill_kernel
220		209
221	# invalidate block address translation registers	210	# invalidate block address translation registers
222		211
223	DEBUG_bat	-
224		-
225	li r30, 0	212	li r30, 0
226		213
227	mtspr ibat0u, r30	214	mtspr ibat0u, r30
228	mtspr ibat0l, r30	215	mtspr ibat0l, r30
229		216
230	mtspr ibat1u, r30	217	mtspr ibat1u, r30
231	mtspr ibat1l, r30	218	mtspr ibat1l, r30
232		219
233	mtspr ibat2u, r30	220	mtspr ibat2u, r30
234	mtspr ibat2l, r30	221	mtspr ibat2l, r30
235		222
236	mtspr ibat3u, r30	223	mtspr ibat3u, r30
237	mtspr ibat3l, r30	224	mtspr ibat3l, r30
238		225
239	mtspr dbat0u, r30	226	mtspr dbat0u, r30
240	mtspr dbat0l, r30	227	mtspr dbat0l, r30
241		228
242	mtspr dbat1u, r30	229	mtspr dbat1u, r30
243	mtspr dbat1l, r30	230	mtspr dbat1l, r30
244		231
245	mtspr dbat2u, r30	232	mtspr dbat2u, r30
246	mtspr dbat2l, r30	233	mtspr dbat2l, r30
247		234
248	mtspr dbat3u, r30	235	mtspr dbat3u, r30
249	mtspr dbat3l, r30	236	mtspr dbat3l, r30
250		237
251	# create empty Page Hash Table	238	# create empty Page Hash Table
252	# on top of memory, size 64 KB	239	# on top of memory, size 64 KB
253		240
254	DEBUG_pht	-
255		-
256	lwz r31, 0(r3) # r31 = memory size	241	lwz r31, 0(r3) # r31 = memory size
257		242
258	lis r30, 65536@h	243	lis r30, 65536@h
259	ori r30, r30, 65536@l # r30 = 65536	244	ori r30, r30, 65536@l # r30 = 65536
260		245
261	subi r29, r30, 1 # r29 = 65535	246	subi r29, r30, 1 # r29 = 65535
262		247
263	sub r31, r31, r30	248	sub r31, r31, r30
264	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)	249	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
265		250
266	mtsdr1 r31	251	mtsdr1 r31
267		252
268	li r29, 2	253	li r29, 2
269	srw r30, r30, r29 # r30 = 16384	254	srw r30, r30, r29 # r30 = 16384
270	li r29, 0	255	li r29, 0
271		256
272	pht_clear:	257	pht_clear:
273		258
274	# write zeroes	259	# write zeroes
275		260
276	stw r29, 0(r31)	261	stw r29, 0(r31)
277		262
278	addi r31, r31, 4	263	addi r31, r31, 4
279	subi r30, r30, 4	264	subi r30, r30, 4
280		265
281	cmpwi r30, 0	266	cmpwi r30, 0
282	beq clear_end	267	beq clear_end
283		268
284	bdnz pht_clear	269	bdnz pht_clear
285		-
286	DEBUG_end_pht_clear	-
287		270
288	clear_end:	271	clear_end:
289		272
290	#ifdef CONFIG_BAT	273	#ifdef CONFIG_BAT
291		274
292	# create BAT identity mapping	275	# create BAT identity mapping
293		276
294	DEBUG_mapping	-
295		-
296	lwz r31, 0(r3) # r31 = memory size	277	lwz r31, 0(r3) # r31 = memory size
297		278
298	lis r29, 0x0002	279	lis r29, 0x0002
299	cmpw r31, r29	280	cmpw r31, r29
300	blt no_bat # less than 128 KB -> no BAT	281	blt no_bat # less than 128 KB -> no BAT
301		282
302	li r29, 18	283	li r29, 18
303	srw r31, r31, r29 # r31 = total >> 18	284	srw r31, r31, r29 # r31 = total >> 18
304		285
305	# create Block Length mask by replicating	286	# create Block Length mask by replicating
306	# the leading logical one 14 times	287	# the leading logical one 14 times
307		288
308	li r29, 14	289	li r29, 14
309	mtctr r31	290	mtctr r31
310	li r29, 1	291	li r29, 1
311		292
312	bat_mask:	293	bat_mask:
313	srw r30, r31, r29 # r30 = mask >> 1	294	srw r30, r31, r29 # r30 = mask >> 1
314	or r31, r31, r30 # mask = mask \| r30	295	or r31, r31, r30 # mask = mask \| r30
315		296
316	bdnz bat_mask	297	bdnz bat_mask
317		298
318	DEBUG_bat_mask	-
319		-
320	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)	299	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
321		300
322	li r29, 2	301	li r29, 2
323	slw r31, r31, r29 # mask = mask << 2	302	slw r31, r31, r29 # mask = mask << 2
324	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)	303	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)
325		304
326	lis r29, 0x8000	305	lis r29, 0x8000
327	or r29, r29, r31	306	or r29, r29, r31
328		307
329	lis r30, 0x0000	308	lis r30, 0x0000
330	ori r30, r30, 0x0002	309	ori r30, r30, 0x0002
331		310
332	mtspr ibat0u, r29	311	mtspr ibat0u, r29
333	mtspr ibat0l, r30	312	mtspr ibat0l, r30
334		313
335	mtspr dbat0u, r29	314	mtspr dbat0u, r29
336	mtspr dbat0l, r30	315	mtspr dbat0l, r30
337		316
338	no_bat:	317	no_bat:
339		-
340	#endif	-
341		318
342	DEBUG_tlb	319	#endif
343		320
344	tlbia	321	tlbia
345	tlbsync	322	tlbsync
346		323
347	DEBUG_prepare	-
348		-
349	# start the kernel	324	# start the kernel
350	#	325	#
351	# pc = KERNEL_START_ADDR	326	# pc = KERNEL_START_ADDR
352	# r3 = bootinfo (pa)	327	# r3 = bootinfo (pa)
353	# sprg0 = KA2PA(KERNEL_START_ADDR)	328	# sprg0 = KA2PA(KERNEL_START_ADDR)
354	# sprg3 = physical memory size	329	# sprg3 = physical memory size
355	# sp = 0 (pa)	330	# sp = 0 (pa)
356		331
357	lis r31, KERNEL_START_ADDR@ha	332	lis r31, KERNEL_START_ADDR@ha
358	addi r31, r31, KERNEL_START_ADDR@l	333	addi r31, r31, KERNEL_START_ADDR@l
359		334
360	mtspr srr0, r31	335	mtspr srr0, r31
361		336
362	subis r31, r31, 0x8000	337	subis r31, r31, 0x8000
363	mtsprg0 r31	338	mtsprg0 r31
364		339
365	lwz r31, 0(r3)	340	lwz r31, 0(r3)
366	mtsprg3 r31	341	mtsprg3 r31
367		342
368	li sp, 0	343	li sp, 0
369		344
370	mfmsr r31	345	mfmsr r31
371	ori r31, r31, (msr_ir \| msr_dr)@l	346	ori r31, r31, (msr_ir \| msr_dr)@l
372	mtspr srr1, r31	347	mtspr srr1, r31
373		348
374	sync	349	sync
375	isync	350	isync
376		-
377	DEBUG_rfi	-
378	rfi	351	rfi
379		352
380	.align PAGE_WIDTH	353	.align PAGE_WIDTH
381	.global trans	354	.global trans
382	trans:	355	trans:
383	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	356	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
384		357

Subversion Repositories HelenOS

(root)/trunk/boot/arch/ppc32/loader/asm.S @ 2071 – Rev 2071 → 3824