Subversion Repositories HelenOS

Rev

Rev 4195 | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 4195 Rev 4687
1
/*
1
/*
2
 * Copyright (c) 2001-2004 Jakub Jermar
2
 * Copyright (c) 2001-2004 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia32
29
/** @addtogroup ia32
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#ifndef KERN_ia32_CPUID_H_
35
#ifndef KERN_ia32_CPUID_H_
36
#define KERN_ia32_CPUID_H_
36
#define KERN_ia32_CPUID_H_
37
 
37
 
38
#define INTEL_CPUID_LEVEL     0x00000000
38
#define INTEL_CPUID_LEVEL     0x00000000
39
#define INTEL_CPUID_STANDARD  0x00000001
39
#define INTEL_CPUID_STANDARD  0x00000001
40
#define INTEL_PSE             3
40
#define INTEL_PSE             3
41
#define INTEL_SEP             11
41
#define INTEL_SEP             11
42
 
42
 
43
#ifndef __ASM__
43
#ifndef __ASM__
44
 
44
 
45
#include <arch/types.h>
45
#include <arch/types.h>
46
 
46
 
47
typedef struct {
47
typedef struct {
48
    uint32_t cpuid_eax;
48
    uint32_t cpuid_eax;
49
    uint32_t cpuid_ebx;
49
    uint32_t cpuid_ebx;
50
    uint32_t cpuid_ecx;
50
    uint32_t cpuid_ecx;
51
    uint32_t cpuid_edx;
51
    uint32_t cpuid_edx;
52
} __attribute__ ((packed)) cpu_info_t;
52
} __attribute__ ((packed)) cpu_info_t;
53
 
53
 
54
struct __cpuid_extended_feature_info {
54
struct __cpuid_extended_feature_info {
55
    unsigned sse3 :  1;
55
    unsigned sse3 :  1;
56
    unsigned      : 31;
56
    unsigned      : 31;
57
} __attribute__ ((packed));
57
} __attribute__ ((packed));
58
 
58
 
59
typedef union cpuid_extended_feature_info {
59
typedef union cpuid_extended_feature_info {
60
    struct __cpuid_extended_feature_info bits;
60
    struct __cpuid_extended_feature_info bits;
61
    uint32_t word;
61
    uint32_t word;
62
} cpuid_extended_feature_info;
62
} cpuid_extended_feature_info;
63
 
63
 
64
struct __cpuid_feature_info {
64
struct __cpuid_feature_info {
65
    unsigned            : 23;
65
    unsigned            : 23;
66
    unsigned mmx  :  1;
66
    unsigned mmx  :  1;
67
    unsigned fxsr :  1;
67
    unsigned fxsr :  1;
68
    unsigned sse  :  1;
68
    unsigned sse  :  1;
69
    unsigned sse2 :  1;
69
    unsigned sse2 :  1;
70
    unsigned      :  5;
70
    unsigned      :  5;
71
} __attribute__ ((packed));
71
} __attribute__ ((packed));
72
 
72
 
73
typedef union cpuid_feature_info {
73
typedef union cpuid_feature_info {
74
    struct __cpuid_feature_info bits;
74
    struct __cpuid_feature_info bits;
75
    uint32_t word;
75
    uint32_t word;
76
} cpuid_feature_info;
76
} cpuid_feature_info;
77
 
77
 
78
 
78
 
79
static inline uint32_t has_cpuid(void)
79
static inline uint32_t has_cpuid(void)
80
{
80
{
81
    uint32_t val, ret;
81
    uint32_t val, ret;
82
   
82
   
83
    asm volatile (
83
    asm volatile (
84
        "pushf\n"                    /* read flags */
84
        "pushf\n"                    /* read flags */
85
        "popl %[ret]\n"
85
        "popl %[ret]\n"
86
        "movl %[ret], %[val]\n"
86
        "movl %[ret], %[val]\n"
87
       
87
       
88
        "btcl $21, %[val]\n"         /* swap the ID bit */
88
        "btcl $21, %[val]\n"         /* swap the ID bit */
89
       
89
       
90
        "pushl %[val]\n"             /* propagate the change into flags */
90
        "pushl %[val]\n"             /* propagate the change into flags */
91
        "popf\n"
91
        "popf\n"
92
        "pushf\n"
92
        "pushf\n"
93
        "popl %[val]\n"
93
        "popl %[val]\n"
94
       
94
       
95
        "andl $(1 << 21), %[ret]\n"  /* interrested only in ID bit */
95
        "andl $(1 << 21), %[ret]\n"  /* interrested only in ID bit */
96
        "andl $(1 << 21), %[val]\n"
96
        "andl $(1 << 21), %[val]\n"
97
        "xorl %[val], %[ret]\n"
97
        "xorl %[val], %[ret]\n"
98
        : [ret] "=r" (ret), [val] "=r" (val)
98
        : [ret] "=r" (ret), [val] "=r" (val)
99
    );
99
    );
100
   
100
   
101
    return ret;
101
    return ret;
102
}
102
}
103
 
103
 
104
static inline void cpuid(uint32_t cmd, cpu_info_t *info)
104
static inline void cpuid(uint32_t cmd, cpu_info_t *info)
105
{
105
{
106
    asm volatile (
106
    asm volatile (
107
        "cpuid\n"
107
        "cpuid\n"
108
        : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx),
108
        : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx),
109
          "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
109
          "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
110
        : "a" (cmd)
110
        : "a" (cmd)
111
    );
111
    );
112
}
112
}
113
 
113
 
114
#endif /* !def __ASM__ */
114
#endif /* !def __ASM__ */
115
#endif
115
#endif
116
 
116
 
117
/** @}
117
/** @}
118
 */
118
 */
119
 
119