WebSVN – HelenOS – Diff – /tags/0.4.1/kernel/arch/arm32/src/exception.c


/*
 * Copyright (c) 2007 Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 *  @brief Exception handlers and exception initialization routines.
 */
 
#include <arch/exception.h>
#include <arch/memstr.h>
#include <arch/regutils.h>
#include <interrupt.h>
#include <arch/mm/page_fault.h>
#include <arch/barrier.h>
#include <print.h>
#include <syscall/syscall.h>
 
#ifdef MACHINE_testarm
    #include <arch/mach/testarm/testarm.h>
#endif
 
#ifdef MACHINE_integratorcp
    #include <arch/mach/integratorcp/integratorcp.h>
#endif
 
/** Offset used in calculation of exception handler's relative address.
 *
 * @see install_handler()
 */
#define PREFETCH_OFFSET      0x8
 
/** LDR instruction's code */
#define LDR_OPCODE           0xe59ff000
 
/** Number of exception vectors. */
#define EXC_VECTORS          8
 
/** Size of memory block occupied by exception vectors. */
#define EXC_VECTORS_SIZE     (EXC_VECTORS * 4)
 
/** Updates specified exception vector to jump to given handler.
 *
 *  Addresses of handlers are stored in memory following exception vectors.
 */
static void install_handler(unsigned handler_addr, unsigned *vector)
{
    /* relative address (related to exc. vector) of the word
     * where handler's address is stored
    */
    volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
        PREFETCH_OFFSET;
   
    /* make it LDR instruction and store at exception vector */
    *vector = handler_address_ptr | LDR_OPCODE;
    smc_coherence(*vector);
   
    /* store handler's address */
    *(vector + EXC_VECTORS) = handler_addr;
 
}
 
/** Software Interrupt handler.
 *
 * Dispatches the syscall.
 */
static void swi_exception(int exc_no, istate_t *istate)
{
    istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
        istate->r3, istate->r4, istate->r5, istate->r6);
}
 
/** Fills exception vectors with appropriate exception handlers. */
void install_exception_handlers(void)
{
    install_handler((unsigned) reset_exception_entry,
        (unsigned *) EXC_RESET_VEC);
   
    install_handler((unsigned) undef_instr_exception_entry,
        (unsigned *) EXC_UNDEF_INSTR_VEC);
   
    install_handler((unsigned) swi_exception_entry,
        (unsigned *) EXC_SWI_VEC);
   
    install_handler((unsigned) prefetch_abort_exception_entry,
        (unsigned *) EXC_PREFETCH_ABORT_VEC);
   
    install_handler((unsigned) data_abort_exception_entry,
        (unsigned *) EXC_DATA_ABORT_VEC);
   
    install_handler((unsigned) irq_exception_entry,
        (unsigned *) EXC_IRQ_VEC);
   
    install_handler((unsigned) fiq_exception_entry,
        (unsigned *) EXC_FIQ_VEC);
}
 
#ifdef HIGH_EXCEPTION_VECTORS
/** Activates use of high exception vectors addresses. */
static void high_vectors(void)
{
    uint32_t control_reg;
   
    asm volatile (
        "mrc p15, 0, %[control_reg], c1, c1"
        : [control_reg] "=r" (control_reg)
    );
   
    /* switch on the high vectors bit */
    control_reg |= CP15_R1_HIGH_VECTORS_BIT;
   
    asm volatile (
        "mcr p15, 0, %[control_reg], c1, c1"
        :: [control_reg] "r" (control_reg)
    );
}
#endif
 
/** Interrupt Exception handler.
 *
 * Determines the sources of interrupt and calls their handlers.
 */
static void irq_exception(int exc_no, istate_t *istate)
{
    machine_irq_exception(exc_no, istate);
}
 
/** Initializes exception handling.
 *
 * Installs low-level exception handlers and then registers
 * exceptions and their handlers to kernel exception dispatcher.
 */
void exception_init(void)
{
#ifdef HIGH_EXCEPTION_VECTORS
    high_vectors();
#endif
    install_exception_handlers();
   
    exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
    exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
        (iroutine) prefetch_abort);
    exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
    exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
}
 
/** Prints #istate_t structure content.
 *
 * @param istate Structure to be printed.
 */
void print_istate(istate_t *istate)
{
    printf("istate dump:\n");
   
    printf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
        istate->r0, istate->r1, istate->r2, istate->r3);
    printf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
        istate->r4, istate->r5, istate->r6, istate->r7);
    printf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
        istate->r8, istate->r9, istate->r10, istate->r11);
    printf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
        istate->r12, istate->sp, istate->lr, istate->spsr);
   
    printf(" pc: %x\n", istate->pc);
}
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/tags/0.4.1/kernel/arch/arm32/src/exception.c – Rev 4675 → 4687

Rev 4675		Rev 4687
1	/*	1	/*
2	* Copyright (c) 2007 Petr Stepan	2	* Copyright (c) 2007 Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	* @brief Exception handlers and exception initialization routines.	33	* @brief Exception handlers and exception initialization routines.
34	*/	34	*/
35		35
36	#include <arch/exception.h>	36	#include <arch/exception.h>
37	#include <arch/memstr.h>	37	#include <arch/memstr.h>
38	#include <arch/regutils.h>	38	#include <arch/regutils.h>
39	#include <interrupt.h>	39	#include <interrupt.h>
40	#include <arch/mm/page_fault.h>	40	#include <arch/mm/page_fault.h>
41	#include <arch/barrier.h>	41	#include <arch/barrier.h>
42	#include <print.h>	42	#include <print.h>
43	#include <syscall/syscall.h>	43	#include <syscall/syscall.h>
44		44
45	#ifdef MACHINE_testarm	45	#ifdef MACHINE_testarm
46	#include <arch/mach/testarm/testarm.h>	46	#include <arch/mach/testarm/testarm.h>
47	#endif	47	#endif
48		48
49	#ifdef MACHINE_integratorcp	49	#ifdef MACHINE_integratorcp
50	#include <arch/mach/integratorcp/integratorcp.h>	50	#include <arch/mach/integratorcp/integratorcp.h>
51	#endif	51	#endif
52		52
53	/** Offset used in calculation of exception handler's relative address.	53	/** Offset used in calculation of exception handler's relative address.
54	*	54	*
55	* @see install_handler()	55	* @see install_handler()
56	*/	56	*/
57	#define PREFETCH_OFFSET 0x8	57	#define PREFETCH_OFFSET 0x8
58		58
59	/** LDR instruction's code */	59	/** LDR instruction's code */
60	#define LDR_OPCODE 0xe59ff000	60	#define LDR_OPCODE 0xe59ff000
61		61
62	/** Number of exception vectors. */	62	/** Number of exception vectors. */
63	#define EXC_VECTORS 8	63	#define EXC_VECTORS 8
64		64
65	/** Size of memory block occupied by exception vectors. */	65	/** Size of memory block occupied by exception vectors. */
66	#define EXC_VECTORS_SIZE (EXC_VECTORS * 4)	66	#define EXC_VECTORS_SIZE (EXC_VECTORS * 4)
67		67
68	/** Updates specified exception vector to jump to given handler.	68	/** Updates specified exception vector to jump to given handler.
69	*	69	*
70	* Addresses of handlers are stored in memory following exception vectors.	70	* Addresses of handlers are stored in memory following exception vectors.
71	*/	71	*/
72	static void install_handler(unsigned handler_addr, unsigned *vector)	72	static void install_handler(unsigned handler_addr, unsigned *vector)
73	{	73	{
74	/* relative address (related to exc. vector) of the word	74	/* relative address (related to exc. vector) of the word
75	* where handler's address is stored	75	* where handler's address is stored
76	*/	76	*/
77	volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -	77	volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
78	PREFETCH_OFFSET;	78	PREFETCH_OFFSET;
79		79
80	/* make it LDR instruction and store at exception vector */	80	/* make it LDR instruction and store at exception vector */
81	*vector = handler_address_ptr \| LDR_OPCODE;	81	*vector = handler_address_ptr \| LDR_OPCODE;
82	smc_coherence(*vector);	82	smc_coherence(*vector);
83		83
84	/* store handler's address */	84	/* store handler's address */
85	*(vector + EXC_VECTORS) = handler_addr;	85	*(vector + EXC_VECTORS) = handler_addr;
86		86
87	}	87	}
88		88
89	/** Software Interrupt handler.	89	/** Software Interrupt handler.
90	*	90	*
91	* Dispatches the syscall.	91	* Dispatches the syscall.
92	*/	92	*/
93	static void swi_exception(int exc_no, istate_t *istate)	93	static void swi_exception(int exc_no, istate_t *istate)
94	{	94	{
95	istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,	95	istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
96	istate->r3, istate->r4, istate->r5, istate->r6);	96	istate->r3, istate->r4, istate->r5, istate->r6);
97	}	97	}
98		98
99	/** Fills exception vectors with appropriate exception handlers. */	99	/** Fills exception vectors with appropriate exception handlers. */
100	void install_exception_handlers(void)	100	void install_exception_handlers(void)
101	{	101	{
102	install_handler((unsigned) reset_exception_entry,	102	install_handler((unsigned) reset_exception_entry,
103	(unsigned *) EXC_RESET_VEC);	103	(unsigned *) EXC_RESET_VEC);
104		104
105	install_handler((unsigned) undef_instr_exception_entry,	105	install_handler((unsigned) undef_instr_exception_entry,
106	(unsigned *) EXC_UNDEF_INSTR_VEC);	106	(unsigned *) EXC_UNDEF_INSTR_VEC);
107		107
108	install_handler((unsigned) swi_exception_entry,	108	install_handler((unsigned) swi_exception_entry,
109	(unsigned *) EXC_SWI_VEC);	109	(unsigned *) EXC_SWI_VEC);
110		110
111	install_handler((unsigned) prefetch_abort_exception_entry,	111	install_handler((unsigned) prefetch_abort_exception_entry,
112	(unsigned *) EXC_PREFETCH_ABORT_VEC);	112	(unsigned *) EXC_PREFETCH_ABORT_VEC);
113		113
114	install_handler((unsigned) data_abort_exception_entry,	114	install_handler((unsigned) data_abort_exception_entry,
115	(unsigned *) EXC_DATA_ABORT_VEC);	115	(unsigned *) EXC_DATA_ABORT_VEC);
116		116
117	install_handler((unsigned) irq_exception_entry,	117	install_handler((unsigned) irq_exception_entry,
118	(unsigned *) EXC_IRQ_VEC);	118	(unsigned *) EXC_IRQ_VEC);
119		119
120	install_handler((unsigned) fiq_exception_entry,	120	install_handler((unsigned) fiq_exception_entry,
121	(unsigned *) EXC_FIQ_VEC);	121	(unsigned *) EXC_FIQ_VEC);
122	}	122	}
123		123
124	#ifdef HIGH_EXCEPTION_VECTORS	124	#ifdef HIGH_EXCEPTION_VECTORS
125	/** Activates use of high exception vectors addresses. */	125	/** Activates use of high exception vectors addresses. */
126	static void high_vectors(void)	126	static void high_vectors(void)
127	{	127	{
128	uint32_t control_reg;	128	uint32_t control_reg;
129		129
130	asm volatile (	130	asm volatile (
131	"mrc p15, 0, %[control_reg], c1, c1"	131	"mrc p15, 0, %[control_reg], c1, c1"
132	: [control_reg] "=r" (control_reg)	132	: [control_reg] "=r" (control_reg)
133	);	133	);
134		134
135	/* switch on the high vectors bit */	135	/* switch on the high vectors bit */
136	control_reg \|= CP15_R1_HIGH_VECTORS_BIT;	136	control_reg \|= CP15_R1_HIGH_VECTORS_BIT;
137		137
138	asm volatile (	138	asm volatile (
139	"mcr p15, 0, %[control_reg], c1, c1"	139	"mcr p15, 0, %[control_reg], c1, c1"
140	:: [control_reg] "r" (control_reg)	140	:: [control_reg] "r" (control_reg)
141	);	141	);
142	}	142	}
143	#endif	143	#endif
144		144
145	/** Interrupt Exception handler.	145	/** Interrupt Exception handler.
146	*	146	*
147	* Determines the sources of interrupt and calls their handlers.	147	* Determines the sources of interrupt and calls their handlers.
148	*/	148	*/
149	static void irq_exception(int exc_no, istate_t *istate)	149	static void irq_exception(int exc_no, istate_t *istate)
150	{	150	{
151	machine_irq_exception(exc_no, istate);	151	machine_irq_exception(exc_no, istate);
152	}	152	}
153		153
154	/** Initializes exception handling.	154	/** Initializes exception handling.
155	*	155	*
156	* Installs low-level exception handlers and then registers	156	* Installs low-level exception handlers and then registers
157	* exceptions and their handlers to kernel exception dispatcher.	157	* exceptions and their handlers to kernel exception dispatcher.
158	*/	158	*/
159	void exception_init(void)	159	void exception_init(void)
160	{	160	{
161	#ifdef HIGH_EXCEPTION_VECTORS	161	#ifdef HIGH_EXCEPTION_VECTORS
162	high_vectors();	162	high_vectors();
163	#endif	163	#endif
164	install_exception_handlers();	164	install_exception_handlers();
165		165
166	exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);	166	exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
167	exc_register(EXC_PREFETCH_ABORT, "prefetch abort",	167	exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
168	(iroutine) prefetch_abort);	168	(iroutine) prefetch_abort);
169	exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);	169	exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
170	exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);	170	exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
171	}	171	}
172		172
173	/** Prints #istate_t structure content.	173	/** Prints #istate_t structure content.
174	*	174	*
175	* @param istate Structure to be printed.	175	* @param istate Structure to be printed.
176	*/	176	*/
177	void print_istate(istate_t *istate)	177	void print_istate(istate_t *istate)
178	{	178	{
179	printf("istate dump:\n");	179	printf("istate dump:\n");
180		180
181	printf(" r0: %x r1: %x r2: %x r3: %x\n",	181	printf(" r0: %x r1: %x r2: %x r3: %x\n",
182	istate->r0, istate->r1, istate->r2, istate->r3);	182	istate->r0, istate->r1, istate->r2, istate->r3);
183	printf(" r4: %x r5: %x r6: %x r7: %x\n",	183	printf(" r4: %x r5: %x r6: %x r7: %x\n",
184	istate->r4, istate->r5, istate->r6, istate->r7);	184	istate->r4, istate->r5, istate->r6, istate->r7);
185	printf(" r8: %x r8: %x r10: %x r11: %x\n",	185	printf(" r8: %x r8: %x r10: %x r11: %x\n",
186	istate->r8, istate->r9, istate->r10, istate->r11);	186	istate->r8, istate->r9, istate->r10, istate->r11);
187	printf(" r12: %x sp: %x lr: %x spsr: %x\n",	187	printf(" r12: %x sp: %x lr: %x spsr: %x\n",
188	istate->r12, istate->sp, istate->lr, istate->spsr);	188	istate->r12, istate->sp, istate->lr, istate->spsr);
189		189
190	printf(" pc: %x\n", istate->pc);	190	printf(" pc: %x\n", istate->pc);
191	}	191	}
192		192
193	/** @}	193	/** @}
194	*/	194	*/
195		195