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#
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#
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# Copyright (c) 2007 Michal Kebrt
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# Copyright (c) 2007 Michal Kebrt
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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.text
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.text
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.global memsetb
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.global memsetb
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.global memsetw
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.global memsetw
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.global memcpy
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.global memcpy
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.global memcpy_from_uspace
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.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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memsetb:
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memsetb:
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	b _memsetb
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	b _memsetb
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memsetw:
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memsetw:
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	b _memsetw
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	b _memsetw
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memcpy:
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memcpy:
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memcpy_from_uspace:
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memcpy_from_uspace:
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memcpy_to_uspace:
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memcpy_to_uspace:
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	add     r3, r1, #3
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	add     r3, r1, #3
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	bic     r3, r3, #3
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	bic     r3, r3, #3
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	cmp     r1, r3
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	cmp     r1, r3
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	stmdb   sp!, {r4, r5, lr}
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	stmdb   sp!, {r4, r5, lr}
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	mov	r5, r0			/* save dst */
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	mov	r5, r0			/* save dst */
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	beq     4f
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	beq     4f
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1:
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1:
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	cmp     r2, #0
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	cmp     r2, #0
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	movne   ip, #0
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	movne   ip, #0
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	beq     3f
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	beq     3f
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2:
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2:
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	ldrb    r3, [ip, r1]
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	ldrb    r3, [ip, r1]
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	strb    r3, [ip, r0]
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	strb    r3, [ip, r0]
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	add     ip, ip, #1
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	add     ip, ip, #1
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	cmp     ip, r2
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	cmp     ip, r2
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	bne     2b
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	bne     2b
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3:
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3:
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	mov     r0, r5
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	mov     r0, r5
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	ldmia   sp!, {r4, r5, pc}
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	ldmia   sp!, {r4, r5, pc}
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4:
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4:
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	add     r3, r0, #3
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	add     r3, r0, #3
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	bic     r3, r3, #3
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	bic     r3, r3, #3
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	cmp     r0, r3
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	cmp     r0, r3
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	bne     1b
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	bne     1b
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	movs    r4, r2, lsr #2
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	movs    r4, r2, lsr #2
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	moveq   lr, r4
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	moveq   lr, r4
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	beq     6f
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	beq     6f
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	mov     lr, #0
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	mov     lr, #0
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	mov     ip, lr
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	mov     ip, lr
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5:
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5:
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	ldr     r3, [ip, r1]
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	ldr     r3, [ip, r1]
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	add     lr, lr, #1
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	add     lr, lr, #1
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	cmp     lr, r4
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	cmp     lr, r4
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	str     r3, [ip, r0]
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	str     r3, [ip, r0]
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	add     ip, ip, #4
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	add     ip, ip, #4
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	bne     5b
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	bne     5b
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6:
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6:
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	ands    r4, r2, #3
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	ands    r4, r2, #3
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	beq     3b
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	beq     3b
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	mov     r3, lr, lsl #2
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	mov     r3, lr, lsl #2
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	add     r0, r3, r0
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	add     r0, r3, r0
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	add     ip, r3, r1
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	add     ip, r3, r1
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	mov     r2, #0
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	mov     r2, #0
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7:
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7:
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	ldrb    r3, [r2, ip]
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	ldrb    r3, [r2, ip]
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	strb    r3, [r2, r0]
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	strb    r3, [r2, r0]
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	add     r2, r2, #1
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	add     r2, r2, #1
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	cmp     r2, r4
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	cmp     r2, r4
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	bne     7b
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	bne     7b
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	b       3b
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	b       3b
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memcpy_from_uspace_failover_address:
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memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	mov	r0, #0
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	mov	r0, #0
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	ldmia   sp!, {r4, r5, pc}
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	ldmia   sp!, {r4, r5, pc}
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