WebSVN – HelenOS – Diff – /tags/0.2.0.1/kernel/arch/ia64/src/mm/page.c


/*
 * Copyright (C) 2006 Jakub Jermar
 * Copyright (C) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/mm/page.h>
#include <genarch/mm/page_ht.h>
#include <mm/asid.h>
#include <arch/mm/asid.h>
#include <arch/mm/vhpt.h>
#include <arch/types.h>
#include <typedefs.h>
#include <print.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <config.h>
#include <panic.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <memstr.h>
 
static void set_environment(void);
 
/** Initialize ia64 virtual address translation subsystem. */
void page_arch_init(void)
{
    page_mapping_operations = &ht_mapping_operations;
    pk_disable();
    set_environment();
}
 
/** Initialize VHPT and region registers. */
void set_environment(void)
{
    region_register rr;
    pta_register pta;  
    int i;
#ifdef CONFIG_VHPT  
    __address vhpt_base;
#endif
 
    /*
     * First set up kernel region register.
     * This is redundant (see start.S) but we keep it here just for sure.
     */
    rr.word = rr_read(VRN_KERNEL);
    rr.map.ve = 0;                  /* disable VHPT walker */
    rr.map.ps = PAGE_WIDTH;
    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
    rr_write(VRN_KERNEL, rr.word);
    srlz_i();
    srlz_d();
 
    /*
     * And setup the rest of region register.
     */
    for(i = 0; i < REGION_REGISTERS; i++) {
        /* skip kernel rr */
        if (i == VRN_KERNEL)
            continue;
   
        rr.word = rr_read(i);
        rr.map.ve = 0;      /* disable VHPT walker */
        rr.map.rid = RID_KERNEL;
        rr.map.ps = PAGE_WIDTH;
        rr_write(i, rr.word);
        srlz_i();
        srlz_d();
    }
 
#ifdef CONFIG_VHPT  
    vhpt_base = vhpt_set_up();
#endif
    /*
     * Set up PTA register.
     */
    pta.word = pta_read();
#ifndef CONFIG_VHPT
    pta.map.ve = 0;                   /* disable VHPT walker */
    pta.map.base = 0 >> PTA_BASE_SHIFT;
#else
    pta.map.ve = 1;                   /* enable VHPT walker */
    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
#endif
    pta.map.vf = 1;                   /* large entry format */
    pta.map.size = VHPT_WIDTH;
    pta_write(pta.word);
    srlz_i();
    srlz_d();
}
 
/** Calculate address of collision chain from VPN and ASID.
 *
 * Interrupts must be disabled.
 *
 * @param page Address of virtual page including VRN bits.
 * @param asid Address space identifier.
 *
 * @return VHPT entry address.
 */
vhpt_entry_t *vhpt_hash(__address page, asid_t asid)
{
    region_register rr_save, rr;
    index_t vrn;
    rid_t rid;
    vhpt_entry_t *v;
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compute thash and return.
         */
        v = (vhpt_entry_t *) thash(page);
        return v;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    v = (vhpt_entry_t *) thash(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return v;
}
 
/** Compare ASID and VPN against PTE.
 *
 * Interrupts must be disabled.
 *
 * @param page Address of virtual page including VRN bits.
 * @param asid Address space identifier.
 *
 * @return True if page and asid match the page and asid of t, false otherwise.
 */
bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    bool match;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compare ttag with t and return.
         */
        return ttag(page) == v->present.tag.tag_word;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    match = (ttag(page) == v->present.tag.tag_word);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return match;      
}
 
/** Set up one VHPT entry.
 *
 * @param t VHPT entry to be set up.
 * @param page Virtual address of the page mapped by the entry.
 * @param asid Address space identifier of the address space to which page belongs.
 * @param frame Physical address of the frame to wich page is mapped.
 * @param flags Different flags for the mapping.
 */
void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    __u64 tag;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    /*
     * Compute ttag.
     */
    rr_save.word = rr_read(vrn);
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    tag = ttag(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
   
    /*
     * Clear the entry.
     */
    v->word[0] = 0;
    v->word[1] = 0;
    v->word[2] = 0;
    v->word[3] = 0;
   
    v->present.p = true;
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
    v->present.a = false;   /* not accessed */
    v->present.d = false;   /* not dirty */
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
    v->present.ppn = frame >> PPN_SHIFT;
    v->present.ed = false;  /* exception not deffered */
    v->present.ps = PAGE_WIDTH;
    v->present.key = 0;
    v->present.tag.tag_word = tag;
}
 

Rev 1965	Rev 1968
1	/*	1	/*
2	* Copyright (C) 2006 Jakub Jermar	2	* Copyright (C) 2006 Jakub Jermar
3	* Copyright (C) 2006 Jakub Vana	3	* Copyright (C) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	#include <arch/mm/page.h>	30	#include <arch/mm/page.h>
31	#include <genarch/mm/page_ht.h>	31	#include <genarch/mm/page_ht.h>
32	#include <mm/asid.h>	32	#include <mm/asid.h>
33	#include <arch/mm/asid.h>	33	#include <arch/mm/asid.h>
34	#include <arch/mm/vhpt.h>	34	#include <arch/mm/vhpt.h>
35	#include <arch/types.h>	35	#include <arch/types.h>
36	#include <typedefs.h>	36	#include <typedefs.h>
37	#include <print.h>	37	#include <print.h>
38	#include <mm/page.h>	38	#include <mm/page.h>
39	#include <mm/frame.h>	39	#include <mm/frame.h>
40	#include <config.h>	40	#include <config.h>
41	#include <panic.h>	41	#include <panic.h>
42	#include <arch/asm.h>	42	#include <arch/asm.h>
43	#include <arch/barrier.h>	43	#include <arch/barrier.h>
44	#include <memstr.h>	44	#include <memstr.h>
45		45
46	static void set_environment(void);	46	static void set_environment(void);
47		47
48	/** Initialize ia64 virtual address translation subsystem. */	48	/** Initialize ia64 virtual address translation subsystem. */
49	void page_arch_init(void)	49	void page_arch_init(void)
50	{	50	{
51	page_mapping_operations = &ht_mapping_operations;	51	page_mapping_operations = &ht_mapping_operations;
52	pk_disable();	52	pk_disable();
53	set_environment();	53	set_environment();
54	}	54	}
55		55
56	/** Initialize VHPT and region registers. */	56	/** Initialize VHPT and region registers. */
57	void set_environment(void)	57	void set_environment(void)
58	{	58	{
59	region_register rr;	59	region_register rr;
60	pta_register pta;	60	pta_register pta;
61	int i;	61	int i;
62	#ifdef CONFIG_VHPT	62	#ifdef CONFIG_VHPT
63	__address vhpt_base;	63	__address vhpt_base;
64	#endif	64	#endif
65		65
66	/*	66	/*
67	* First set up kernel region register.	67	* First set up kernel region register.
68	* This is redundant (see start.S) but we keep it here just for sure.	68	* This is redundant (see start.S) but we keep it here just for sure.
69	*/	69	*/
70	rr.word = rr_read(VRN_KERNEL);	70	rr.word = rr_read(VRN_KERNEL);
71	rr.map.ve = 0; /* disable VHPT walker */	71	rr.map.ve = 0; /* disable VHPT walker */
72	rr.map.ps = PAGE_WIDTH;	72	rr.map.ps = PAGE_WIDTH;
73	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);	73	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
74	rr_write(VRN_KERNEL, rr.word);	74	rr_write(VRN_KERNEL, rr.word);
75	srlz_i();	75	srlz_i();
76	srlz_d();	76	srlz_d();
77		77
78	/*	78	/*
79	* And setup the rest of region register.	79	* And setup the rest of region register.
80	*/	80	*/
81	for(i = 0; i < REGION_REGISTERS; i++) {	81	for(i = 0; i < REGION_REGISTERS; i++) {
82	/* skip kernel rr */	82	/* skip kernel rr */
83	if (i == VRN_KERNEL)	83	if (i == VRN_KERNEL)
84	continue;	84	continue;
85		85
86	rr.word = rr_read(i);	86	rr.word = rr_read(i);
87	rr.map.ve = 0; /* disable VHPT walker */	87	rr.map.ve = 0; /* disable VHPT walker */
88	rr.map.rid = RID_KERNEL;	88	rr.map.rid = RID_KERNEL;
89	rr.map.ps = PAGE_WIDTH;	89	rr.map.ps = PAGE_WIDTH;
90	rr_write(i, rr.word);	90	rr_write(i, rr.word);
91	srlz_i();	91	srlz_i();
92	srlz_d();	92	srlz_d();
93	}	93	}
94		94
95	#ifdef CONFIG_VHPT	95	#ifdef CONFIG_VHPT
96	vhpt_base = vhpt_set_up();	96	vhpt_base = vhpt_set_up();
97	#endif	97	#endif
98	/*	98	/*
99	* Set up PTA register.	99	* Set up PTA register.
100	*/	100	*/
101	pta.word = pta_read();	101	pta.word = pta_read();
102	#ifndef CONFIG_VHPT	102	#ifndef CONFIG_VHPT
103	pta.map.ve = 0; /* disable VHPT walker */	103	pta.map.ve = 0; /* disable VHPT walker */
104	pta.map.base = 0 >> PTA_BASE_SHIFT;	104	pta.map.base = 0 >> PTA_BASE_SHIFT;
105	#else	105	#else
106	pta.map.ve = 1; /* enable VHPT walker */	106	pta.map.ve = 1; /* enable VHPT walker */
107	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;	107	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
108	#endif	108	#endif
109	pta.map.vf = 1; /* large entry format */	109	pta.map.vf = 1; /* large entry format */
110	pta.map.size = VHPT_WIDTH;	110	pta.map.size = VHPT_WIDTH;
111	pta_write(pta.word);	111	pta_write(pta.word);
112	srlz_i();	112	srlz_i();
113	srlz_d();	113	srlz_d();
114	}	114	}
115		115
116	/** Calculate address of collision chain from VPN and ASID.	116	/** Calculate address of collision chain from VPN and ASID.
117	*	117	*
118	* Interrupts must be disabled.	118	* Interrupts must be disabled.
119	*	119	*
120	* @param page Address of virtual page including VRN bits.	120	* @param page Address of virtual page including VRN bits.
121	* @param asid Address space identifier.	121	* @param asid Address space identifier.
122	*	122	*
123	* @return VHPT entry address.	123	* @return VHPT entry address.
124	*/	124	*/
125	vhpt_entry_t *vhpt_hash(__address page, asid_t asid)	125	vhpt_entry_t *vhpt_hash(__address page, asid_t asid)
126	{	126	{
127	region_register rr_save, rr;	127	region_register rr_save, rr;
128	index_t vrn;	128	index_t vrn;
129	rid_t rid;	129	rid_t rid;
130	vhpt_entry_t *v;	130	vhpt_entry_t *v;
131		131
132	vrn = page >> VRN_SHIFT;	132	vrn = page >> VRN_SHIFT;
133	rid = ASID2RID(asid, vrn);	133	rid = ASID2RID(asid, vrn);
134		134
135	rr_save.word = rr_read(vrn);	135	rr_save.word = rr_read(vrn);
136	if (rr_save.map.rid == rid) {	136	if (rr_save.map.rid == rid) {
137	/*	137	/*
138	* The RID is already in place, compute thash and return.	138	* The RID is already in place, compute thash and return.
139	*/	139	*/
140	v = (vhpt_entry_t *) thash(page);	140	v = (vhpt_entry_t *) thash(page);
141	return v;	141	return v;
142	}	142	}
143		143
144	/*	144	/*
145	* The RID must be written to some region register.	145	* The RID must be written to some region register.
146	* To speed things up, register indexed by vrn is used.	146	* To speed things up, register indexed by vrn is used.
147	*/	147	*/
148	rr.word = rr_save.word;	148	rr.word = rr_save.word;
149	rr.map.rid = rid;	149	rr.map.rid = rid;
150	rr_write(vrn, rr.word);	150	rr_write(vrn, rr.word);
151	srlz_i();	151	srlz_i();
152	v = (vhpt_entry_t *) thash(page);	152	v = (vhpt_entry_t *) thash(page);
153	rr_write(vrn, rr_save.word);	153	rr_write(vrn, rr_save.word);
154	srlz_i();	154	srlz_i();
155	srlz_d();	155	srlz_d();
156		156
157	return v;	157	return v;
158	}	158	}
159		159
160	/** Compare ASID and VPN against PTE.	160	/** Compare ASID and VPN against PTE.
161	*	161	*
162	* Interrupts must be disabled.	162	* Interrupts must be disabled.
163	*	163	*
164	* @param page Address of virtual page including VRN bits.	164	* @param page Address of virtual page including VRN bits.
165	* @param asid Address space identifier.	165	* @param asid Address space identifier.
166	*	166	*
167	* @return True if page and asid match the page and asid of t, false otherwise.	167	* @return True if page and asid match the page and asid of t, false otherwise.
168	*/	168	*/
169	bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)	169	bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v)
170	{	170	{
171	region_register rr_save, rr;	171	region_register rr_save, rr;
172	index_t vrn;	172	index_t vrn;
173	rid_t rid;	173	rid_t rid;
174	bool match;	174	bool match;
175		175
176	ASSERT(v);	176	ASSERT(v);
177		177
178	vrn = page >> VRN_SHIFT;	178	vrn = page >> VRN_SHIFT;
179	rid = ASID2RID(asid, vrn);	179	rid = ASID2RID(asid, vrn);
180		180
181	rr_save.word = rr_read(vrn);	181	rr_save.word = rr_read(vrn);
182	if (rr_save.map.rid == rid) {	182	if (rr_save.map.rid == rid) {
183	/*	183	/*
184	* The RID is already in place, compare ttag with t and return.	184	* The RID is already in place, compare ttag with t and return.
185	*/	185	*/
186	return ttag(page) == v->present.tag.tag_word;	186	return ttag(page) == v->present.tag.tag_word;
187	}	187	}
188		188
189	/*	189	/*
190	* The RID must be written to some region register.	190	* The RID must be written to some region register.
191	* To speed things up, register indexed by vrn is used.	191	* To speed things up, register indexed by vrn is used.
192	*/	192	*/
193	rr.word = rr_save.word;	193	rr.word = rr_save.word;
194	rr.map.rid = rid;	194	rr.map.rid = rid;
195	rr_write(vrn, rr.word);	195	rr_write(vrn, rr.word);
196	srlz_i();	196	srlz_i();
197	match = (ttag(page) == v->present.tag.tag_word);	197	match = (ttag(page) == v->present.tag.tag_word);
198	rr_write(vrn, rr_save.word);	198	rr_write(vrn, rr_save.word);
199	srlz_i();	199	srlz_i();
200	srlz_d();	200	srlz_d();
201		201
202	return match;	202	return match;
203	}	203	}
204		204
205	/** Set up one VHPT entry.	205	/** Set up one VHPT entry.
206	*	206	*
207	* @param t VHPT entry to be set up.	207	* @param t VHPT entry to be set up.
208	* @param page Virtual address of the page mapped by the entry.	208	* @param page Virtual address of the page mapped by the entry.
209	* @param asid Address space identifier of the address space to which page belongs.	209	* @param asid Address space identifier of the address space to which page belongs.
210	* @param frame Physical address of the frame to wich page is mapped.	210	* @param frame Physical address of the frame to wich page is mapped.
211	* @param flags Different flags for the mapping.	211	* @param flags Different flags for the mapping.
212	*/	212	*/
213	void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)	213	void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags)
214	{	214	{
215	region_register rr_save, rr;	215	region_register rr_save, rr;
216	index_t vrn;	216	index_t vrn;
217	rid_t rid;	217	rid_t rid;
218	__u64 tag;	218	__u64 tag;
219		219
220	ASSERT(v);	220	ASSERT(v);
221		221
222	vrn = page >> VRN_SHIFT;	222	vrn = page >> VRN_SHIFT;
223	rid = ASID2RID(asid, vrn);	223	rid = ASID2RID(asid, vrn);
224		224
225	/*	225	/*
226	* Compute ttag.	226	* Compute ttag.
227	*/	227	*/
228	rr_save.word = rr_read(vrn);	228	rr_save.word = rr_read(vrn);
229	rr.word = rr_save.word;	229	rr.word = rr_save.word;
230	rr.map.rid = rid;	230	rr.map.rid = rid;
231	rr_write(vrn, rr.word);	231	rr_write(vrn, rr.word);
232	srlz_i();	232	srlz_i();
233	tag = ttag(page);	233	tag = ttag(page);
234	rr_write(vrn, rr_save.word);	234	rr_write(vrn, rr_save.word);
235	srlz_i();	235	srlz_i();
236	srlz_d();	236	srlz_d();
237		237
238	/*	238	/*
239	* Clear the entry.	239	* Clear the entry.
240	*/	240	*/
241	v->word[0] = 0;	241	v->word[0] = 0;
242	v->word[1] = 0;	242	v->word[1] = 0;
243	v->word[2] = 0;	243	v->word[2] = 0;
244	v->word[3] = 0;	244	v->word[3] = 0;
245		245
246	v->present.p = true;	246	v->present.p = true;
247	v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;	247	v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
248	v->present.a = false; /* not accessed */	248	v->present.a = false; /* not accessed */
249	v->present.d = false; /* not dirty */	249	v->present.d = false; /* not dirty */
250	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;	250	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
251	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;	251	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
252	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;	252	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
253	v->present.ppn = frame >> PPN_SHIFT;	253	v->present.ppn = frame >> PPN_SHIFT;
254	v->present.ed = false; /* exception not deffered */	254	v->present.ed = false; /* exception not deffered */
255	v->present.ps = PAGE_WIDTH;	255	v->present.ps = PAGE_WIDTH;
256	v->present.key = 0;	256	v->present.key = 0;
257	v->present.tag.tag_word = tag;	257	v->present.tag.tag_word = tag;
258	}	258	}
259		259

Subversion Repositories HelenOS

(root)/tags/0.2.0.1/kernel/arch/ia64/src/mm/page.c – Rev 1965 → 1968