WebSVN – HelenOS – Diff – /tags/0.1.1/kernel/arch/ia64/src/interrupt.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * Copyright (C) 2005 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#include <arch/interrupt.h>
#include <panic.h>
#include <print.h>
#include <console/console.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/register.h>
#include <arch/drivers/it.h>
#include <arch.h>
#include <symtab.h>
#include <debug.h>
#include <syscall/syscall.h>
#include <print.h>
#include <proc/scheduler.h>
#include <ipc/sysipc.h>
 
 
#define VECTORS_64_BUNDLE   20
#define VECTORS_16_BUNDLE   48
#define VECTORS_16_BUNDLE_START 0x5000
#define VECTOR_MAX      0x7f00
 
#define BUNDLE_SIZE     16
 
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
    "VHPT Translation vector",
    "Instruction TLB vector",
    "Data TLB vector",
    "Alternate Instruction TLB vector",
    "Alternate Data TLB vector",
    "Data Nested TLB vector",
    "Instruction Key Miss vector",
    "Data Key Miss vector",
    "Dirty-Bit vector",
    "Instruction Access-Bit vector",
    "Data Access-Bit vector"
    "Break Instruction vector",
    "External Interrupt vector"
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
    "Page Not Present vector",
    "Key Permission vector",
    "Instruction Access rights vector",
    "Data Access Rights vector",
    "General Exception vector",
    "Disabled FP-Register vector",
    "NaT Consumption vector",
    "Speculation vector",
    "Reserved",
    "Debug vector",
    "Unaligned Reference vector",
    "Unsupported Data Reference vector",
    "Floating-point Fault vector",
    "Floating-point Trap vector",
    "Lower-Privilege Transfer Trap vector",
    "Taken Branch Trap vector",
    "Single STep Trap vector",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "IA-32 Exception vector",
    "IA-32 Intercept vector",
    "IA-32 Interrupt vector",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
static char *vector_to_string(__u16 vector);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(__u16 vector)
{
    ASSERT(vector <= VECTOR_MAX);
   
    if (vector >= VECTORS_16_BUNDLE_START)
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
    else
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
}
 
void dump_interrupted_context(istate_t *istate)
{
    char *ifa, *iipa, *iip;
 
    ifa = get_symtab_entry(istate->cr_ifa);
    iipa = get_symtab_entry(istate->cr_iipa);
    iip = get_symtab_entry(istate->cr_iip);
 
    putchar('\n');
    printf("Interrupted context dump:\n");
    printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
    printf("ar.rnat=%#llx\tar.rsc=%$llx\n", istate->ar_rnat, istate->ar_rsc);
    printf("ar.ifs=%#llx\tar.pfs=%#llx\n", istate->ar_ifs, istate->ar_pfs);
    printf("cr.isr=%#llx\tcr.ipsr=%#llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
   
    printf("cr.iip=%#llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip ? iip : "?");
    printf("cr.iipa=%#llx\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
    printf("cr.ifa=%#llx\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
}
 
void general_exception(__u64 vector, istate_t *istate)
{
    char *desc = "";
 
    dump_interrupted_context(istate);
 
    switch (istate->cr_isr.ge_code) {
        case GE_ILLEGALOP:
        desc = "Illegal Operation fault";
        break;
        case GE_PRIVOP:
        desc = "Privileged Operation fault";
        break;
        case GE_PRIVREG:
        desc = "Privileged Register fault";
        break;
        case GE_RESREGFLD:
        desc = "Reserved Register/Field fault";
        break;
        case GE_DISBLDISTRAN:
        desc = "Disabled Instruction Set Transition fault";
        break;
        case GE_ILLEGALDEP:
        desc = "Illegal Dependency fault";
        break;
        default:
            desc = "unknown";
        break;
    }
 
    panic("General Exception (%s)\n", desc);
}
 
void fpu_enable(void);
 
void disabled_fp_register(__u64 vector, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY 
    scheduler_fpu_lazy_request();  
#else
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
#endif
}
 
 
void nop_handler(__u64 vector, istate_t *istate)
{
}
 
 
 
/** Handle syscall. */
int break_instruction(__u64 vector, istate_t *istate)
{
    /*
     * Move to next instruction after BREAK.
     */
    if (istate->cr_ipsr.ri == 2) {
        istate->cr_ipsr.ri = 0;
        istate->cr_iip += 16;
    } else {
        istate->cr_ipsr.ri++;
    }
 
    if (istate->in4 < SYSCALL_END)
        return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
    else
        panic("Undefined syscall %d", istate->in4);
       
    return -1;
}
 
void universal_handler(__u64 vector, istate_t *istate)
{
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
}
 
void external_interrupt(__u64 vector, istate_t *istate)
{
    cr_ivr_t ivr;
   
    ivr.value = ivr_read();
    srlz_d();
 
    switch(ivr.vector) {
        case INTERRUPT_TIMER:
        it_interrupt();
            break;
        case INTERRUPT_SPURIOUS:
            printf("cpu%d: spurious interrupt\n", CPU->id);
        break;
        default:
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
        break;
    }
}
 
/* Reregister irq to be IPC-ready */
void irq_ipc_bind_arch(__native irq)
{
    panic("not implemented\n");
    /* TODO */
}
 

Rev 1963	Rev 1968
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* Copyright (C) 2005 Jakub Vana	3	* Copyright (C) 2005 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*	28	*
29	*/	29	*/
30		30
31	#include <arch/interrupt.h>	31	#include <arch/interrupt.h>
32	#include <panic.h>	32	#include <panic.h>
33	#include <print.h>	33	#include <print.h>
34	#include <console/console.h>	34	#include <console/console.h>
35	#include <arch/types.h>	35	#include <arch/types.h>
36	#include <arch/asm.h>	36	#include <arch/asm.h>
37	#include <arch/barrier.h>	37	#include <arch/barrier.h>
38	#include <arch/register.h>	38	#include <arch/register.h>
39	#include <arch/drivers/it.h>	39	#include <arch/drivers/it.h>
40	#include <arch.h>	40	#include <arch.h>
41	#include <symtab.h>	41	#include <symtab.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <syscall/syscall.h>	43	#include <syscall/syscall.h>
44	#include <print.h>	44	#include <print.h>
45	#include <proc/scheduler.h>	45	#include <proc/scheduler.h>
46	#include <ipc/sysipc.h>	46	#include <ipc/sysipc.h>
47		47
48		48
49	#define VECTORS_64_BUNDLE 20	49	#define VECTORS_64_BUNDLE 20
50	#define VECTORS_16_BUNDLE 48	50	#define VECTORS_16_BUNDLE 48
51	#define VECTORS_16_BUNDLE_START 0x5000	51	#define VECTORS_16_BUNDLE_START 0x5000
52	#define VECTOR_MAX 0x7f00	52	#define VECTOR_MAX 0x7f00
53		53
54	#define BUNDLE_SIZE 16	54	#define BUNDLE_SIZE 16
55		55
56	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {	56	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
57	"VHPT Translation vector",	57	"VHPT Translation vector",
58	"Instruction TLB vector",	58	"Instruction TLB vector",
59	"Data TLB vector",	59	"Data TLB vector",
60	"Alternate Instruction TLB vector",	60	"Alternate Instruction TLB vector",
61	"Alternate Data TLB vector",	61	"Alternate Data TLB vector",
62	"Data Nested TLB vector",	62	"Data Nested TLB vector",
63	"Instruction Key Miss vector",	63	"Instruction Key Miss vector",
64	"Data Key Miss vector",	64	"Data Key Miss vector",
65	"Dirty-Bit vector",	65	"Dirty-Bit vector",
66	"Instruction Access-Bit vector",	66	"Instruction Access-Bit vector",
67	"Data Access-Bit vector"	67	"Data Access-Bit vector"
68	"Break Instruction vector",	68	"Break Instruction vector",
69	"External Interrupt vector"	69	"External Interrupt vector"
70	"Reserved",	70	"Reserved",
71	"Reserved",	71	"Reserved",
72	"Reserved",	72	"Reserved",
73	"Reserved",	73	"Reserved",
74	"Reserved",	74	"Reserved",
75	"Reserved",	75	"Reserved",
76	"Reserved"	76	"Reserved"
77	};	77	};
78		78
79	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {	79	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
80	"Page Not Present vector",	80	"Page Not Present vector",
81	"Key Permission vector",	81	"Key Permission vector",
82	"Instruction Access rights vector",	82	"Instruction Access rights vector",
83	"Data Access Rights vector",	83	"Data Access Rights vector",
84	"General Exception vector",	84	"General Exception vector",
85	"Disabled FP-Register vector",	85	"Disabled FP-Register vector",
86	"NaT Consumption vector",	86	"NaT Consumption vector",
87	"Speculation vector",	87	"Speculation vector",
88	"Reserved",	88	"Reserved",
89	"Debug vector",	89	"Debug vector",
90	"Unaligned Reference vector",	90	"Unaligned Reference vector",
91	"Unsupported Data Reference vector",	91	"Unsupported Data Reference vector",
92	"Floating-point Fault vector",	92	"Floating-point Fault vector",
93	"Floating-point Trap vector",	93	"Floating-point Trap vector",
94	"Lower-Privilege Transfer Trap vector",	94	"Lower-Privilege Transfer Trap vector",
95	"Taken Branch Trap vector",	95	"Taken Branch Trap vector",
96	"Single STep Trap vector",	96	"Single STep Trap vector",
97	"Reserved",	97	"Reserved",
98	"Reserved",	98	"Reserved",
99	"Reserved",	99	"Reserved",
100	"Reserved",	100	"Reserved",
101	"Reserved",	101	"Reserved",
102	"Reserved",	102	"Reserved",
103	"Reserved",	103	"Reserved",
104	"Reserved",	104	"Reserved",
105	"IA-32 Exception vector",	105	"IA-32 Exception vector",
106	"IA-32 Intercept vector",	106	"IA-32 Intercept vector",
107	"IA-32 Interrupt vector",	107	"IA-32 Interrupt vector",
108	"Reserved",	108	"Reserved",
109	"Reserved",	109	"Reserved",
110	"Reserved"	110	"Reserved"
111	};	111	};
112		112
113	static char *vector_to_string(__u16 vector);	113	static char *vector_to_string(__u16 vector);
114	static void dump_interrupted_context(istate_t *istate);	114	static void dump_interrupted_context(istate_t *istate);
115		115
116	char *vector_to_string(__u16 vector)	116	char *vector_to_string(__u16 vector)
117	{	117	{
118	ASSERT(vector <= VECTOR_MAX);	118	ASSERT(vector <= VECTOR_MAX);
119		119
120	if (vector >= VECTORS_16_BUNDLE_START)	120	if (vector >= VECTORS_16_BUNDLE_START)
121	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];	121	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
122	else	122	else
123	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];	123	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
124	}	124	}
125		125
126	void dump_interrupted_context(istate_t *istate)	126	void dump_interrupted_context(istate_t *istate)
127	{	127	{
128	char ifa, iipa, *iip;	128	char ifa, iipa, *iip;
129		129
130	ifa = get_symtab_entry(istate->cr_ifa);	130	ifa = get_symtab_entry(istate->cr_ifa);
131	iipa = get_symtab_entry(istate->cr_iipa);	131	iipa = get_symtab_entry(istate->cr_iipa);
132	iip = get_symtab_entry(istate->cr_iip);	132	iip = get_symtab_entry(istate->cr_iip);
133		133
134	putchar('\n');	134	putchar('\n');
135	printf("Interrupted context dump:\n");	135	printf("Interrupted context dump:\n");
136	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);	136	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
137	printf("ar.rnat=%#llx\tar.rsc=%$llx\n", istate->ar_rnat, istate->ar_rsc);	137	printf("ar.rnat=%#llx\tar.rsc=%$llx\n", istate->ar_rnat, istate->ar_rsc);
138	printf("ar.ifs=%#llx\tar.pfs=%#llx\n", istate->ar_ifs, istate->ar_pfs);	138	printf("ar.ifs=%#llx\tar.pfs=%#llx\n", istate->ar_ifs, istate->ar_pfs);
139	printf("cr.isr=%#llx\tcr.ipsr=%#llx\t\n", istate->cr_isr.value, istate->cr_ipsr);	139	printf("cr.isr=%#llx\tcr.ipsr=%#llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
140		140
141	printf("cr.iip=%#llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip ? iip : "?");	141	printf("cr.iip=%#llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip ? iip : "?");
142	printf("cr.iipa=%#llx\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");	142	printf("cr.iipa=%#llx\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
143	printf("cr.ifa=%#llx\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");	143	printf("cr.ifa=%#llx\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
144	}	144	}
145		145
146	void general_exception(__u64 vector, istate_t *istate)	146	void general_exception(__u64 vector, istate_t *istate)
147	{	147	{
148	char *desc = "";	148	char *desc = "";
149		149
150	dump_interrupted_context(istate);	150	dump_interrupted_context(istate);
151		151
152	switch (istate->cr_isr.ge_code) {	152	switch (istate->cr_isr.ge_code) {
153	case GE_ILLEGALOP:	153	case GE_ILLEGALOP:
154	desc = "Illegal Operation fault";	154	desc = "Illegal Operation fault";
155	break;	155	break;
156	case GE_PRIVOP:	156	case GE_PRIVOP:
157	desc = "Privileged Operation fault";	157	desc = "Privileged Operation fault";
158	break;	158	break;
159	case GE_PRIVREG:	159	case GE_PRIVREG:
160	desc = "Privileged Register fault";	160	desc = "Privileged Register fault";
161	break;	161	break;
162	case GE_RESREGFLD:	162	case GE_RESREGFLD:
163	desc = "Reserved Register/Field fault";	163	desc = "Reserved Register/Field fault";
164	break;	164	break;
165	case GE_DISBLDISTRAN:	165	case GE_DISBLDISTRAN:
166	desc = "Disabled Instruction Set Transition fault";	166	desc = "Disabled Instruction Set Transition fault";
167	break;	167	break;
168	case GE_ILLEGALDEP:	168	case GE_ILLEGALDEP:
169	desc = "Illegal Dependency fault";	169	desc = "Illegal Dependency fault";
170	break;	170	break;
171	default:	171	default:
172	desc = "unknown";	172	desc = "unknown";
173	break;	173	break;
174	}	174	}
175		175
176	panic("General Exception (%s)\n", desc);	176	panic("General Exception (%s)\n", desc);
177	}	177	}
178		178
179	void fpu_enable(void);	179	void fpu_enable(void);
180		180
181	void disabled_fp_register(__u64 vector, istate_t *istate)	181	void disabled_fp_register(__u64 vector, istate_t *istate)
182	{	182	{
183	#ifdef CONFIG_FPU_LAZY	183	#ifdef CONFIG_FPU_LAZY
184	scheduler_fpu_lazy_request();	184	scheduler_fpu_lazy_request();
185	#else	185	#else
186	dump_interrupted_context(istate);	186	dump_interrupted_context(istate);
187	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	187	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
188	#endif	188	#endif
189	}	189	}
190		190
191		191
192	void nop_handler(__u64 vector, istate_t *istate)	192	void nop_handler(__u64 vector, istate_t *istate)
193	{	193	{
194	}	194	}
195		195
196		196
197		197
198	/** Handle syscall. */	198	/** Handle syscall. */
199	int break_instruction(__u64 vector, istate_t *istate)	199	int break_instruction(__u64 vector, istate_t *istate)
200	{	200	{
201	/*	201	/*
202	* Move to next instruction after BREAK.	202	* Move to next instruction after BREAK.
203	*/	203	*/
204	if (istate->cr_ipsr.ri == 2) {	204	if (istate->cr_ipsr.ri == 2) {
205	istate->cr_ipsr.ri = 0;	205	istate->cr_ipsr.ri = 0;
206	istate->cr_iip += 16;	206	istate->cr_iip += 16;
207	} else {	207	} else {
208	istate->cr_ipsr.ri++;	208	istate->cr_ipsr.ri++;
209	}	209	}
210		210
211	if (istate->in4 < SYSCALL_END)	211	if (istate->in4 < SYSCALL_END)
212	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);	212	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
213	else	213	else
214	panic("Undefined syscall %d", istate->in4);	214	panic("Undefined syscall %d", istate->in4);
215		215
216	return -1;	216	return -1;
217	}	217	}
218		218
219	void universal_handler(__u64 vector, istate_t *istate)	219	void universal_handler(__u64 vector, istate_t *istate)
220	{	220	{
221	dump_interrupted_context(istate);	221	dump_interrupted_context(istate);
222	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	222	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
223	}	223	}
224		224
225	void external_interrupt(__u64 vector, istate_t *istate)	225	void external_interrupt(__u64 vector, istate_t *istate)
226	{	226	{
227	cr_ivr_t ivr;	227	cr_ivr_t ivr;
228		228
229	ivr.value = ivr_read();	229	ivr.value = ivr_read();
230	srlz_d();	230	srlz_d();
231		231
232	switch(ivr.vector) {	232	switch(ivr.vector) {
233	case INTERRUPT_TIMER:	233	case INTERRUPT_TIMER:
234	it_interrupt();	234	it_interrupt();
235	break;	235	break;
236	case INTERRUPT_SPURIOUS:	236	case INTERRUPT_SPURIOUS:
237	printf("cpu%d: spurious interrupt\n", CPU->id);	237	printf("cpu%d: spurious interrupt\n", CPU->id);
238	break;	238	break;
239	default:	239	default:
240	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);	240	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
241	break;	241	break;
242	}	242	}
243	}	243	}
244		244
245	/* Reregister irq to be IPC-ready */	245	/* Reregister irq to be IPC-ready */
246	void irq_ipc_bind_arch(__native irq)	246	void irq_ipc_bind_arch(__native irq)
247	{	247	{
248	panic("not implemented\n");	248	panic("not implemented\n");
249	/* TODO */	249	/* TODO */
250	}	250	}
251		251

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(root)/tags/0.1.1/kernel/arch/ia64/src/interrupt.c – Rev 1963 → 1968