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1 | ## General configuration directives |
1 | ## General configuration directives |
2 | 2 | ||
3 | # Architecture |
3 | # Architecture |
4 | @ "ia32" Intel IA-32 |
4 | @ "ia32" Intel IA-32 |
5 | @ "amd64" AMD64/Intel EM64T |
5 | @ "amd64" AMD64/Intel EM64T |
6 | @ "ia64" Intel IA-64 |
6 | @ "ia64" Intel IA-64 |
7 | @ "mips32" MIPS 32-bit |
7 | @ "mips32" MIPS 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
9 | @ "sparc64" Sun UltraSPARC |
9 | @ "sparc64" Sun UltraSPARC |
10 | ! ARCH (choice) |
10 | ! ARCH (choice) |
11 | 11 | ||
12 | # IA32 Compiler |
12 | # IA32 Compiler |
13 | @ "cross" Cross-compiler |
13 | @ "cross" Cross-compiler |
14 | @ "native" Native |
14 | @ "native" Native |
15 | ! [ARCH=ia32] IA32_COMPILER (choice) |
15 | ! [ARCH=ia32] IA32_COMPILER (choice) |
16 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
16 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
17 | 17 | ||
18 | # AMD64 Compiler |
18 | # AMD64 Compiler |
19 | @ "cross" Cross-compiler |
19 | @ "cross" Cross-compiler |
20 | @ "native" Native |
20 | @ "native" Native |
21 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
21 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
22 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
22 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
23 | 23 | ||
24 | # Compiler |
24 | # Compiler |
25 | @ "cross" Cross-compiler |
25 | @ "cross" Cross-compiler |
26 | @ "native" Native |
26 | @ "native" Native |
27 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
27 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
28 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
28 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
29 | 29 | ||
30 | 30 | ||
31 | # CPU type |
31 | # CPU type |
32 | @ "pentium4" Pentium 4 |
32 | @ "pentium4" Pentium 4 |
33 | @ "pentium3" Pentium 3 |
33 | @ "pentium3" Pentium 3 |
34 | @ "athlon-xp" Athlon XP |
34 | @ "athlon-xp" Athlon XP |
35 | @ "athlon-mp" Athlon MP |
35 | @ "athlon-mp" Athlon MP |
36 | @ "prescott" Prescott |
36 | @ "prescott" Prescott |
37 | ! [ARCH=ia32] IA32_CPU (choice) |
37 | ! [ARCH=ia32] IA32_CPU (choice) |
38 | 38 | ||
39 | # Support for SMP |
- | |
40 | ! CONFIG_SMP (y/n) |
- | |
41 | - | ||
42 | # Improved support for hyperthreading |
- | |
43 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
- | |
44 | - | ||
45 | # Lazy FPU context switching |
- | |
46 | ! CONFIG_FPU_LAZY (y/n) |
- | |
47 | - | ||
48 | # MIPS Machine Type |
39 | # MIPS Machine Type |
49 | @ "msim" MSIM Simulator |
40 | @ "msim" MSIM Simulator |
50 | @ "msim4kc" MSIM Simulator with 4kc instruction set |
- | |
51 | @ "simics" Virtutech Simics simulator |
41 | @ "simics" Virtutech Simics simulator |
52 | @ "lgxemul" GXEmul Little Endian |
42 | @ "lgxemul" GXEmul Little Endian |
53 | @ "bgxemul" GXEmul Big Endian |
43 | @ "bgxemul" GXEmul Big Endian |
54 | @ "indy" SGI Indy |
44 | @ "indy" SGI Indy |
55 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
45 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
56 | 46 | ||
- | 47 | # Support for SMP |
|
- | 48 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
|
- | 49 | ||
- | 50 | # Improved support for hyperthreading |
|
- | 51 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
|
- | 52 | ||
- | 53 | # Lazy FPU context switching |
|
- | 54 | ! [(ARCH=mips32&MIPS_MACHINE!=msim)|ARCH=amd64|ARCH=ia32] CONFIG_FPU_LAZY (y/n) |
|
- | 55 | ||
57 | ## Debugging configuration directives |
56 | ## Debugging configuration directives |
58 | 57 | ||
59 | # General debuging and assert checking |
58 | # General debuging and assert checking |
60 | ! CONFIG_DEBUG (y/n) |
59 | ! CONFIG_DEBUG (y/n) |
61 | 60 | ||
62 | # Deadlock detection support for spinlocks |
61 | # Deadlock detection support for spinlocks |
63 | ! [CONFIG_DEBUG=y] CONFIG_DEBUG_SPINLOCK (y/n) |
62 | ! [CONFIG_DEBUG=y] CONFIG_DEBUG_SPINLOCK (y/n) |
64 | 63 | ||
65 | ## Run-time configuration directives |
64 | ## Run-time configuration directives |
66 | 65 | ||
67 | # Enable user space support |
66 | # Enable user space support |
68 | ! CONFIG_USERSPACE (n/y) |
67 | ! CONFIG_USERSPACE (n/y) |
69 | 68 | ||
70 | # Kernel test type |
69 | # Kernel test type |
71 | @ "" No test |
70 | @ "" No test |
72 | @ "synch/rwlock1" Read write test 1 |
71 | @ "synch/rwlock1" Read write test 1 |
73 | @ "synch/rwlock2" Read write test 2 |
72 | @ "synch/rwlock2" Read write test 2 |
74 | @ "synch/rwlock3" Read write test 3 |
73 | @ "synch/rwlock3" Read write test 3 |
75 | @ "synch/rwlock4" Read write test 4 |
74 | @ "synch/rwlock4" Read write test 4 |
76 | @ "synch/rwlock5" Read write test 5 |
75 | @ "synch/rwlock5" Read write test 5 |
77 | @ "synch/semaphore1" Semaphore test 1 |
76 | @ "synch/semaphore1" Semaphore test 1 |
78 | @ "synch/semaphore2" Sempahore test 2 |
77 | @ "synch/semaphore2" Sempahore test 2 |
79 | @ [ARCH=ia32|ARCH=amd64] "fpu/fpu1" Intel fpu test 1 |
78 | @ [ARCH=ia32|ARCH=amd64] "fpu/fpu1" Intel fpu test 1 |
80 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
79 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
81 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=msim4kc] "fpu/mips1" Mips FPU test 1 |
80 | @ [ARCH=mips32&MIPS_MACHINE!=msim] "fpu/mips1" Mips FPU test 1 |
82 | @ "print/print1" Printf test 1 |
81 | @ "print/print1" Printf test 1 |
83 | @ "thread/trhead1" Thread test 1 |
82 | @ "thread/trhead1" Thread test 1 |
84 | @ "mm/mapping1" Mapping test 1 |
83 | @ "mm/mapping1" Mapping test 1 |
85 | ! CONFIG_TEST (choice) |
84 | ! CONFIG_TEST (choice) |
86 | 85 |