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| 1 | ## General configuration directives |
1 | ## General configuration directives |
| 2 | 2 | ||
| 3 | # Architecture |
3 | # Architecture |
| 4 | @ "ia32" Intel IA-32 |
4 | @ "ia32" Intel IA-32 |
| 5 | @ "amd64" AMD64/Intel EM64T |
5 | @ "amd64" AMD64/Intel EM64T |
| 6 | @ "ia64" Intel IA-64 |
6 | @ "ia64" Intel IA-64 |
| 7 | @ "mips32" MIPS 32-bit |
7 | @ "mips32" MIPS 32-bit |
| 8 | @ "ppc32" PowerPC 32-bit |
8 | @ "ppc32" PowerPC 32-bit |
| - | 9 | @ "ppc64" PowerPC 64-bit |
|
| 9 | @ "sparc64" Sun UltraSPARC |
10 | @ "sparc64" Sun UltraSPARC |
| 10 | ! ARCH (choice) |
11 | ! ARCH (choice) |
| 11 | 12 | ||
| 12 | # IA32 Compiler |
13 | # IA32 Compiler |
| 13 | @ "cross" Cross-compiler |
14 | @ "cross" Cross-compiler |
| 14 | @ "native" Native |
15 | @ "native" Native |
| 15 | ! [ARCH=ia32] IA32_COMPILER (choice) |
16 | ! [ARCH=ia32] IA32_COMPILER (choice) |
| 16 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
17 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER |
| 17 | 18 | ||
| 18 | # AMD64 Compiler |
19 | # AMD64 Compiler |
| 19 | @ "cross" Cross-compiler |
20 | @ "cross" Cross-compiler |
| 20 | @ "native" Native |
21 | @ "native" Native |
| 21 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
22 | ! [ARCH=amd64] AMD64_COMPILER (choice) |
| 22 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
23 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER |
| 23 | 24 | ||
| 24 | # Compiler |
25 | # Compiler |
| 25 | @ "cross" Cross-compiler |
26 | @ "cross" Cross-compiler |
| 26 | @ "native" Native |
27 | @ "native" Native |
| 27 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
28 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice) |
| 28 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
29 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER |
| 29 | 30 | ||
| 30 | 31 | ||
| 31 | # CPU type |
32 | # CPU type |
| 32 | @ "pentium4" Pentium 4 |
33 | @ "pentium4" Pentium 4 |
| 33 | @ "pentium3" Pentium 3 |
34 | @ "pentium3" Pentium 3 |
| 34 | @ "athlon-xp" Athlon XP |
35 | @ "athlon-xp" Athlon XP |
| 35 | @ "athlon-mp" Athlon MP |
36 | @ "athlon-mp" Athlon MP |
| 36 | @ "prescott" Prescott |
37 | @ "prescott" Prescott |
| 37 | ! [ARCH=ia32] IA32_CPU (choice) |
38 | ! [ARCH=ia32] IA32_CPU (choice) |
| 38 | 39 | ||
| 39 | # MIPS Machine Type |
40 | # MIPS Machine Type |
| 40 | @ "msim" MSIM Simulator |
41 | @ "msim" MSIM Simulator |
| 41 | @ "simics" Virtutech Simics simulator |
42 | @ "simics" Virtutech Simics simulator |
| 42 | @ "lgxemul" GXEmul Little Endian |
43 | @ "lgxemul" GXEmul Little Endian |
| 43 | @ "bgxemul" GXEmul Big Endian |
44 | @ "bgxemul" GXEmul Big Endian |
| 44 | @ "indy" SGI Indy |
45 | @ "indy" SGI Indy |
| 45 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
46 | ! [ARCH=mips32] MIPS_MACHINE (choice) |
| 46 | 47 | ||
| 47 | # Framebuffer support |
48 | # Framebuffer support |
| 48 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)] CONFIG_FB (y/n) |
49 | ! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)] CONFIG_FB (y/n) |
| 49 | 50 | ||
| 50 | # Support for SMP |
51 | # Support for SMP |
| 51 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
52 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n) |
| 52 | 53 | ||
| 53 | # Improved support for hyperthreading |
54 | # Improved support for hyperthreading |
| 54 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
55 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n) |
| 55 | 56 | ||
| 56 | # Simics BIOS AP boot fix |
57 | # Simics BIOS AP boot fix |
| 57 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
58 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
| 58 | 59 | ||
| 59 | # Lazy FPU context switching |
60 | # Lazy FPU context switching |
| 60 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
61 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n) |
| 61 | 62 | ||
| 62 | # Power off on halt |
63 | # Power off on halt |
| 63 | ! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
64 | ! [ARCH=ppc32] CONFIG_POWEROFF (y/n) |
| 64 | 65 | ||
| 65 | ## Debugging configuration directives |
66 | ## Debugging configuration directives |
| 66 | 67 | ||
| 67 | # General debuging and assert checking |
68 | # General debuging and assert checking |
| 68 | ! CONFIG_DEBUG (y/n) |
69 | ! CONFIG_DEBUG (y/n) |
| 69 | 70 | ||
| 70 | # Deadlock detection support for spinlocks |
71 | # Deadlock detection support for spinlocks |
| 71 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
72 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
| 72 | 73 | ||
| 73 | # Watchpoint on rewriting AS with zero |
74 | # Watchpoint on rewriting AS with zero |
| 74 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
75 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
| 75 | 76 | ||
| 76 | # Save all interrupt registers |
77 | # Save all interrupt registers |
| 77 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n) |
78 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n) |
| 78 | 79 | ||
| 79 | ## Run-time configuration directives |
80 | ## Run-time configuration directives |
| 80 | 81 | ||
| 81 | # Kernel test type |
82 | # Kernel test type |
| 82 | @ "" No test |
83 | @ "" No test |
| 83 | @ "atomic/atomic1" Test of atomic operations. |
84 | @ "atomic/atomic1" Test of atomic operations. |
| 84 | @ "btree/btree1" B-tree test. |
85 | @ "btree/btree1" B-tree test. |
| 85 | @ "synch/rwlock1" Read write test 1 |
86 | @ "synch/rwlock1" Read write test 1 |
| 86 | @ "synch/rwlock2" Read write test 2 |
87 | @ "synch/rwlock2" Read write test 2 |
| 87 | @ "synch/rwlock3" Read write test 3 |
88 | @ "synch/rwlock3" Read write test 3 |
| 88 | @ "synch/rwlock4" Read write test 4 |
89 | @ "synch/rwlock4" Read write test 4 |
| 89 | @ "synch/rwlock5" Read write test 5 |
90 | @ "synch/rwlock5" Read write test 5 |
| 90 | @ "synch/semaphore1" Semaphore test 1 |
91 | @ "synch/semaphore1" Semaphore test 1 |
| 91 | @ "synch/semaphore2" Sempahore test 2 |
92 | @ "synch/semaphore2" Sempahore test 2 |
| 92 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
93 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1 |
| 93 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
94 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1 |
| 94 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
95 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1 |
| 95 | @ "print/print1" Printf test 1 |
96 | @ "print/print1" Printf test 1 |
| 96 | @ "thread/thread1" Thread test 1 |
97 | @ "thread/thread1" Thread test 1 |
| 97 | @ "mm/mapping1" Mapping test 1 |
98 | @ "mm/mapping1" Mapping test 1 |
| 98 | @ "mm/falloc1" Frame Allocation test 1 |
99 | @ "mm/falloc1" Frame Allocation test 1 |
| 99 | @ "mm/falloc2" Frame Allocation test 2 |
100 | @ "mm/falloc2" Frame Allocation test 2 |
| 100 | @ "mm/slab1" SLAB test1 - No CPU-cache |
101 | @ "mm/slab1" SLAB test1 - No CPU-cache |
| 101 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
102 | @ "mm/slab2" SLAB test2 - SMP CPU cache |
| 102 | @ "fault/fault1" Write to NULL (maybe page fault) |
103 | @ "fault/fault1" Write to NULL (maybe page fault) |
| 103 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
104 | @ [ARCH=ia64] "mm/purge1" Itanium TLB purge test |
| 104 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test |
105 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test |
| 105 | ! CONFIG_TEST (choice) |
106 | ! CONFIG_TEST (choice) |
| 106 | 107 | ||