WebSVN – HelenOS-historic – Diff – /kernel/trunk/genarch/src/mm/page_pt.c


/*
 * Copyright (C) 2006 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup genarchmm
 * @{
 */
 
/**
 * @file
 * @brief   Virtual Address Translation for hierarchical 4-level page tables.
 */
 
#include <genarch/mm/page_pt.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <mm/as.h>
#include <arch/mm/page.h>
#include <arch/mm/as.h>
#include <arch/types.h>
#include <typedefs.h>
#include <arch/asm.h>
#include <memstr.h>
 
static void pt_mapping_insert(as_t *as, __address page, __address frame, int flags);
static void pt_mapping_remove(as_t *as, __address page);
static pte_t *pt_mapping_find(as_t *as, __address page);
 
page_mapping_operations_t pt_mapping_operations = {
    .mapping_insert = pt_mapping_insert,
    .mapping_remove = pt_mapping_remove,
    .mapping_find = pt_mapping_find
};
 
/** Map page to frame using hierarchical page tables.
 *
 * Map virtual address page to physical address frame
 * using flags.
 *
 * The page table must be locked and interrupts must be disabled.
 *
 * @param as Address space to wich page belongs.
 * @param page Virtual address of the page to be mapped.
 * @param frame Physical address of memory frame to which the mapping is done.
 * @param flags Flags to be used for mapping.
 */
void pt_mapping_insert(as_t *as, __address page, __address frame, int flags)
{
    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
    pte_t *newpt;
 
    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
 
    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
        newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
        memsetb((__address)newpt, PAGE_SIZE, 0);
        SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
        SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
    }
 
    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
 
    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
        newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
        memsetb((__address)newpt, PAGE_SIZE, 0);
        SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
        SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
    }
 
    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
 
    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
        newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
        memsetb((__address)newpt, PAGE_SIZE, 0);
        SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
        SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE | PAGE_WRITE);
    }
 
    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
 
    SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
    SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
}
 
/** Remove mapping of page from hierarchical page tables.
 *
 * Remove any mapping of page within address space as.
 * TLB shootdown should follow in order to make effects of
 * this call visible.
 *
 * Empty page tables except PTL0 are freed.
 *
 * The page table must be locked and interrupts must be disabled.
 *
 * @param as Address space to wich page belongs.
 * @param page Virtual address of the page to be demapped.
 */
void pt_mapping_remove(as_t *as, __address page)
{
    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
    bool empty = true;
    int i;
 
    /*
     * First, remove the mapping, if it exists.
     */
 
    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
 
    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
        return;
 
    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
 
    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
        return;
 
    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
 
    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
        return;
 
    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
 
    /* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */
    memsetb((__address) &ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
 
    /*
     * Second, free all empty tables along the way from PTL3 down to PTL0.
     */
   
    /* check PTL3 */
    for (i = 0; i < PTL3_ENTRIES; i++) {
        if (PTE_VALID(&ptl3[i])) {
            empty = false;
            break;
        }
    }
    if (empty) {
        /*
         * PTL3 is empty.
         * Release the frame and remove PTL3 pointer from preceding table.
         */
        frame_free(KA2PA((__address) ptl3));
        if (PTL2_ENTRIES)
            memsetb((__address) &ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
        else if (PTL1_ENTRIES)
            memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
        else
            memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
    } else {
        /*
         * PTL3 is not empty.
         * Therefore, there must be a path from PTL0 to PTL3 and
         * thus nothing to free in higher levels.
         */
        return;
    }
   
    /* check PTL2, empty is still true */
    if (PTL2_ENTRIES) {
        for (i = 0; i < PTL2_ENTRIES; i++) {
            if (PTE_VALID(&ptl2[i])) {
                empty = false;
                break;
            }
        }
        if (empty) {
            /*
             * PTL2 is empty.
             * Release the frame and remove PTL2 pointer from preceding table.
             */
            frame_free(KA2PA((__address) ptl2));
            if (PTL1_ENTRIES)
                memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
            else
                memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
        }
        else {
            /*
             * PTL2 is not empty.
             * Therefore, there must be a path from PTL0 to PTL2 and
             * thus nothing to free in higher levels.
             */
            return;
        }
    }
 
    /* check PTL1, empty is still true */
    if (PTL1_ENTRIES) {
        for (i = 0; i < PTL1_ENTRIES; i++) {
            if (PTE_VALID(&ptl1[i])) {
                empty = false;
                break;
            }
        }
        if (empty) {
            /*
             * PTL1 is empty.
             * Release the frame and remove PTL1 pointer from preceding table.
             */
            frame_free(KA2PA((__address) ptl1));
            memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
        }
    }
 
}
 
/** Find mapping for virtual page in hierarchical page tables.
 *
 * Find mapping for virtual page.
 *
 * The page table must be locked and interrupts must be disabled.
 *
 * @param as Address space to which page belongs.
 * @param page Virtual page.
 *
 * @return NULL if there is no such mapping; entry from PTL3 describing the mapping otherwise.
 */
pte_t *pt_mapping_find(as_t *as, __address page)
{
    pte_t *ptl0, *ptl1, *ptl2, *ptl3;
 
    ptl0 = (pte_t *) PA2KA((__address) as->page_table);
 
    if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
        return NULL;
 
    ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
 
    if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
        return NULL;
 
    ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
 
    if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
        return NULL;
 
    ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
 
    return &ptl3[PTL3_INDEX(page)];
}
 
 /** @}
 */
 
 

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/genarch/src/mm/page_pt.c @ 1670 – Rev 1702 → 1760

Rev 1702		Rev 1760
1	/*	1	/*
2	* Copyright (C) 2006 Jakub Jermar	2	* Copyright (C) 2006 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup genarchmm	29	/** @addtogroup genarchmm
30	* @{	30	* @{
31	*/	31	*/
32		32
33	/**	33	/**
34	* @file	34	* @file
35	* @brief Virtual Address Translation for hierarchical 4-level page tables.	35	* @brief Virtual Address Translation for hierarchical 4-level page tables.
36	*/	36	*/
37		37
38	#include <genarch/mm/page_pt.h>	38	#include <genarch/mm/page_pt.h>
39	#include <mm/page.h>	39	#include <mm/page.h>
40	#include <mm/frame.h>	40	#include <mm/frame.h>
41	#include <mm/as.h>	41	#include <mm/as.h>
42	#include <arch/mm/page.h>	42	#include <arch/mm/page.h>
43	#include <arch/mm/as.h>	43	#include <arch/mm/as.h>
44	#include <arch/types.h>	44	#include <arch/types.h>
45	#include <typedefs.h>	45	#include <typedefs.h>
46	#include <arch/asm.h>	46	#include <arch/asm.h>
47	#include <memstr.h>	47	#include <memstr.h>
48		48
49	static void pt_mapping_insert(as_t *as, __address page, __address frame, int flags);	49	static void pt_mapping_insert(as_t *as, __address page, __address frame, int flags);
50	static void pt_mapping_remove(as_t *as, __address page);	50	static void pt_mapping_remove(as_t *as, __address page);
51	static pte_t pt_mapping_find(as_t as, __address page);	51	static pte_t pt_mapping_find(as_t as, __address page);
52		52
53	page_mapping_operations_t pt_mapping_operations = {	53	page_mapping_operations_t pt_mapping_operations = {
54	.mapping_insert = pt_mapping_insert,	54	.mapping_insert = pt_mapping_insert,
55	.mapping_remove = pt_mapping_remove,	55	.mapping_remove = pt_mapping_remove,
56	.mapping_find = pt_mapping_find	56	.mapping_find = pt_mapping_find
57	};	57	};
58		58
59	/** Map page to frame using hierarchical page tables.	59	/** Map page to frame using hierarchical page tables.
60	*	60	*
61	* Map virtual address page to physical address frame	61	* Map virtual address page to physical address frame
62	* using flags.	62	* using flags.
63	*	63	*
64	* The page table must be locked and interrupts must be disabled.	64	* The page table must be locked and interrupts must be disabled.
65	*	65	*
66	* @param as Address space to wich page belongs.	66	* @param as Address space to wich page belongs.
67	* @param page Virtual address of the page to be mapped.	67	* @param page Virtual address of the page to be mapped.
68	* @param frame Physical address of memory frame to which the mapping is done.	68	* @param frame Physical address of memory frame to which the mapping is done.
69	* @param flags Flags to be used for mapping.	69	* @param flags Flags to be used for mapping.
70	*/	70	*/
71	void pt_mapping_insert(as_t *as, __address page, __address frame, int flags)	71	void pt_mapping_insert(as_t *as, __address page, __address frame, int flags)
72	{	72	{
73	pte_t ptl0, ptl1, ptl2, ptl3;	73	pte_t ptl0, ptl1, ptl2, ptl3;
74	__address newpt;	74	pte_t *newpt;
75		75
76	ptl0 = (pte_t *) PA2KA((__address) as->page_table);	76	ptl0 = (pte_t *) PA2KA((__address) as->page_table);
77		77
78	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {	78	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
79	newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));	79	newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
80	memsetb(newpt, PAGE_SIZE, 0);	80	memsetb((__address)newpt, PAGE_SIZE, 0);
81	SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));	81	SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
82	SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);	82	SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);
83	}	83	}
84		84
85	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));	85	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
86		86
87	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {	87	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
88	newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));	88	newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
89	memsetb(newpt, PAGE_SIZE, 0);	89	memsetb((__address)newpt, PAGE_SIZE, 0);
90	SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));	90	SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
91	SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);	91	SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);
92	}	92	}
93		93
94	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));	94	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
95		95
96	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {	96	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
97	newpt = PA2KA(PFN2ADDR(frame_alloc(ONE_FRAME, FRAME_KA)));	97	newpt = (pte_t *)frame_alloc(ONE_FRAME, FRAME_KA);
98	memsetb(newpt, PAGE_SIZE, 0);	98	memsetb((__address)newpt, PAGE_SIZE, 0);
99	SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));	99	SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
100	SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);	100	SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page), PAGE_PRESENT \| PAGE_USER \| PAGE_EXEC \| PAGE_CACHEABLE \| PAGE_WRITE);
101	}	101	}
102		102
103	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));	103	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
104		104
105	SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);	105	SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
106	SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);	106	SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags);
107	}	107	}
108		108
109	/** Remove mapping of page from hierarchical page tables.	109	/** Remove mapping of page from hierarchical page tables.
110	*	110	*
111	* Remove any mapping of page within address space as.	111	* Remove any mapping of page within address space as.
112	* TLB shootdown should follow in order to make effects of	112	* TLB shootdown should follow in order to make effects of
113	* this call visible.	113	* this call visible.
114	*	114	*
115	* Empty page tables except PTL0 are freed.	115	* Empty page tables except PTL0 are freed.
116	*	116	*
117	* The page table must be locked and interrupts must be disabled.	117	* The page table must be locked and interrupts must be disabled.
118	*	118	*
119	* @param as Address space to wich page belongs.	119	* @param as Address space to wich page belongs.
120	* @param page Virtual address of the page to be demapped.	120	* @param page Virtual address of the page to be demapped.
121	*/	121	*/
122	void pt_mapping_remove(as_t *as, __address page)	122	void pt_mapping_remove(as_t *as, __address page)
123	{	123	{
124	pte_t ptl0, ptl1, ptl2, ptl3;	124	pte_t ptl0, ptl1, ptl2, ptl3;
125	bool empty = true;	125	bool empty = true;
126	int i;	126	int i;
127		127
128	/*	128	/*
129	* First, remove the mapping, if it exists.	129	* First, remove the mapping, if it exists.
130	*/	130	*/
131		131
132	ptl0 = (pte_t *) PA2KA((__address) as->page_table);	132	ptl0 = (pte_t *) PA2KA((__address) as->page_table);
133		133
134	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)	134	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
135	return;	135	return;
136		136
137	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));	137	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
138		138
139	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)	139	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
140	return;	140	return;
141		141
142	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));	142	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
143		143
144	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)	144	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
145	return;	145	return;
146		146
147	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));	147	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
148		148
149	/* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */	149	/* Destroy the mapping. Setting to PAGE_NOT_PRESENT is not sufficient. */
150	memsetb((__address) &ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);	150	memsetb((__address) &ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
151		151
152	/*	152	/*
153	* Second, free all empty tables along the way from PTL3 down to PTL0.	153	* Second, free all empty tables along the way from PTL3 down to PTL0.
154	*/	154	*/
155		155
156	/* check PTL3 */	156	/* check PTL3 */
157	for (i = 0; i < PTL3_ENTRIES; i++) {	157	for (i = 0; i < PTL3_ENTRIES; i++) {
158	if (PTE_VALID(&ptl3[i])) {	158	if (PTE_VALID(&ptl3[i])) {
159	empty = false;	159	empty = false;
160	break;	160	break;
161	}	161	}
162	}	162	}
163	if (empty) {	163	if (empty) {
164	/*	164	/*
165	* PTL3 is empty.	165	* PTL3 is empty.
166	* Release the frame and remove PTL3 pointer from preceding table.	166	* Release the frame and remove PTL3 pointer from preceding table.
167	*/	167	*/
168	frame_free(ADDR2PFN(KA2PA((__address) ptl3)));	168	frame_free(KA2PA((__address) ptl3));
169	if (PTL2_ENTRIES)	169	if (PTL2_ENTRIES)
170	memsetb((__address) &ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);	170	memsetb((__address) &ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
171	else if (PTL1_ENTRIES)	171	else if (PTL1_ENTRIES)
172	memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);	172	memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
173	else	173	else
174	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);	174	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
175	} else {	175	} else {
176	/*	176	/*
177	* PTL3 is not empty.	177	* PTL3 is not empty.
178	* Therefore, there must be a path from PTL0 to PTL3 and	178	* Therefore, there must be a path from PTL0 to PTL3 and
179	* thus nothing to free in higher levels.	179	* thus nothing to free in higher levels.
180	*/	180	*/
181	return;	181	return;
182	}	182	}
183		183
184	/* check PTL2, empty is still true */	184	/* check PTL2, empty is still true */
185	if (PTL2_ENTRIES) {	185	if (PTL2_ENTRIES) {
186	for (i = 0; i < PTL2_ENTRIES; i++) {	186	for (i = 0; i < PTL2_ENTRIES; i++) {
187	if (PTE_VALID(&ptl2[i])) {	187	if (PTE_VALID(&ptl2[i])) {
188	empty = false;	188	empty = false;
189	break;	189	break;
190	}	190	}
191	}	191	}
192	if (empty) {	192	if (empty) {
193	/*	193	/*
194	* PTL2 is empty.	194	* PTL2 is empty.
195	* Release the frame and remove PTL2 pointer from preceding table.	195	* Release the frame and remove PTL2 pointer from preceding table.
196	*/	196	*/
197	frame_free(ADDR2PFN(KA2PA((__address) ptl2)));	197	frame_free(KA2PA((__address) ptl2));
198	if (PTL1_ENTRIES)	198	if (PTL1_ENTRIES)
199	memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);	199	memsetb((__address) &ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
200	else	200	else
201	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);	201	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
202	}	202	}
203	else {	203	else {
204	/*	204	/*
205	* PTL2 is not empty.	205	* PTL2 is not empty.
206	* Therefore, there must be a path from PTL0 to PTL2 and	206	* Therefore, there must be a path from PTL0 to PTL2 and
207	* thus nothing to free in higher levels.	207	* thus nothing to free in higher levels.
208	*/	208	*/
209	return;	209	return;
210	}	210	}
211	}	211	}
212		212
213	/* check PTL1, empty is still true */	213	/* check PTL1, empty is still true */
214	if (PTL1_ENTRIES) {	214	if (PTL1_ENTRIES) {
215	for (i = 0; i < PTL1_ENTRIES; i++) {	215	for (i = 0; i < PTL1_ENTRIES; i++) {
216	if (PTE_VALID(&ptl1[i])) {	216	if (PTE_VALID(&ptl1[i])) {
217	empty = false;	217	empty = false;
218	break;	218	break;
219	}	219	}
220	}	220	}
221	if (empty) {	221	if (empty) {
222	/*	222	/*
223	* PTL1 is empty.	223	* PTL1 is empty.
224	* Release the frame and remove PTL1 pointer from preceding table.	224	* Release the frame and remove PTL1 pointer from preceding table.
225	*/	225	*/
226	frame_free(ADDR2PFN(KA2PA((__address) ptl1)));	226	frame_free(KA2PA((__address) ptl1));
227	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);	227	memsetb((__address) &ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
228	}	228	}
229	}	229	}
230		230
231	}	231	}
232		232
233	/** Find mapping for virtual page in hierarchical page tables.	233	/** Find mapping for virtual page in hierarchical page tables.
234	*	234	*
235	* Find mapping for virtual page.	235	* Find mapping for virtual page.
236	*	236	*
237	* The page table must be locked and interrupts must be disabled.	237	* The page table must be locked and interrupts must be disabled.
238	*	238	*
239	* @param as Address space to which page belongs.	239	* @param as Address space to which page belongs.
240	* @param page Virtual page.	240	* @param page Virtual page.
241	*	241	*
242	* @return NULL if there is no such mapping; entry from PTL3 describing the mapping otherwise.	242	* @return NULL if there is no such mapping; entry from PTL3 describing the mapping otherwise.
243	*/	243	*/
244	pte_t pt_mapping_find(as_t as, __address page)	244	pte_t pt_mapping_find(as_t as, __address page)
245	{	245	{
246	pte_t ptl0, ptl1, ptl2, ptl3;	246	pte_t ptl0, ptl1, ptl2, ptl3;
247		247
248	ptl0 = (pte_t *) PA2KA((__address) as->page_table);	248	ptl0 = (pte_t *) PA2KA((__address) as->page_table);
249		249
250	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)	250	if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
251	return NULL;	251	return NULL;
252		252
253	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));	253	ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
254		254
255	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)	255	if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
256	return NULL;	256	return NULL;
257		257
258	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));	258	ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
259		259
260	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)	260	if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
261	return NULL;	261	return NULL;
262		262
263	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));	263	ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
264		264
265	return &ptl3[PTL3_INDEX(page)];	265	return &ptl3[PTL3_INDEX(page)];
266	}	266	}
267		267
268	/** @}	268	/** @}
269	*/	269	*/
270		270
271		271