WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/sparc64/src/mm/tlb.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/mm/tlb.h>
#include <mm/tlb.h>
#include <arch/mm/frame.h>
#include <arch/mm/page.h>
#include <arch/mm/mmu.h>
#include <print.h>
#include <arch/types.h>
#include <typedefs.h>
#include <config.h>
#include <arch/trap.h>
 
/** Initialize ITLB and DTLB.
 *
 * The goal of this function is to disable MMU
 * so that both TLBs can be purged and new
 * kernel 4M locked entry can be installed.
 * After TLB is initialized, MMU is enabled
 * again.
 *
 * Switching MMU off imposes the requirement for
 * the kernel to run in identity mapped environment.
 */
void tlb_arch_init(void)
{
    tlb_tag_access_reg_t tag;
    tlb_data_t data;
    frame_address_t fr;
    page_address_t pg;
 
    fr.address = config.base;
    pg.address = config.base;
   
    immu_disable();
    dmmu_disable();
   
    /*
     * For simplicity, we do identity mapping of first 4M of memory.
     * The very next change should be leaving the first 4M unmapped.
     */
    tag.value = 0;
    tag.vpn = pg.vpn;
 
    itlb_tag_access_write(tag.value);
    dtlb_tag_access_write(tag.value);
 
    data.value = 0;
    data.v = true;
    data.size = PAGESIZE_4M;
    data.pfn = fr.pfn;
    data.l = true;
    data.cp = 1;
    data.cv = 1;
    data.p = true;
    data.w = true;
    data.g = true;
 
    itlb_data_in_write(data.value);
    dtlb_data_in_write(data.value);
 
    /*
     * Register window traps can occur before MMU is enabled again.
     * This ensures that any such traps will be handled from
     * kernel identity mapped trap handler.
     */
    trap_switch_trap_table();
   
    tlb_invalidate_all();
 
    dmmu_enable();
    immu_enable();
}
 
/** Print contents of both TLBs. */
void tlb_print(void)
{
    int i;
    tlb_data_t d;
    tlb_tag_read_reg_t t;
   
    printf("I-TLB contents:\n");
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
        d.value = itlb_data_access_read(i);
        t.value = itlb_tag_read_read(i);
       
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
    }
 
    printf("D-TLB contents:\n");
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
        d.value = dtlb_data_access_read(i);
        t.value = dtlb_tag_read_read(i);
       
        printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
            i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
    }
 
}
 
/** Invalidate all unlocked ITLB and DTLB entries. */
void tlb_invalidate_all(void)
{
    int i;
    tlb_data_t d;
    tlb_tag_read_reg_t t;
 
    for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
        d.value = itlb_data_access_read(i);
        if (!d.l) {
            t.value = itlb_tag_read_read(i);
            d.v = false;
            itlb_tag_access_write(t.value);
            itlb_data_access_write(i, d.value);
        }
    }
   
    for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
        d.value = dtlb_data_access_read(i);
        if (!d.l) {
            t.value = dtlb_tag_read_read(i);
            d.v = false;
            dtlb_tag_access_write(t.value);
            dtlb_data_access_write(i, d.value);
        }
    }
   
}
 
/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
 *
 * @param asid Address Space ID.
 */
void tlb_invalidate_asid(asid_t asid)
{
    /* TODO: write asid to some Context register and encode the register in second parameter below. */
    itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
    dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
}
 
/** Invalidate all ITLB and DLTB entries for specified page in specified address space.
 *
 * @param asid Address Space ID.
 * @param page Page which to sweep out from ITLB and DTLB.
 */
void tlb_invalidate_page(asid_t asid, __address page)
{
    /* TODO: write asid to some Context register and encode the register in second parameter below. */
    itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);
    dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);
}
 

Rev 619	Rev 627
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch/mm/tlb.h>	29	#include <arch/mm/tlb.h>
30	#include <mm/tlb.h>	30	#include <mm/tlb.h>
31	#include <arch/mm/frame.h>	31	#include <arch/mm/frame.h>
32	#include <arch/mm/page.h>	32	#include <arch/mm/page.h>
33	#include <arch/mm/mmu.h>	33	#include <arch/mm/mmu.h>
34	#include <print.h>	34	#include <print.h>
35	#include <arch/types.h>	35	#include <arch/types.h>
36	#include <typedefs.h>	36	#include <typedefs.h>
37	#include <config.h>	37	#include <config.h>
-		38	#include <arch/trap.h>
38		39
39	/** Initialize ITLB and DTLB.	40	/** Initialize ITLB and DTLB.
40	*	41	*
41	* The goal of this function is to disable MMU	42	* The goal of this function is to disable MMU
42	* so that both TLBs can be purged and new	43	* so that both TLBs can be purged and new
43	* kernel 4M locked entry can be installed.	44	* kernel 4M locked entry can be installed.
44	* After TLB is initialized, MMU is enabled	45	* After TLB is initialized, MMU is enabled
45	* again.	46	* again.
-		47	*
-		48	* Switching MMU off imposes the requirement for
-		49	* the kernel to run in identity mapped environment.
46	*/	50	*/
47	void tlb_arch_init(void)	51	void tlb_arch_init(void)
48	{	52	{
49	tlb_tag_access_reg_t tag;	53	tlb_tag_access_reg_t tag;
50	tlb_data_t data;	54	tlb_data_t data;
51	frame_address_t fr;	55	frame_address_t fr;
52	page_address_t pg;	56	page_address_t pg;
53		57
54	fr.address = config.base;	58	fr.address = config.base;
55	pg.address = config.base;	59	pg.address = config.base;
56		60
57	immu_disable();	61	immu_disable();
58	dmmu_disable();	62	dmmu_disable();
59		63
60	/*	64	/*
61	* For simplicity, we do identity mapping of first 4M of memory.	65	* For simplicity, we do identity mapping of first 4M of memory.
62	* The very next change should be leaving the first 4M unmapped.	66	* The very next change should be leaving the first 4M unmapped.
63	*/	67	*/
64	tag.value = 0;	68	tag.value = 0;
65	tag.vpn = pg.vpn;	69	tag.vpn = pg.vpn;
66		70
67	itlb_tag_access_write(tag.value);	71	itlb_tag_access_write(tag.value);
68	dtlb_tag_access_write(tag.value);	72	dtlb_tag_access_write(tag.value);
69		73
70	data.value = 0;	74	data.value = 0;
71	data.v = true;	75	data.v = true;
72	data.size = PAGESIZE_4M;	76	data.size = PAGESIZE_4M;
73	data.pfn = fr.pfn;	77	data.pfn = fr.pfn;
74	data.l = true;	78	data.l = true;
75	data.cp = 1;	79	data.cp = 1;
76	data.cv = 1;	80	data.cv = 1;
77	data.p = true;	81	data.p = true;
78	data.w = true;	82	data.w = true;
79	data.g = true;	83	data.g = true;
80		84
81	itlb_data_in_write(data.value);	85	itlb_data_in_write(data.value);
82	dtlb_data_in_write(data.value);	86	dtlb_data_in_write(data.value);
83		87
-		88	/*
-		89	* Register window traps can occur before MMU is enabled again.
-		90	* This ensures that any such traps will be handled from
-		91	* kernel identity mapped trap handler.
-		92	*/
-		93	trap_switch_trap_table();
-		94
84	tlb_invalidate_all();	95	tlb_invalidate_all();
85		96
86	dmmu_enable();	97	dmmu_enable();
87	immu_enable();	98	immu_enable();
88	}	99	}
89		100
90	/** Print contents of both TLBs. */	101	/** Print contents of both TLBs. */
91	void tlb_print(void)	102	void tlb_print(void)
92	{	103	{
93	int i;	104	int i;
94	tlb_data_t d;	105	tlb_data_t d;
95	tlb_tag_read_reg_t t;	106	tlb_tag_read_reg_t t;
96		107
97	printf("I-TLB contents:\n");	108	printf("I-TLB contents:\n");
98	for (i = 0; i < ITLB_ENTRY_COUNT; i++) {	109	for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
99	d.value = itlb_data_access_read(i);	110	d.value = itlb_data_access_read(i);
100	t.value = itlb_tag_read_read(i);	111	t.value = itlb_tag_read_read(i);
101		112
102	printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",	113	printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
103	i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);	114	i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
104	}	115	}
105		116
106	printf("D-TLB contents:\n");	117	printf("D-TLB contents:\n");
107	for (i = 0; i < DTLB_ENTRY_COUNT; i++) {	118	for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
108	d.value = dtlb_data_access_read(i);	119	d.value = dtlb_data_access_read(i);
109	t.value = dtlb_tag_read_read(i);	120	t.value = dtlb_tag_read_read(i);
110		121
111	printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",	122	printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
112	i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);	123	i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
113	}	124	}
114		125
115	}	126	}
116		127
117	/** Invalidate all unlocked ITLB and DTLB entries. */	128	/** Invalidate all unlocked ITLB and DTLB entries. */
118	void tlb_invalidate_all(void)	129	void tlb_invalidate_all(void)
119	{	130	{
120	int i;	131	int i;
121	tlb_data_t d;	132	tlb_data_t d;
122	tlb_tag_read_reg_t t;	133	tlb_tag_read_reg_t t;
123		134
124	for (i = 0; i < ITLB_ENTRY_COUNT; i++) {	135	for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
125	d.value = itlb_data_access_read(i);	136	d.value = itlb_data_access_read(i);
126	if (!d.l) {	137	if (!d.l) {
127	t.value = itlb_tag_read_read(i);	138	t.value = itlb_tag_read_read(i);
128	d.v = false;	139	d.v = false;
129	itlb_tag_access_write(t.value);	140	itlb_tag_access_write(t.value);
130	itlb_data_access_write(i, d.value);	141	itlb_data_access_write(i, d.value);
131	}	142	}
132	}	143	}
133		144
134	for (i = 0; i < DTLB_ENTRY_COUNT; i++) {	145	for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
135	d.value = dtlb_data_access_read(i);	146	d.value = dtlb_data_access_read(i);
136	if (!d.l) {	147	if (!d.l) {
137	t.value = dtlb_tag_read_read(i);	148	t.value = dtlb_tag_read_read(i);
138	d.v = false;	149	d.v = false;
139	dtlb_tag_access_write(t.value);	150	dtlb_tag_access_write(t.value);
140	dtlb_data_access_write(i, d.value);	151	dtlb_data_access_write(i, d.value);
141	}	152	}
142	}	153	}
143		154
144	}	155	}
145		156
146	/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).	157	/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
147	*	158	*
148	* @param asid Address Space ID.	159	* @param asid Address Space ID.
149	*/	160	*/
150	void tlb_invalidate_asid(asid_t asid)	161	void tlb_invalidate_asid(asid_t asid)
151	{	162	{
152	/* TODO: write asid to some Context register and encode the register in second parameter below. */	163	/* TODO: write asid to some Context register and encode the register in second parameter below. */
153	itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);	164	itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
154	dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);	165	dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
155	}	166	}
156		167
157	/** Invalidate all ITLB and DLTB entries for specified page in specified address space.	168	/** Invalidate all ITLB and DLTB entries for specified page in specified address space.
158	*	169	*
159	* @param asid Address Space ID.	170	* @param asid Address Space ID.
160	* @param page Page which to sweep out from ITLB and DTLB.	171	* @param page Page which to sweep out from ITLB and DTLB.
161	*/	172	*/
162	void tlb_invalidate_page(asid_t asid, __address page)	173	void tlb_invalidate_page(asid_t asid, __address page)
163	{	174	{
164	/* TODO: write asid to some Context register and encode the register in second parameter below. */	175	/* TODO: write asid to some Context register and encode the register in second parameter below. */
165	itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);	176	itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);
166	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);	177	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page);
167	}	178	}
168		179

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/sparc64/src/mm/tlb.c @ 1780 – Rev 619 → 627