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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** |
29 | /** |
30 | * This file contains register window trap handlers. |
30 | * This file contains register window trap handlers. |
31 | */ |
31 | */ |
32 | 32 | ||
33 | #ifndef __sparc64_REGWIN_H__ |
33 | #ifndef __sparc64_REGWIN_H__ |
34 | #define __sparc64_REGWIN_H__ |
34 | #define __sparc64_REGWIN_H__ |
35 | 35 | ||
36 | #include <arch/stack.h> |
36 | #include <arch/stack.h> |
37 | 37 | ||
38 | #define TT_CLEAN_WINDOW 0x24 |
38 | #define TT_CLEAN_WINDOW 0x24 |
39 | #define TT_SPILL_0_NORMAL 0x80 |
39 | #define TT_SPILL_0_NORMAL 0x80 |
40 | #define TT_FILL_0_NORMAL 0xc0 |
40 | #define TT_FILL_0_NORMAL 0xc0 |
41 | 41 | ||
42 | #define REGWIN_HANDLER_SIZE 128 |
42 | #define REGWIN_HANDLER_SIZE 128 |
43 | 43 | ||
44 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
44 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
45 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
45 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
46 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
46 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
47 | 47 | ||
48 | /** Window Save Area offsets. */ |
48 | /** Window Save Area offsets. */ |
49 | #define L0_OFFSET 0 |
49 | #define L0_OFFSET 0 |
50 | #define L1_OFFSET 8 |
50 | #define L1_OFFSET 8 |
51 | #define L2_OFFSET 16 |
51 | #define L2_OFFSET 16 |
52 | #define L3_OFFSET 24 |
52 | #define L3_OFFSET 24 |
53 | #define L4_OFFSET 32 |
53 | #define L4_OFFSET 32 |
54 | #define L5_OFFSET 40 |
54 | #define L5_OFFSET 40 |
55 | #define L6_OFFSET 48 |
55 | #define L6_OFFSET 48 |
56 | #define L7_OFFSET 56 |
56 | #define L7_OFFSET 56 |
57 | #define I0_OFFSET 64 |
57 | #define I0_OFFSET 64 |
58 | #define I1_OFFSET 72 |
58 | #define I1_OFFSET 72 |
59 | #define I2_OFFSET 80 |
59 | #define I2_OFFSET 80 |
60 | #define I3_OFFSET 88 |
60 | #define I3_OFFSET 88 |
61 | #define I4_OFFSET 96 |
61 | #define I4_OFFSET 96 |
62 | #define I5_OFFSET 104 |
62 | #define I5_OFFSET 104 |
63 | #define I6_OFFSET 112 |
63 | #define I6_OFFSET 112 |
64 | #define I7_OFFSET 120 |
64 | #define I7_OFFSET 120 |
65 | 65 | ||
66 | #ifdef __ASM__ |
66 | #ifdef __ASM__ |
67 | .macro SPILL_NORMAL_HANDLER |
67 | .macro SPILL_NORMAL_HANDLER |
68 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
68 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
69 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
69 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
70 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
70 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
71 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
71 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
72 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
72 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
73 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
73 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
74 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
74 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
75 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
75 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
76 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
76 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
77 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
77 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
78 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
78 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
79 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
79 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
80 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
80 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
81 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
81 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
82 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
82 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
83 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
83 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
84 | saved |
84 | saved |
85 | retry |
85 | retry |
86 | .endm |
86 | .endm |
87 | 87 | ||
88 | .macro FILL_NORMAL_HANDLER |
88 | .macro FILL_NORMAL_HANDLER |
89 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
89 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
90 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
90 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
91 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
91 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
92 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
92 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
93 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
93 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
94 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
94 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
95 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
95 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
96 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
96 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
97 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
97 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
98 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
98 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
99 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
99 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
100 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
100 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
101 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
101 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
102 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
102 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
103 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
103 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
104 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
104 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
105 | restored |
105 | restored |
106 | retry |
106 | retry |
107 | .endm |
107 | .endm |
108 | 108 | ||
109 | .macro CLEAN_WINDOW_HANDLER |
109 | .macro CLEAN_WINDOW_HANDLER |
110 | rdpr %cleanwin, %l0 |
110 | rdpr %cleanwin, %l0 |
111 | add %l0, 1, %l0 |
111 | add %l0, 1, %l0 |
112 | wrpr %l0, 0, %cleanwin |
112 | wrpr %l0, 0, %cleanwin |
113 | mov %r0, %l0 |
113 | mov %r0, %l0 |
114 | mov %r0, %l1 |
114 | mov %r0, %l1 |
115 | mov %r0, %l2 |
115 | mov %r0, %l2 |
116 | mov %r0, %l3 |
116 | mov %r0, %l3 |
117 | mov %r0, %l4 |
117 | mov %r0, %l4 |
118 | mov %r0, %l5 |
118 | mov %r0, %l5 |
119 | mov %r0, %l6 |
119 | mov %r0, %l6 |
120 | mov %r0, %l7 |
120 | mov %r0, %l7 |
121 | mov %r0, %i0 |
121 | mov %r0, %o0 |
122 | mov %r0, %i1 |
122 | mov %r0, %o1 |
123 | mov %r0, %i2 |
123 | mov %r0, %o2 |
124 | mov %r0, %i3 |
124 | mov %r0, %o3 |
125 | mov %r0, %i4 |
125 | mov %r0, %o4 |
126 | mov %r0, %i5 |
126 | mov %r0, %o5 |
- | 127 | mov %r0, %o6 |
|
- | 128 | mov %r0, %o7 |
|
127 | retry |
129 | retry |
128 | .endm |
130 | .endm |
129 | #endif /* __ASM__ */ |
131 | #endif /* __ASM__ */ |
130 | 132 | ||
131 | #endif |
133 | #endif |
132 | 134 |