WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ppc32/src/mm/tlb.c


/*
 * Copyright (C) 2006 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/mm/tlb.h>
#include <arch/types.h>
#include <mm/tlb.h>
#include <mm/frame.h>
#include <mm/page.h>
#include <mm/as.h>
#include <arch.h>
#include <print.h>
#include <symtab.h>
 
 
static phte_t *phte;
 
 
/** Initialize Page Hash Table.
 *
 * Setup the Page Hash Table with no entries.
 *
 */
void tlb_arch_init(void)
{
    phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC));
    phte =(phte_t *) PA2KA((__address) physical_phte);
   
    ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
   
    memsetb((__address) phte, 1 << PHT_BITS, 0);
   
    asm volatile (
        "mtsdr1 %0\n"
        :
        : "r" ((__address) physical_phte)
    );
}
 
 
/** Try to find PTE for faulting address
 *
 * Try to find PTE for faulting address.
 * The AS->lock must be held on entry to this function.
 *
 * @param badvaddr Faulting virtual address.
 * @return         PTE on success, NULL otherwise.
 *
 */
static pte_t *find_mapping_and_check(__address badvaddr)
{
    /*
     * Check if the mapping exists in page tables.
     */
    pte_t *pte = page_mapping_find(AS, badvaddr);
    if ((pte) && (pte->p)) {
        /*
         * Mapping found in page tables.
         * Immediately succeed.
         */
        return pte;
    } else {
        /*
         * Mapping not found in page tables.
         * Resort to higher-level page fault handler.
         */
        page_table_unlock(AS, true);
        if (as_page_fault(badvaddr)) {
            /*
             * The higher-level page fault handler succeeded,
             * The mapping ought to be in place.
             */
            page_table_lock(AS, true);
            pte = page_mapping_find(AS, badvaddr);
            ASSERT((pte) && (pte->p));
            return pte;
        } else {
            page_table_lock(AS, true);
            printf("Page fault.\n");
            return NULL;
        }
       
    }
}
 
 
static void pht_refill_fail(__address badvaddr, istate_t *istate)
{
    char *symbol = "";
    char *sym2 = "";
 
    char *s = get_symtab_entry(istate->pc);
    if (s)
        symbol = s;
    s = get_symtab_entry(istate->lr);
    if (s)
        sym2 = s;
    panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
}
 
 
/** Process Instruction/Data Storage Interrupt
 *
 * @param data   True if Data Storage Interrupt.
 * @param istate Interrupted register context.
 *
 */
void pht_refill(bool data, istate_t *istate)
{
    asid_t asid;
    __address badvaddr;
    pte_t *pte;
    __u32 page;
    __u32 api;
    __u32 vsid;
    __u32 hash;
    __u32 i;
   
    if (data) {
        asm volatile (
            "mfdar %0\n"
            : "=r" (badvaddr)
        );
    } else
        badvaddr = istate->pc;
       
    spinlock_lock(&AS->lock);
    asid = AS->asid;
    spinlock_unlock(&AS->lock);
   
    page_table_lock(AS, true);
   
    pte = find_mapping_and_check(badvaddr);
    if (!pte)
        goto fail;
 
    /* Record access to PTE */
    pte->a = 1;
   
    page = (badvaddr >> 12) & 0xffff;
    api = (badvaddr >> 22) & 0x3f;
    asm volatile (
        "mfsrin %0, %1\n"
        : "=r" (vsid)
        : "r" (badvaddr)
    );
   
    /* Primary hash (xor) */
    hash = ((vsid ^ page) & 0x3ff) << 3;
   
    /* Find invalid PTE in PTEG */
    for (i = 0; i < 8; i++) {
        if (!phte[hash + i].v)
            break;
    }
   
    // TODO: Check access/change bits, secondary hash
   
    if (i == 8)
        i = page % 8;
   
    phte[hash + i].v = 1;
    phte[hash + i].vsid = vsid;
    phte[hash + i].h = 0;
    phte[hash + i].api = api;
    phte[hash + i].rpn = pte->pfn;
    phte[hash + i].r = 0;
    phte[hash + i].c = 0;
    phte[hash + i].pp = 2; // FIXME
   
    page_table_unlock(AS, true);
    return;
   
fail:
    page_table_unlock(AS, true);
    pht_refill_fail(badvaddr, istate);
}
 
 
/** Print contents of Page Hash Table. */
void tlb_print(void)
{
}
 

Rev 1269	Rev 1270
1	/*	1	/*
2	* Copyright (C) 2006 Martin Decky	2	* Copyright (C) 2006 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch/mm/tlb.h>	29	#include <arch/mm/tlb.h>
30	#include <arch/types.h>	30	#include <arch/types.h>
31	#include <mm/tlb.h>	31	#include <mm/tlb.h>
32	#include <mm/frame.h>	32	#include <mm/frame.h>
33	#include <mm/page.h>	33	#include <mm/page.h>
34	#include <mm/as.h>	34	#include <mm/as.h>
35	#include <arch.h>	35	#include <arch.h>
36	#include <print.h>	36	#include <print.h>
37	#include <symtab.h>	37	#include <symtab.h>
38		38
39		39
40	static phte_t *phte;	40	static phte_t *phte;
41		41
42		42
43	/** Initialize Page Hash Table.	43	/** Initialize Page Hash Table.
44	*	44	*
45	* Setup the Page Hash Table with no entries.	45	* Setup the Page Hash Table with no entries.
46	*	46	*
47	*/	47	*/
48	void tlb_arch_init(void)	48	void tlb_arch_init(void)
49	{	49	{
50	phte_t physical_phte = (phte_t ) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA \| FRAME_PANIC));	50	phte_t physical_phte = (phte_t ) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA \| FRAME_PANIC));
51	phte =(phte_t *) PA2KA((__address) physical_phte);	51	phte =(phte_t *) PA2KA((__address) physical_phte);
52		52
53	ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);	53	ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0);
54		54
55	memsetb((__address) phte, 1 << PHT_BITS, 0);	55	memsetb((__address) phte, 1 << PHT_BITS, 0);
56		56
57	asm volatile (	57	asm volatile (
58	"mtsdr1 %0\n"	58	"mtsdr1 %0\n"
59	:	59	:
60	: "r" ((__address) physical_phte)	60	: "r" ((__address) physical_phte)
61	);	61	);
62	}	62	}
63		63
64		64
65	/** Try to find PTE for faulting address	65	/** Try to find PTE for faulting address
66	*	66	*
67	* Try to find PTE for faulting address.	67	* Try to find PTE for faulting address.
68	* The AS->lock must be held on entry to this function.	68	* The AS->lock must be held on entry to this function.
69	*	69	*
70	* @param badvaddr Faulting virtual address.	70	* @param badvaddr Faulting virtual address.
71	* @return PTE on success, NULL otherwise.	71	* @return PTE on success, NULL otherwise.
72	*	72	*
73	*/	73	*/
74	static pte_t *find_mapping_and_check(__address badvaddr)	74	static pte_t *find_mapping_and_check(__address badvaddr)
75	{	75	{
76	/*	76	/*
77	* Check if the mapping exists in page tables.	77	* Check if the mapping exists in page tables.
78	*/	78	*/
79	pte_t *pte = page_mapping_find(AS, badvaddr);	79	pte_t *pte = page_mapping_find(AS, badvaddr);
80	if ((pte) && (pte->p)) {	80	if ((pte) && (pte->p)) {
81	/*	81	/*
82	* Mapping found in page tables.	82	* Mapping found in page tables.
83	* Immediately succeed.	83	* Immediately succeed.
84	*/	84	*/
85	return pte;	85	return pte;
86	} else {	86	} else {
87	/*	87	/*
88	* Mapping not found in page tables.	88	* Mapping not found in page tables.
89	* Resort to higher-level page fault handler.	89	* Resort to higher-level page fault handler.
90	*/	90	*/
91	page_table_unlock(AS, true);	91	page_table_unlock(AS, true);
92	if (as_page_fault(badvaddr)) {	92	if (as_page_fault(badvaddr)) {
93	/*	93	/*
94	* The higher-level page fault handler succeeded,	94	* The higher-level page fault handler succeeded,
95	* The mapping ought to be in place.	95	* The mapping ought to be in place.
96	*/	96	*/
97	page_table_lock(AS, true);	97	page_table_lock(AS, true);
98	pte = page_mapping_find(AS, badvaddr);	98	pte = page_mapping_find(AS, badvaddr);
99	ASSERT((pte) && (pte->p));	99	ASSERT((pte) && (pte->p));
100	return pte;	100	return pte;
101	} else {	101	} else {
102	page_table_lock(AS, true);	102	page_table_lock(AS, true);
103	printf("Page fault.\n");	103	printf("Page fault.\n");
104	return NULL;	104	return NULL;
105	}	105	}
106		106
107	}	107	}
108	}	108	}
109		109
110		110
111	static void pht_refill_fail(__address badvaddr, istate_t *istate)	111	static void pht_refill_fail(__address badvaddr, istate_t *istate)
112	{	112	{
113	char *symbol = "";	113	char *symbol = "";
114	char *sym2 = "";	114	char *sym2 = "";
115		115
116	char *s = get_symtab_entry(istate->pc);	116	char *s = get_symtab_entry(istate->pc);
117	if (s)	117	if (s)
118	symbol = s;	118	symbol = s;
119	s = get_symtab_entry(istate->lr);	119	s = get_symtab_entry(istate->lr);
120	if (s)	120	if (s)
121	sym2 = s;	121	sym2 = s;
122	panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);	122	panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2);
123	}	123	}
124		124
125		125
126	/** Process Instruction/Data Storage Interrupt	126	/** Process Instruction/Data Storage Interrupt
127	*	127	*
128	* @param data True if Data Storage Interrupt.	128	* @param data True if Data Storage Interrupt.
129	* @param istate Interrupted register context.	129	* @param istate Interrupted register context.
130	*	130	*
131	*/	131	*/
132	void pht_refill(bool data, istate_t *istate)	132	void pht_refill(bool data, istate_t *istate)
133	{	133	{
134	asid_t asid;	134	asid_t asid;
135	__address badvaddr;	135	__address badvaddr;
136	pte_t *pte;	136	pte_t *pte;
137	__u32 page;	137	__u32 page;
138	__u32 api;	138	__u32 api;
139	__u32 vsid;	139	__u32 vsid;
140	__u32 hash;	140	__u32 hash;
141	__u32 i;	141	__u32 i;
142		142
143	if (data) {	143	if (data) {
144	asm volatile (	144	asm volatile (
145	"mfdar %0\n"	145	"mfdar %0\n"
146	: "=r" (badvaddr)	146	: "=r" (badvaddr)
147	);	147	);
148	} else	148	} else
149	badvaddr = istate->pc;	149	badvaddr = istate->pc;
150		150
151	spinlock_lock(&AS->lock);	151	spinlock_lock(&AS->lock);
152	asid = AS->asid;	152	asid = AS->asid;
153	spinlock_unlock(&AS->lock);	153	spinlock_unlock(&AS->lock);
154		154
155	page_table_lock(AS, true);	155	page_table_lock(AS, true);
156		156
157	pte = find_mapping_and_check(badvaddr);	157	pte = find_mapping_and_check(badvaddr);
158	if (!pte)	158	if (!pte)
159	goto fail;	159	goto fail;
160		160
161	/* Record access to PTE */	161	/* Record access to PTE */
162	pte->a = 1;	162	pte->a = 1;
163		163
164	page = ADDR2PFN(badvaddr);	164	page = (badvaddr >> 12) & 0xffff;
165	api = (badvaddr >> 22) & 0x3f;	165	api = (badvaddr >> 22) & 0x3f;
166	asm volatile (	166	asm volatile (
167	"mfsrin %0, %1\n"	167	"mfsrin %0, %1\n"
168	: "=r" (vsid)	168	: "=r" (vsid)
169	: "r" (badvaddr >> 28)	169	: "r" (badvaddr)
170	);	170	);
171		171
172	/* Primary hash (xor) */	172	/* Primary hash (xor) */
173	hash = ((vsid ^ page) & 0x3ff) << 3;	173	hash = ((vsid ^ page) & 0x3ff) << 3;
174		174
175	/* Find invalid PTE in PTEG */	175	/* Find invalid PTE in PTEG */
176	for (i = 0; i < 8; i++) {	176	for (i = 0; i < 8; i++) {
177	if (!phte[hash + i].v)	177	if (!phte[hash + i].v)
178	break;	178	break;
179	}	179	}
180		180
181	// TODO: Check access/change bits, secondary hash	181	// TODO: Check access/change bits, secondary hash
182		182
183	if (i == 8)	183	if (i == 8)
184	i = page % 8;	184	i = page % 8;
185		185
186	phte[hash + i].v = 1;	186	phte[hash + i].v = 1;
187	phte[hash + i].vsid = vsid;	187	phte[hash + i].vsid = vsid;
188	phte[hash + i].h = 0;	188	phte[hash + i].h = 0;
189	phte[hash + i].api = api;	189	phte[hash + i].api = api;
190	phte[hash + i].rpn = pte->pfn;	190	phte[hash + i].rpn = pte->pfn;
191	phte[hash + i].r = 0;	191	phte[hash + i].r = 0;
192	phte[hash + i].c = 0;	192	phte[hash + i].c = 0;
193	phte[hash + i].pp = 2; // FIXME	193	phte[hash + i].pp = 2; // FIXME
194		194
195	page_table_unlock(AS, true);	195	page_table_unlock(AS, true);
196	return;	196	return;
197		197
198	fail:	198	fail:
199	page_table_unlock(AS, true);	199	page_table_unlock(AS, true);
200	pht_refill_fail(badvaddr, istate);	200	pht_refill_fail(badvaddr, istate);
201	}	201	}
202		202
203		203
204	/** Print contents of Page Hash Table. */	204	/** Print contents of Page Hash Table. */
205	void tlb_print(void)	205	void tlb_print(void)
206	{	206	{
207	}	207	}
208		208

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ppc32/src/mm/tlb.c @ 1736 – Rev 1269 → 1270