Subversion Repositories HelenOS-historic

Rev

Rev 1267 | Rev 1288 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1267 Rev 1277
1
#
1
#
2
# Copyright (C) 2005 Martin Decky
2
# Copyright (C) 2005 Martin Decky
3
# All rights reserved.
3
# All rights reserved.
4
#
4
#
5
# Redistribution and use in source and binary forms, with or without
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
6
# modification, are permitted provided that the following conditions
7
# are met:
7
# are met:
8
#
8
#
9
# - Redistributions of source code must retain the above copyright
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
15
#   derived from this software without specific prior written permission.
16
#
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
27
#
28
 
28
 
29
#include <arch/asm/regname.h>
29
#include <arch/asm/regname.h>
30
 
30
 
31
.text
31
.text
32
 
32
 
33
.global userspace_asm
33
.global userspace_asm
34
.global iret
34
.global iret
-
 
35
.global iret_syscall
35
.global memsetb
36
.global memsetb
36
.global memcpy
37
.global memcpy
37
 
38
 
38
userspace_asm:
39
userspace_asm:
39
 
40
 
40
	# r3 = uspace_uarg
41
	# r3 = uspace_uarg
41
	# r4 = stack
42
	# r4 = stack
42
	# r5 = entry
43
	# r5 = entry
43
	
44
	
44
	# disable interrupts
45
	# disable interrupts
45
 
46
 
46
	mfmsr r31
47
	mfmsr r31
47
	rlwinm r31, r31, 0, 17, 15
48
	rlwinm r31, r31, 0, 17, 15
48
	mtmsr r31
49
	mtmsr r31
49
	
50
	
50
	# set entry point
51
	# set entry point
51
	
52
	
52
	mtsrr0 r5
53
	mtsrr0 r5
53
	
54
	
54
	# set problem state, enable interrupts
55
	# set problem state, enable interrupts
55
	
56
	
56
	ori r31, r31, msr_pr
57
	ori r31, r31, msr_pr
57
	ori r31, r31, msr_ee
58
	ori r31, r31, msr_ee
58
	mtsrr1 r31
59
	mtsrr1 r31
59
	
60
	
60
	# set stack
61
	# set stack
61
	
62
	
62
	mr sp, r4
63
	mr sp, r4
63
	
64
	
64
	# jump to userspace
65
	# jump to userspace
65
	
66
	
66
	rfi
67
	rfi
67
 
68
 
68
iret:
69
iret:
-
 
70
	
-
 
71
	# disable interrupts
-
 
72
	
-
 
73
	mfmsr r31
-
 
74
	rlwinm r31, r31, 0, 17, 15
-
 
75
	mtmsr r31
-
 
76
	
69
	lwz r0, 0(sp)
77
	lwz r0, 0(sp)
70
	lwz r2, 4(sp)
78
	lwz r2, 4(sp)
71
	lwz r3, 8(sp)
79
	lwz r3, 8(sp)
72
	lwz r4, 12(sp)
80
	lwz r4, 12(sp)
73
	lwz r5, 16(sp)
81
	lwz r5, 16(sp)
74
	lwz r6, 20(sp)
82
	lwz r6, 20(sp)
75
	lwz r7, 24(sp)
83
	lwz r7, 24(sp)
76
	lwz r8, 28(sp)
84
	lwz r8, 28(sp)
77
	lwz r9, 32(sp)
85
	lwz r9, 32(sp)
78
	lwz r10, 36(sp)
86
	lwz r10, 36(sp)
79
	lwz r11, 40(sp)
87
	lwz r11, 40(sp)
80
	lwz r13, 44(sp)
88
	lwz r13, 44(sp)
81
	lwz r14, 48(sp)
89
	lwz r14, 48(sp)
82
	lwz r15, 52(sp)
90
	lwz r15, 52(sp)
83
	lwz r16, 56(sp)
91
	lwz r16, 56(sp)
84
	lwz r17, 60(sp)
92
	lwz r17, 60(sp)
85
	lwz r18, 64(sp)
93
	lwz r18, 64(sp)
86
	lwz r19, 68(sp)
94
	lwz r19, 68(sp)
87
	lwz r20, 72(sp)
95
	lwz r20, 72(sp)
88
	lwz r21, 76(sp)
96
	lwz r21, 76(sp)
89
	lwz r22, 80(sp)
97
	lwz r22, 80(sp)
90
	lwz r23, 84(sp)
98
	lwz r23, 84(sp)
91
	lwz r24, 88(sp)
99
	lwz r24, 88(sp)
92
	lwz r25, 92(sp)
100
	lwz r25, 92(sp)
93
	lwz r26, 96(sp)
101
	lwz r26, 96(sp)
94
	lwz r27, 100(sp)
102
	lwz r27, 100(sp)
95
	lwz r28, 104(sp)
103
	lwz r28, 104(sp)
96
	lwz r29, 108(sp)
104
	lwz r29, 108(sp)
97
	lwz r30, 112(sp)
105
	lwz r30, 112(sp)
98
	lwz r31, 116(sp)
106
	lwz r31, 116(sp)
99
	
107
	
100
	lwz r12, 120(sp)
108
	lwz r12, 120(sp)
101
	mtsrr0 r12
109
	mtcr r12
102
	
110
	
103
	lwz r12, 124(sp)
111
	lwz r12, 124(sp)
104
	mtsrr1 r12
112
	mtsrr0 r12
105
	
113
	
106
	lwz r12, 128(sp)
114
	lwz r12, 128(sp)
107
	mtlr r12
115
	mtsrr1 r12
108
	
116
	
109
	lwz r12, 132(sp)
117
	lwz r12, 132(sp)
110
	mtcr r12
118
	mtlr r12
111
	
119
	
112
	lwz r12, 136(sp)
120
	lwz r12, 136(sp)
113
	mtctr r12
121
	mtctr r12
114
	
122
	
115
	lwz r12, 140(sp)
123
	lwz r12, 140(sp)
116
	mtxer r12
124
	mtxer r12
-
 
125
	
-
 
126
	lwz r12, 144(sp)
-
 
127
	lwz sp, 148(sp)
-
 
128
	
-
 
129
	rfi
117
 
130
 
118
	mfsprg1 sp
131
iret_syscall:
119
	mfsprg2 r12
-
 
120
	
132
	
-
 
133
	# disable interrupts
-
 
134
	
-
 
135
	mfmsr r31
-
 
136
	rlwinm r31, r31, 0, 17, 15
-
 
137
	mtmsr r31
-
 
138
	
-
 
139
	lwz r0, 0(sp)
-
 
140
	lwz r2, 4(sp)
-
 
141
	lwz r4, 12(sp)
-
 
142
	lwz r5, 16(sp)
-
 
143
	lwz r6, 20(sp)
-
 
144
	lwz r7, 24(sp)
-
 
145
	lwz r8, 28(sp)
-
 
146
	lwz r9, 32(sp)
-
 
147
	lwz r10, 36(sp)
-
 
148
	lwz r11, 40(sp)
-
 
149
	lwz r13, 44(sp)
-
 
150
	lwz r14, 48(sp)
-
 
151
	lwz r15, 52(sp)
-
 
152
	lwz r16, 56(sp)
-
 
153
	lwz r17, 60(sp)
-
 
154
	lwz r18, 64(sp)
-
 
155
	lwz r19, 68(sp)
-
 
156
	lwz r20, 72(sp)
-
 
157
	lwz r21, 76(sp)
-
 
158
	lwz r22, 80(sp)
-
 
159
	lwz r23, 84(sp)
-
 
160
	lwz r24, 88(sp)
-
 
161
	lwz r25, 92(sp)
-
 
162
	lwz r26, 96(sp)
-
 
163
	lwz r27, 100(sp)
-
 
164
	lwz r28, 104(sp)
-
 
165
	lwz r29, 108(sp)
-
 
166
	lwz r30, 112(sp)
-
 
167
	lwz r31, 116(sp)
-
 
168
	
-
 
169
	lwz r12, 120(sp)
-
 
170
	mtcr r12
-
 
171
	
-
 
172
	lwz r12, 124(sp)
-
 
173
	mtsrr0 r12
-
 
174
	
-
 
175
	lwz r12, 128(sp)
-
 
176
	mtsrr1 r12
-
 
177
	
-
 
178
	lwz r12, 132(sp)
-
 
179
	mtlr r12
-
 
180
	
-
 
181
	lwz r12, 136(sp)
-
 
182
	mtctr r12
-
 
183
	
-
 
184
	lwz r12, 140(sp)
-
 
185
	mtxer r12
-
 
186
	
-
 
187
	lwz r12, 144(sp)
-
 
188
	lwz sp, 148(sp)
-
 
189
 
121
	rfi
190
	rfi
122
	
191
	
123
memsetb:
192
memsetb:
124
	rlwimi r5, r5, 8, 16, 23
193
	rlwimi r5, r5, 8, 16, 23
125
	rlwimi r5, r5, 16, 0, 15
194
	rlwimi r5, r5, 16, 0, 15
126
	
195
	
127
	addi r14, r3, -4
196
	addi r14, r3, -4
128
	
197
	
129
	cmplwi 0, r4, 4
198
	cmplwi 0, r4, 4
130
	blt 7f
199
	blt 7f
131
	
200
	
132
	stwu r5, 4(r14)
201
	stwu r5, 4(r14)
133
	beqlr
202
	beqlr
134
	
203
	
135
	andi. r15, r14, 3
204
	andi. r15, r14, 3
136
	add r4, r15, r4
205
	add r4, r15, r4
137
	subf r14, r15, r14
206
	subf r14, r15, r14
138
	srwi r15, r4, 2
207
	srwi r15, r4, 2
139
	mtctr r15
208
	mtctr r15
140
	
209
	
141
	bdz 6f
210
	bdz 6f
142
	
211
	
143
	1:
212
	1:
144
		stwu r5, 4(r14)
213
		stwu r5, 4(r14)
145
		bdnz 1b
214
		bdnz 1b
146
	
215
	
147
	6:
216
	6:
148
	
217
	
149
	andi. r4, r4, 3
218
	andi. r4, r4, 3
150
	
219
	
151
	7:
220
	7:
152
	
221
	
153
	cmpwi 0, r4, 0
222
	cmpwi 0, r4, 0
154
	beqlr
223
	beqlr
155
	
224
	
156
	mtctr r4
225
	mtctr r4
157
	addi r6, r6, 3
226
	addi r6, r6, 3
158
	
227
	
159
	8:
228
	8:
160
	
229
	
161
	stbu r5, 1(r14)
230
	stbu r5, 1(r14)
162
	bdnz 8b
231
	bdnz 8b
163
	
232
	
164
	blr
233
	blr
165
 
234
 
166
memcpy:
235
memcpy:
167
	srwi. r7, r5, 3
236
	srwi. r7, r5, 3
168
	addi r6, r3, -4
237
	addi r6, r3, -4
169
	addi r4, r4, -4
238
	addi r4, r4, -4
170
	beq	2f
239
	beq	2f
171
	
240
	
172
	andi. r0, r6, 3
241
	andi. r0, r6, 3
173
	mtctr r7
242
	mtctr r7
174
	bne 5f
243
	bne 5f
175
	
244
	
176
	1:
245
	1:
177
	
246
	
178
	lwz r7, 4(r4)
247
	lwz r7, 4(r4)
179
	lwzu r8, 8(r4)
248
	lwzu r8, 8(r4)
180
	stw r7, 4(r6)
249
	stw r7, 4(r6)
181
	stwu r8, 8(r6)
250
	stwu r8, 8(r6)
182
	bdnz 1b
251
	bdnz 1b
183
	
252
	
184
	andi. r5, r5, 7
253
	andi. r5, r5, 7
185
	
254
	
186
	2:
255
	2:
187
	
256
	
188
	cmplwi 0, r5, 4
257
	cmplwi 0, r5, 4
189
	blt 3f
258
	blt 3f
190
	
259
	
191
	lwzu r0, 4(r4)
260
	lwzu r0, 4(r4)
192
	addi r5, r5, -4
261
	addi r5, r5, -4
193
	stwu r0, 4(r6)
262
	stwu r0, 4(r6)
194
	
263
	
195
	3:
264
	3:
196
	
265
	
197
	cmpwi 0, r5, 0
266
	cmpwi 0, r5, 0
198
	beqlr
267
	beqlr
199
	mtctr r5
268
	mtctr r5
200
	addi r4, r4, 3
269
	addi r4, r4, 3
201
	addi r6, r6, 3
270
	addi r6, r6, 3
202
	
271
	
203
	4:
272
	4:
204
	
273
	
205
	lbzu r0, 1(r4)
274
	lbzu r0, 1(r4)
206
	stbu r0, 1(r6)
275
	stbu r0, 1(r6)
207
	bdnz 4b
276
	bdnz 4b
208
	blr
277
	blr
209
	
278
	
210
	5:
279
	5:
211
	
280
	
212
	subfic r0, r0, 4
281
	subfic r0, r0, 4
213
	mtctr r0
282
	mtctr r0
214
	
283
	
215
	6:
284
	6:
216
	
285
	
217
	lbz r7, 4(r4)
286
	lbz r7, 4(r4)
218
	addi r4, r4, 1
287
	addi r4, r4, 1
219
	stb r7, 4(r6)
288
	stb r7, 4(r6)
220
	addi r6, r6, 1
289
	addi r6, r6, 1
221
	bdnz 6b
290
	bdnz 6b
222
	subf r5, r0, r5
291
	subf r5, r0, r5
223
	rlwinm. r7, r5, 32-3, 3, 31
292
	rlwinm. r7, r5, 32-3, 3, 31
224
	beq 2b
293
	beq 2b
225
	mtctr r7
294
	mtctr r7
226
	b 1b
295
	b 1b
227
 
296