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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Martin Decky |
2 | * Copyright (C) 2005 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ppc32_ATOMIC_H__ |
29 | #ifndef __ppc32_ATOMIC_H__ |
30 | #define __ppc32_ATOMIC_H__ |
30 | #define __ppc32_ATOMIC_H__ |
31 | 31 | ||
32 | #include <arch/types.h> |
32 | #include <arch/types.h> |
33 | 33 | ||
- | 34 | #define atomic_inc_pre(x) (atomic_inc(x) - 1) |
|
- | 35 | #define atomic_dec_pre(x) (atomic_dec(x) + 1) |
|
- | 36 | ||
- | 37 | #define atomic_inc_post(x) atomic_inc(x) |
|
- | 38 | #define atomic_dec_post(x) atomic_dec(x) |
|
- | 39 | ||
34 | typedef struct { volatile __u32 count; } atomic_t; |
40 | typedef struct { volatile __u32 count; } atomic_t; |
35 | 41 | ||
36 | static inline void atomic_inc(atomic_t *val) { |
42 | static inline void atomic_inc(atomic_t *val) { |
37 | __u32 tmp; |
43 | __u32 tmp; |
38 | 44 | ||
39 | asm __volatile__ ( |
45 | asm __volatile__ ( |
40 | "1:\n" |
46 | "1:\n" |
41 | "lwarx %0, 0, %2\n" |
47 | "lwarx %0, 0, %2\n" |
42 | "addic %0, %0, 1\n" |
48 | "addic %0, %0, 1\n" |
43 | "stwcx. %0, 0, %2\n" |
49 | "stwcx. %0, 0, %2\n" |
44 | "bne- 1b" |
50 | "bne- 1b" |
45 | : "=&r" (tmp), "=m" (val->count) |
51 | : "=&r" (tmp), "=m" (val->count) |
46 | : "r" (&val->count), "m" (val->count) |
52 | : "r" (&val->count), "m" (val->count) |
47 | : "cc"); |
53 | : "cc"); |
48 | } |
54 | } |
49 | 55 | ||
50 | static inline void atomic_dec(atomic_t *val) { |
56 | static inline void atomic_dec(atomic_t *val) { |
51 | __u32 tmp; |
57 | __u32 tmp; |
52 | 58 | ||
53 | asm __volatile__( |
59 | asm __volatile__( |
54 | "1:\n" |
60 | "1:\n" |
55 | "lwarx %0, 0, %2\n" |
61 | "lwarx %0, 0, %2\n" |
56 | "addic %0, %0, -1\n" |
62 | "addic %0, %0, -1\n" |
57 | "stwcx. %0, 0, %2\n" |
63 | "stwcx. %0, 0, %2\n" |
58 | "bne- 1b" |
64 | "bne- 1b" |
59 | : "=&r" (tmp), "=m" (val->count) |
65 | : "=&r" (tmp), "=m" (val->count) |
60 | : "r" (&val->count), "m" (val->count) |
66 | : "r" (&val->count), "m" (val->count) |
61 | : "cc"); |
67 | : "cc"); |
62 | } |
68 | } |
63 | 69 | ||
64 | static inline void atomic_set(atomic_t *val, __u32 i) |
70 | static inline void atomic_set(atomic_t *val, __u32 i) |
65 | { |
71 | { |
66 | val->count = i; |
72 | val->count = i; |
67 | } |
73 | } |
68 | 74 | ||
69 | static inline __u32 atomic_get(atomic_t *val) |
75 | static inline __u32 atomic_get(atomic_t *val) |
70 | { |
76 | { |
71 | return val->count; |
77 | return val->count; |
72 | } |
78 | } |
73 | 79 | ||
74 | #endif |
80 | #endif |
75 | 81 |