WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/start.S


#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#define __ASM__
	
#include <arch/asm/regname.h>
#include <arch/mm/page.h>
#include <arch/asm/boot.h>
#include <arch/context_offset.h>
	
.text
 
.set noat
.set noreorder
.set nomacro
 
.global kernel_image_start
.global tlb_refill_entry
.global cache_error_entry
.global exception_entry
.global userspace_asm
 
# Save registers to space defined by \r
# We will change $at on the way
.macro REGISTERS_STORE r
	sw $at,EOFFSET_AT(\r)
	sw $v0,EOFFSET_V0(\r)
	sw $v1,EOFFSET_V1(\r)
	sw $a0,EOFFSET_A0(\r)
	sw $a1,EOFFSET_A1(\r)
	sw $a2,EOFFSET_A2(\r)
	sw $a3,EOFFSET_A3(\r)
	sw $t0,EOFFSET_T0(\r)
	sw $t1,EOFFSET_T1(\r)
	sw $t2,EOFFSET_T2(\r)
	sw $t3,EOFFSET_T3(\r)
	sw $t4,EOFFSET_T4(\r)
	sw $t5,EOFFSET_T5(\r)
	sw $t6,EOFFSET_T6(\r)
	sw $t7,EOFFSET_T7(\r)
	sw $t8,EOFFSET_T8(\r)
	sw $t9,EOFFSET_T9(\r)
 
	mflo $at
	sw $at, EOFFSET_LO(\r)
	mfhi $at
	sw $at, EOFFSET_HI(\r)
	
	sw $s0,EOFFSET_S0(\r)
	sw $s1,EOFFSET_S1(\r)
	sw $s2,EOFFSET_S2(\r)
	sw $s3,EOFFSET_S3(\r)
	sw $s4,EOFFSET_S4(\r)
	sw $s5,EOFFSET_S5(\r)
	sw $s6,EOFFSET_S6(\r)
	sw $s7,EOFFSET_S7(\r)
	sw $s8,EOFFSET_S8(\r)	
	sw $gp,EOFFSET_GP(\r)
	sw $ra,EOFFSET_RA(\r)
	sw $sp,EOFFSET_SP(\r)
 
	mfc0 $at, $status
	sw $at,EOFFSET_STATUS(\r)
	mfc0 $at, $epc
	sw $at,EOFFSET_EPC(\r)
.endm
 
.macro REGISTERS_LOAD r
	lw $v0,EOFFSET_V0(\r)
	lw $v1,EOFFSET_V1(\r)
	lw $a0,EOFFSET_A0(\r)
	lw $a1,EOFFSET_A1(\r)
	lw $a2,EOFFSET_A2(\r)
	lw $a3,EOFFSET_A3(\r)
	lw $t0,EOFFSET_T0(\r)
	lw $t1,EOFFSET_T1(\r)
	lw $t2,EOFFSET_T2(\r)
	lw $t3,EOFFSET_T3(\r)
	lw $t4,EOFFSET_T4(\r)
	lw $t5,EOFFSET_T5(\r)
	lw $t6,EOFFSET_T6(\r)
	lw $t7,EOFFSET_T7(\r)
	lw $t8,EOFFSET_T8(\r)
	lw $t9,EOFFSET_T9(\r)
	lw $s0,EOFFSET_S0(\r)
	lw $s1,EOFFSET_S1(\r)
	lw $s2,EOFFSET_S2(\r)
	lw $s3,EOFFSET_S3(\r)
	lw $s4,EOFFSET_S4(\r)
	lw $s5,EOFFSET_S5(\r)
	lw $s6,EOFFSET_S6(\r)
	lw $s7,EOFFSET_S7(\r)
	lw $s8,EOFFSET_S8(\r)
	lw $gp,EOFFSET_GP(\r)
	lw $ra,EOFFSET_RA(\r)
	
	lw $at,EOFFSET_LO(\r)
	mtlo $at
	lw $at,EOFFSET_HI(\r)
	mthi $at
 
	lw $at,EOFFSET_STATUS(\r)
	mtc0 $at, $status
	lw $at,EOFFSET_EPC(\r)
	mtc0 $at, $epc
	
	lw $at,EOFFSET_AT(\r)
	lw $sp,EOFFSET_SP(\r)
.endm
 
# Move kernel stack pointer address to register K0
# - if we are in user mode, load the appropriate stack
# address
.macro KERNEL_STACK_TO_K0
	# If we are in user mode
	mfc0 $k0, $status
	andi $k0, 0x10
	
	beq $k0, $0, 1f
	add $k0, $sp, 0
	
	# Move $k0 pointer to kernel stack
	lui $k0, %hi(supervisor_sp)
	ori $k0, %lo(supervisor_sp)
	# Move $k0 (superveisor_sp)
	lw $k0, 0($k0)
1:		
.endm
		
.org 0x0
tlb_refill_entry:
	j tlb_refill_handler
	nop
 
.org 0x100
cache_error_entry:
	j cache_error_handler
	nop
 
.org 0x180
norm_exception:	
	j exception_handler
	nop	
 
.org 0x200
iv_exception:	
	j exception_handler
	nop	
 
.org KA2PA(KERNEL_STARTUP_ADDRESS)
kernel_image_start:
	/* Load temporary stack */
	lui $sp, %hi(end_stack)
	ori $sp, $0, %lo(end_stack)
 
	/* Not sure about this, but might be needed for PIC code???? */
	lui $gp, 0x8000
	
	jal main_bsp
	nop
 
 
	.space TEMP_STACK_SIZE
end_stack:	
	
exception_handler:
exception_entry:
	KERNEL_STACK_TO_K0
	sub $k0, REGISTER_SPACE
	REGISTERS_STORE $k0
	add $sp, $k0, 0
 
	add $a0, $sp, 0 
	jal exception /* exception(register_space) */
	nop
 
	REGISTERS_LOAD $sp
	# The $sp is automatically restored to former value
	eret
	nop
	
tlb_refill_handler:
	KERNEL_STACK_TO_K0
	sub $k0, REGISTER_SPACE
	REGISTERS_STORE $k0
	add $sp, $k0, 0
 
	add $a0, $sp, 0 
	jal tlb_refill /* tlb_refill(register_space) */
	nop
 
	REGISTERS_LOAD $sp
 
	eret
	nop
 
cache_error_handler:
	KERNEL_STACK_TO_K0
	sub $sp, REGISTER_SPACE
	REGISTERS_STORE $sp
	add $sp, $k0, 0
 
	jal cache_error
	nop
 
	REGISTERS_LOAD $sp
 
	eret
	nop
 
userspace_asm:
	add $sp, $a0, 0
	eret
	nop
 
 

Rev 314	Rev 317
1	#	1	#
2	# Copyright (C) 2001-2004 Jakub Jermar	2	# Copyright (C) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#define __ASM__	29	#define __ASM__
30		30
31	#include <arch/asm/regname.h>	31	#include <arch/asm/regname.h>
32	#include <arch/mm/page.h>	32	#include <arch/mm/page.h>
33	#include <arch/asm/boot.h>	33	#include <arch/asm/boot.h>
34	#include <arch/context.h>	34	#include <arch/context_offset.h>
35		35
36	.text	36	.text
37		37
38	.set noat	38	.set noat
39	.set noreorder	39	.set noreorder
40	.set nomacro	40	.set nomacro
41		41
42	.global kernel_image_start	42	.global kernel_image_start
43	.global tlb_refill_entry	43	.global tlb_refill_entry
44	.global cache_error_entry	44	.global cache_error_entry
45	.global exception_entry	45	.global exception_entry
46	.global userspace_asm	46	.global userspace_asm
47		47
48	# Save registers to space defined by \r	48	# Save registers to space defined by \r
49	# We will change $at on the way	49	# We will change $at on the way
50	.macro REGISTERS_STORE r	50	.macro REGISTERS_STORE r
51	sw $at,EOFFSET_AT(\r)	51	sw $at,EOFFSET_AT(\r)
52	sw $v0,EOFFSET_V0(\r)	52	sw $v0,EOFFSET_V0(\r)
53	sw $v1,EOFFSET_V1(\r)	53	sw $v1,EOFFSET_V1(\r)
54	sw $a0,EOFFSET_A0(\r)	54	sw $a0,EOFFSET_A0(\r)
55	sw $a1,EOFFSET_A1(\r)	55	sw $a1,EOFFSET_A1(\r)
56	sw $a2,EOFFSET_A2(\r)	56	sw $a2,EOFFSET_A2(\r)
57	sw $a3,EOFFSET_A3(\r)	57	sw $a3,EOFFSET_A3(\r)
58	sw $t0,EOFFSET_A4(\r)	58	sw $t0,EOFFSET_T0(\r)
59	sw $t1,EOFFSET_T1(\r)	59	sw $t1,EOFFSET_T1(\r)
60	sw $t2,EOFFSET_T2(\r)	60	sw $t2,EOFFSET_T2(\r)
61	sw $t3,EOFFSET_T3(\r)	61	sw $t3,EOFFSET_T3(\r)
62	sw $t4,EOFFSET_T4(\r)	62	sw $t4,EOFFSET_T4(\r)
63	sw $t5,EOFFSET_T5(\r)	63	sw $t5,EOFFSET_T5(\r)
64	sw $t6,EOFFSET_T6(\r)	64	sw $t6,EOFFSET_T6(\r)
65	sw $t7,EOFFSET_T7(\r)	65	sw $t7,EOFFSET_T7(\r)
66	sw $t8,EOFFSET_T8(\r)	66	sw $t8,EOFFSET_T8(\r)
67	sw $t9,EOFFSET_T9(\r)	67	sw $t9,EOFFSET_T9(\r)
68		68
69	mflo $at	69	mflo $at
70	sw $at, EOFFSET_LO(\r)	70	sw $at, EOFFSET_LO(\r)
71	mfhi $at	71	mfhi $at
72	sw $at, EOFFSET_HI(\r)	72	sw $at, EOFFSET_HI(\r)
73		73
74	sw $s0,EOFFSET_S0(\r)	74	sw $s0,EOFFSET_S0(\r)
75	sw $s1,EOFFSET_S1(\r)	75	sw $s1,EOFFSET_S1(\r)
76	sw $s2,EOFFSET_S2(\r)	76	sw $s2,EOFFSET_S2(\r)
77	sw $s3,EOFFSET_S3(\r)	77	sw $s3,EOFFSET_S3(\r)
78	sw $s4,EOFFSET_S4(\r)	78	sw $s4,EOFFSET_S4(\r)
79	sw $s5,EOFFSET_S5(\r)	79	sw $s5,EOFFSET_S5(\r)
80	sw $s6,EOFFSET_S6(\r)	80	sw $s6,EOFFSET_S6(\r)
81	sw $s7,EOFFSET_S7(\r)	81	sw $s7,EOFFSET_S7(\r)
82	sw $s8,EOFFSET_S8(\r)	82	sw $s8,EOFFSET_S8(\r)
83	sw $gp,EOFFSET_GP(\r)	83	sw $gp,EOFFSET_GP(\r)
84	sw $ra,EOFFSET_RA(\r)	84	sw $ra,EOFFSET_RA(\r)
85	sw $sp,EOFFSET_SP(\r)	85	sw $sp,EOFFSET_SP(\r)
86		86
87	mfc0 $at, $status	87	mfc0 $at, $status
88	sw $at,EOFFSET_STATUS(\r)	88	sw $at,EOFFSET_STATUS(\r)
-		89	mfc0 $at, $epc
-		90	sw $at,EOFFSET_EPC(\r)
89	.endm	91	.endm
90		92
91	.macro REGISTERS_LOAD r	93	.macro REGISTERS_LOAD r
92	lw $v0,EOFFSET_V0(\r)	94	lw $v0,EOFFSET_V0(\r)
93	lw $v1,EOFFSET_V1(\r)	95	lw $v1,EOFFSET_V1(\r)
94	lw $a0,EOFFSET_A0(\r)	96	lw $a0,EOFFSET_A0(\r)
95	lw $a1,EOFFSET_A1(\r)	97	lw $a1,EOFFSET_A1(\r)
96	lw $a2,EOFFSET_A2(\r)	98	lw $a2,EOFFSET_A2(\r)
97	lw $a3,EOFFSET_A3(\r)	99	lw $a3,EOFFSET_A3(\r)
98	lw $t0,EOFFSET_A4(\r)	100	lw $t0,EOFFSET_T0(\r)
99	lw $t1,EOFFSET_T1(\r)	101	lw $t1,EOFFSET_T1(\r)
100	lw $t2,EOFFSET_T2(\r)	102	lw $t2,EOFFSET_T2(\r)
101	lw $t3,EOFFSET_T3(\r)	103	lw $t3,EOFFSET_T3(\r)
102	lw $t4,EOFFSET_T4(\r)	104	lw $t4,EOFFSET_T4(\r)
103	lw $t5,EOFFSET_T5(\r)	105	lw $t5,EOFFSET_T5(\r)
104	lw $t6,EOFFSET_T6(\r)	106	lw $t6,EOFFSET_T6(\r)
105	lw $t7,EOFFSET_T7(\r)	107	lw $t7,EOFFSET_T7(\r)
106	lw $t8,EOFFSET_T8(\r)	108	lw $t8,EOFFSET_T8(\r)
107	lw $t9,EOFFSET_T9(\r)	109	lw $t9,EOFFSET_T9(\r)
108	lw $s0,EOFFSET_S0(\r)	110	lw $s0,EOFFSET_S0(\r)
109	lw $s1,EOFFSET_S1(\r)	111	lw $s1,EOFFSET_S1(\r)
110	lw $s2,EOFFSET_S2(\r)	112	lw $s2,EOFFSET_S2(\r)
111	lw $s3,EOFFSET_S3(\r)	113	lw $s3,EOFFSET_S3(\r)
112	lw $s4,EOFFSET_S4(\r)	114	lw $s4,EOFFSET_S4(\r)
113	lw $s5,EOFFSET_S5(\r)	115	lw $s5,EOFFSET_S5(\r)
114	lw $s6,EOFFSET_S6(\r)	116	lw $s6,EOFFSET_S6(\r)
115	lw $s7,EOFFSET_S7(\r)	117	lw $s7,EOFFSET_S7(\r)
116	lw $s8,EOFFSET_S8(\r)	118	lw $s8,EOFFSET_S8(\r)
117	lw $gp,EOFFSET_GP(\r)	119	lw $gp,EOFFSET_GP(\r)
118	lw $ra,EOFFSET_RA(\r)	120	lw $ra,EOFFSET_RA(\r)
119		121
120	lw $at,EOFFSET_LO(\r)	122	lw $at,EOFFSET_LO(\r)
121	mtlo $at	123	mtlo $at
122	lw $at,EOFFSET_HI(\r)	124	lw $at,EOFFSET_HI(\r)
123	mthi $at	125	mthi $at
124		126
125	lw $at,EOFFSET_STATUS(\r)	127	lw $at,EOFFSET_STATUS(\r)
126	mtc0 $at, $status	128	mtc0 $at, $status
-		129	lw $at,EOFFSET_EPC(\r)
-		130	mtc0 $at, $epc
127		131
128	lw $at,EOFFSET_AT(\r)	132	lw $at,EOFFSET_AT(\r)
129	lw $sp,EOFFSET_SP(\r)	133	lw $sp,EOFFSET_SP(\r)
130	.endm	134	.endm
131		135
132	# Move kernel stack pointer address to register K0	136	# Move kernel stack pointer address to register K0
133	# - if we are in user mode, load the appropriate stack	137	# - if we are in user mode, load the appropriate stack
134	# address	138	# address
135	.macro KERNEL_STACK_TO_K0	139	.macro KERNEL_STACK_TO_K0
136	# If we are in user mode	140	# If we are in user mode
137	mfc0 $k0, $status	141	mfc0 $k0, $status
138	andi $k0, 0x10	142	andi $k0, 0x10
139		143
140	beq $k0, $0, 1f	144	beq $k0, $0, 1f
141	add $k0, $sp, 0	145	add $k0, $sp, 0
142		146
143	# Move $k0 pointer to kernel stack	147	# Move $k0 pointer to kernel stack
144	lui $k0, %hi(supervisor_sp)	148	lui $k0, %hi(supervisor_sp)
145	ori $k0, %lo(supervisor_sp)	149	ori $k0, %lo(supervisor_sp)
146	# Move $k0 (superveisor_sp)	150	# Move $k0 (superveisor_sp)
147	lw $k0, 0($k0)	151	lw $k0, 0($k0)
148	1:	152	1:
149	.endm	153	.endm
150		154
151	.org 0x0	155	.org 0x0
152	tlb_refill_entry:	156	tlb_refill_entry:
153	j tlb_refill_handler	157	j tlb_refill_handler
154	nop	158	nop
155		159
156	.org 0x100	160	.org 0x100
157	cache_error_entry:	161	cache_error_entry:
158	j cache_error_handler	162	j cache_error_handler
159	nop	163	nop
160		164
161	.org 0x180	165	.org 0x180
162	norm_exception:	166	norm_exception:
163	j exception_handler	167	j exception_handler
164	nop	168	nop
165		169
166	.org 0x200	170	.org 0x200
167	iv_exception:	171	iv_exception:
168	j exception_handler	172	j exception_handler
169	nop	173	nop
170		174
171	.org KA2PA(KERNEL_STARTUP_ADDRESS)	175	.org KA2PA(KERNEL_STARTUP_ADDRESS)
172	kernel_image_start:	176	kernel_image_start:
173	/* Load temporary stack */	177	/* Load temporary stack */
174	lui $sp, %hi(end_stack)	178	lui $sp, %hi(end_stack)
175	ori $sp, $0, %lo(end_stack)	179	ori $sp, $0, %lo(end_stack)
176		180
177	/* Not sure about this, but might be needed for PIC code???? */	181	/* Not sure about this, but might be needed for PIC code???? */
178	lui $gp, 0x8000	182	lui $gp, 0x8000
179		183
180	jal main_bsp	184	jal main_bsp
181	nop	185	nop
182		186
183		187
184	.space TEMP_STACK_SIZE	188	.space TEMP_STACK_SIZE
185	end_stack:	189	end_stack:
186		190
187	exception_handler:	191	exception_handler:
188	exception_entry:	192	exception_entry:
189	KERNEL_STACK_TO_K0	193	KERNEL_STACK_TO_K0
190	sub $k0, REGISTER_SPACE	194	sub $k0, REGISTER_SPACE
191	REGISTERS_STORE $k0	195	REGISTERS_STORE $k0
192	add $sp, $k0, 0	196	add $sp, $k0, 0
193		197
194	jal exception	198	add $a0, $sp, 0
-		199	jal exception /* exception(register_space) */
195	nop	200	nop
196		201
197	REGISTERS_LOAD $sp	202	REGISTERS_LOAD $sp
198	# The $sp is automatically restored to former value	203	# The $sp is automatically restored to former value
199	eret	204	eret
200	nop	205	nop
201		206
202	tlb_refill_handler:	207	tlb_refill_handler:
203	KERNEL_STACK_TO_K0	208	KERNEL_STACK_TO_K0
204	sub $k0, REGISTER_SPACE	209	sub $k0, REGISTER_SPACE
205	REGISTERS_STORE $k0	210	REGISTERS_STORE $k0
206	add $sp, $k0, 0	211	add $sp, $k0, 0
207		212
208	jal tlb_refill	213	add $a0, $sp, 0
-		214	jal tlb_refill /* tlb_refill(register_space) */
209	nop	215	nop
210		216
211	REGISTERS_LOAD $sp	217	REGISTERS_LOAD $sp
212		218
213	eret	219	eret
214	nop	220	nop
215		221
216	cache_error_handler:	222	cache_error_handler:
217	KERNEL_STACK_TO_K0	223	KERNEL_STACK_TO_K0
218	sub $sp, REGISTER_SPACE	224	sub $sp, REGISTER_SPACE
219	REGISTERS_STORE $sp	225	REGISTERS_STORE $sp
220	add $sp, $k0, 0	226	add $sp, $k0, 0
221		227
222	jal cache_error	228	jal cache_error
223	nop	229	nop
224		230
225	REGISTERS_LOAD $sp	231	REGISTERS_LOAD $sp
226		232
227	eret	233	eret
228	nop	234	nop
229		235
230	userspace_asm:	236	userspace_asm:
231	add $sp, $a0, 0	237	add $sp, $a0, 0
232	eret	238	eret
233	nop	239	nop
234		240
235		241

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/start.S @ 1749 – Rev 314 → 317