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| 1 | # |
1 | # |
| 2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
| 3 | # All rights reserved. |
3 | # All rights reserved. |
| 4 | # |
4 | # |
| 5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
| 6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
| 7 | # are met: |
7 | # are met: |
| 8 | # |
8 | # |
| 9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
| 10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
| 11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
| 12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
| 13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
| 14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
| 15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
| 16 | # |
16 | # |
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| 29 | #define __ASM__ |
29 | #define __ASM__ |
| 30 | 30 | ||
| 31 | #include <arch/asm/regname.h> |
31 | #include <arch/asm/regname.h> |
| 32 | #include <arch/mm/page.h> |
32 | #include <arch/mm/page.h> |
| 33 | #include <arch/asm/boot.h> |
33 | #include <arch/asm/boot.h> |
| 34 | #include <arch/context.h> |
34 | #include <arch/context.h> |
| 35 | 35 | ||
| 36 | .text |
36 | .text |
| 37 | 37 | ||
| 38 | .set noat |
38 | .set noat |
| 39 | .set noreorder |
39 | .set noreorder |
| 40 | .set nomacro |
40 | .set nomacro |
| 41 | 41 | ||
| 42 | .global kernel_image_start |
42 | .global kernel_image_start |
| 43 | .global tlb_refill_entry |
43 | .global tlb_refill_entry |
| 44 | .global cache_error_entry |
44 | .global cache_error_entry |
| 45 | .global exception_entry |
45 | .global exception_entry |
| - | 46 | .global userspace_asm |
|
| 46 | 47 | ||
| - | 48 | # Save registers to space defined by \r |
|
| - | 49 | # We will change $at on the way |
|
| 47 | .macro REGISTERS_STORE r |
50 | .macro REGISTERS_STORE r |
| 48 | sw $at,EOFFSET_AT(\r) |
51 | sw $at,EOFFSET_AT(\r) |
| 49 | sw $v0,EOFFSET_V0(\r) |
52 | sw $v0,EOFFSET_V0(\r) |
| 50 | sw $v1,EOFFSET_V1(\r) |
53 | sw $v1,EOFFSET_V1(\r) |
| 51 | sw $a0,EOFFSET_A0(\r) |
54 | sw $a0,EOFFSET_A0(\r) |
| 52 | sw $a1,EOFFSET_A1(\r) |
55 | sw $a1,EOFFSET_A1(\r) |
| 53 | sw $a2,EOFFSET_A2(\r) |
56 | sw $a2,EOFFSET_A2(\r) |
| 54 | sw $a3,EOFFSET_A3(\r) |
57 | sw $a3,EOFFSET_A3(\r) |
| 55 | sw $t0,EOFFSET_A4(\r) |
58 | sw $t0,EOFFSET_A4(\r) |
| 56 | sw $t1,EOFFSET_T1(\r) |
59 | sw $t1,EOFFSET_T1(\r) |
| 57 | sw $t2,EOFFSET_T2(\r) |
60 | sw $t2,EOFFSET_T2(\r) |
| 58 | sw $t3,EOFFSET_T3(\r) |
61 | sw $t3,EOFFSET_T3(\r) |
| 59 | sw $t4,EOFFSET_T4(\r) |
62 | sw $t4,EOFFSET_T4(\r) |
| 60 | sw $t5,EOFFSET_T5(\r) |
63 | sw $t5,EOFFSET_T5(\r) |
| 61 | sw $t6,EOFFSET_T6(\r) |
64 | sw $t6,EOFFSET_T6(\r) |
| 62 | sw $t7,EOFFSET_T7(\r) |
65 | sw $t7,EOFFSET_T7(\r) |
| 63 | sw $t8,EOFFSET_T8(\r) |
66 | sw $t8,EOFFSET_T8(\r) |
| 64 | sw $t9,EOFFSET_T9(\r) |
67 | sw $t9,EOFFSET_T9(\r) |
| - | 68 | ||
| - | 69 | mflo $at |
|
| - | 70 | sw $at, EOFFSET_LO(\r) |
|
| - | 71 | mfhi $at |
|
| - | 72 | sw $at, EOFFSET_HI(\r) |
|
| - | 73 | ||
| 65 | sw $s0,EOFFSET_S0(\r) |
74 | sw $s0,EOFFSET_S0(\r) |
| 66 | sw $s1,EOFFSET_S1(\r) |
75 | sw $s1,EOFFSET_S1(\r) |
| 67 | sw $s2,EOFFSET_S2(\r) |
76 | sw $s2,EOFFSET_S2(\r) |
| 68 | sw $s3,EOFFSET_S3(\r) |
77 | sw $s3,EOFFSET_S3(\r) |
| 69 | sw $s4,EOFFSET_S4(\r) |
78 | sw $s4,EOFFSET_S4(\r) |
| 70 | sw $s5,EOFFSET_S5(\r) |
79 | sw $s5,EOFFSET_S5(\r) |
| 71 | sw $s6,EOFFSET_S6(\r) |
80 | sw $s6,EOFFSET_S6(\r) |
| 72 | sw $s7,EOFFSET_S7(\r) |
81 | sw $s7,EOFFSET_S7(\r) |
| 73 | sw $s8,EOFFSET_S8(\r) |
82 | sw $s8,EOFFSET_S8(\r) |
| 74 | sw $gp,EOFFSET_GP(\r) |
83 | sw $gp,EOFFSET_GP(\r) |
| 75 | sw $ra,EOFFSET_RA(\r) |
84 | sw $ra,EOFFSET_RA(\r) |
| 76 | mflo $k0 |
- | |
| 77 | mfhi $k1 |
- | |
| 78 | sw $k0,EOFFSET_LO(\r) |
85 | sw $sp,EOFFSET_SP(\r) |
| - | 86 | ||
| - | 87 | mfc0 $at, $status |
|
| 79 | sw $k1,EOFFSET_HI(\r) |
88 | sw $at,EOFFSET_STATUS(\r) |
| 80 | .endm |
89 | .endm |
| 81 | 90 | ||
| 82 | .macro REGISTERS_LOAD r |
91 | .macro REGISTERS_LOAD r |
| 83 | lw $at,EOFFSET_AT(\r) |
- | |
| 84 | lw $v0,EOFFSET_V0(\r) |
92 | lw $v0,EOFFSET_V0(\r) |
| 85 | lw $v1,EOFFSET_V1(\r) |
93 | lw $v1,EOFFSET_V1(\r) |
| 86 | lw $a0,EOFFSET_A0(\r) |
94 | lw $a0,EOFFSET_A0(\r) |
| 87 | lw $a1,EOFFSET_A1(\r) |
95 | lw $a1,EOFFSET_A1(\r) |
| 88 | lw $a2,EOFFSET_A2(\r) |
96 | lw $a2,EOFFSET_A2(\r) |
| 89 | lw $a3,EOFFSET_A3(\r) |
97 | lw $a3,EOFFSET_A3(\r) |
| 90 | lw $t0,EOFFSET_A4(\r) |
98 | lw $t0,EOFFSET_A4(\r) |
| 91 | lw $t1,EOFFSET_T1(\r) |
99 | lw $t1,EOFFSET_T1(\r) |
| 92 | lw $t2,EOFFSET_T2(\r) |
100 | lw $t2,EOFFSET_T2(\r) |
| 93 | lw $t3,EOFFSET_T3(\r) |
101 | lw $t3,EOFFSET_T3(\r) |
| 94 | lw $t4,EOFFSET_T4(\r) |
102 | lw $t4,EOFFSET_T4(\r) |
| 95 | lw $t5,EOFFSET_T5(\r) |
103 | lw $t5,EOFFSET_T5(\r) |
| 96 | lw $t6,EOFFSET_T6(\r) |
104 | lw $t6,EOFFSET_T6(\r) |
| 97 | lw $t7,EOFFSET_T7(\r) |
105 | lw $t7,EOFFSET_T7(\r) |
| 98 | lw $t8,EOFFSET_T8(\r) |
106 | lw $t8,EOFFSET_T8(\r) |
| 99 | lw $t9,EOFFSET_T9(\r) |
107 | lw $t9,EOFFSET_T9(\r) |
| 100 | lw $s0,EOFFSET_S0(\r) |
108 | lw $s0,EOFFSET_S0(\r) |
| 101 | lw $s1,EOFFSET_S1(\r) |
109 | lw $s1,EOFFSET_S1(\r) |
| 102 | lw $s2,EOFFSET_S2(\r) |
110 | lw $s2,EOFFSET_S2(\r) |
| 103 | lw $s3,EOFFSET_S3(\r) |
111 | lw $s3,EOFFSET_S3(\r) |
| 104 | lw $s4,EOFFSET_S4(\r) |
112 | lw $s4,EOFFSET_S4(\r) |
| 105 | lw $s5,EOFFSET_S5(\r) |
113 | lw $s5,EOFFSET_S5(\r) |
| 106 | lw $s6,EOFFSET_S6(\r) |
114 | lw $s6,EOFFSET_S6(\r) |
| 107 | lw $s7,EOFFSET_S7(\r) |
115 | lw $s7,EOFFSET_S7(\r) |
| 108 | lw $s8,EOFFSET_S8(\r) |
116 | lw $s8,EOFFSET_S8(\r) |
| 109 | lw $gp,EOFFSET_GP(\r) |
117 | lw $gp,EOFFSET_GP(\r) |
| 110 | lw $ra,EOFFSET_RA(\r) |
118 | lw $ra,EOFFSET_RA(\r) |
| 111 | 119 | ||
| 112 | lw $k0,EOFFSET_LO(\r) |
120 | lw $at,EOFFSET_LO(\r) |
| - | 121 | mtlo $at |
|
| 113 | lw $k1,EOFFSET_HI(\r) |
122 | lw $at,EOFFSET_HI(\r) |
| 114 | mtlo $k0 |
123 | mthi $at |
| - | 124 | ||
| - | 125 | lw $at,EOFFSET_STATUS(\r) |
|
| 115 | mthi $k1 |
126 | mtc0 $at, $status |
| - | 127 | ||
| - | 128 | lw $at,EOFFSET_AT(\r) |
|
| - | 129 | lw $sp,EOFFSET_SP(\r) |
|
| 116 | .endm |
130 | .endm |
| 117 | 131 | ||
| - | 132 | # Move kernel stack pointer address to register K0 |
|
| - | 133 | # - if we are in user mode, load the appropriate stack |
|
| - | 134 | # address |
|
| - | 135 | .macro KERNEL_STACK_TO_K0 |
|
| - | 136 | # If we are in user mode |
|
| - | 137 | mfc0 $k0, $status |
|
| - | 138 | andi $k0, 0x10 |
|
| - | 139 | ||
| - | 140 | beq $k0, $0, 1f |
|
| - | 141 | add $k0, $sp, 0 |
|
| 118 | 142 | ||
| - | 143 | # Move $k0 pointer to kernel stack |
|
| - | 144 | lui $k0, %hi(supervisor_sp) |
|
| - | 145 | ori $k0, %lo(supervisor_sp) |
|
| - | 146 | # Move $k0 (superveisor_sp) |
|
| - | 147 | lw $k0, 0($k0) |
|
| - | 148 | 1: |
|
| - | 149 | .endm |
|
| - | 150 | ||
| 119 | .org 0x0 |
151 | .org 0x0 |
| 120 | tlb_refill_entry: |
152 | tlb_refill_entry: |
| 121 | j tlb_refill_handler |
153 | j tlb_refill_handler |
| 122 | nop |
154 | nop |
| 123 | 155 | ||
| 124 | .org 0x100 |
156 | .org 0x100 |
| 125 | cache_error_entry: |
157 | cache_error_entry: |
| 126 | j cache_error_handler |
158 | j cache_error_handler |
| 127 | nop |
159 | nop |
| 128 | 160 | ||
| 129 | .org 0x180 |
161 | .org 0x180 |
| 130 | exception_entry: |
162 | norm_exception: |
| 131 | exception_handler: |
163 | j exception_handler |
| 132 | sub $sp, REGISTER_SPACE |
- | |
| 133 | REGISTERS_STORE $sp |
- | |
| 134 | - | ||
| 135 | jal exception |
- | |
| 136 | nop |
164 | nop |
| 137 | 165 | ||
| 138 | REGISTERS_LOAD $sp |
166 | .org 0x200 |
| 139 | add $sp, REGISTER_SPACE |
167 | iv_exception: |
| 140 | - | ||
| 141 | eret |
168 | j exception_handler |
| 142 | nop |
169 | nop |
| 143 | 170 | ||
| 144 | .org KA2PA(0x80000300) |
171 | .org KA2PA(KERNEL_STARTUP_ADDRESS) |
| 145 | kernel_image_start: |
172 | kernel_image_start: |
| 146 | /* Load temporary stack */ |
173 | /* Load temporary stack */ |
| 147 | lui $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) >> 16 |
174 | lui $sp, %hi(end_stack) |
| 148 | ori $sp, (TEMP_STACK_START + TEMP_STACK_SIZE) & 0xffff |
175 | ori $sp, $0, %lo(end_stack) |
| 149 | 176 | ||
| 150 | /* Not sure about this, but might be needed for PIC code???? */ |
177 | /* Not sure about this, but might be needed for PIC code???? */ |
| 151 | lui $gp, 0x8000 |
178 | lui $gp, 0x8000 |
| 152 | 179 | ||
| 153 | jal main_bsp |
180 | jal main_bsp |
| 154 | nop |
181 | nop |
| 155 | 182 | ||
| 156 | .org KA2PA(TEMP_STACK_START) |
- | |
| - | 183 | ||
| 157 | .space TEMP_STACK_SIZE |
184 | .space TEMP_STACK_SIZE |
| - | 185 | end_stack: |
|
| - | 186 | ||
| - | 187 | exception_handler: |
|
| - | 188 | exception_entry: |
|
| - | 189 | KERNEL_STACK_TO_K0 |
|
| - | 190 | sub $k0, REGISTER_SPACE |
|
| - | 191 | REGISTERS_STORE $k0 |
|
| - | 192 | add $sp, $k0, 0 |
|
| - | 193 | ||
| - | 194 | jal exception |
|
| - | 195 | nop |
|
| - | 196 | ||
| - | 197 | REGISTERS_LOAD $sp |
|
| - | 198 | # The $sp is automatically restored to former value |
|
| - | 199 | eret |
|
| - | 200 | nop |
|
| 158 | 201 | ||
| 159 | tlb_refill_handler: |
202 | tlb_refill_handler: |
| - | 203 | KERNEL_STACK_TO_K0 |
|
| 160 | sub $sp, REGISTER_SPACE |
204 | sub $k0, REGISTER_SPACE |
| 161 | REGISTERS_STORE $sp |
205 | REGISTERS_STORE $k0 |
| - | 206 | add $sp, $k0, 0 |
|
| 162 | 207 | ||
| 163 | jal tlb_refill |
208 | jal tlb_refill |
| 164 | nop |
209 | nop |
| 165 | 210 | ||
| 166 | REGISTERS_LOAD $sp |
211 | REGISTERS_LOAD $sp |
| 167 | add $sp, REGISTER_SPACE |
- | |
| 168 | 212 | ||
| 169 | eret |
213 | eret |
| 170 | nop |
214 | nop |
| 171 | 215 | ||
| 172 | cache_error_handler: |
216 | cache_error_handler: |
| - | 217 | KERNEL_STACK_TO_K0 |
|
| 173 | sub $sp, REGISTER_SPACE |
218 | sub $sp, REGISTER_SPACE |
| 174 | REGISTERS_STORE $sp |
219 | REGISTERS_STORE $sp |
| - | 220 | add $sp, $k0, 0 |
|
| 175 | 221 | ||
| 176 | jal cache_error |
222 | jal cache_error |
| 177 | nop |
223 | nop |
| 178 | 224 | ||
| 179 | REGISTERS_LOAD $sp |
225 | REGISTERS_LOAD $sp |
| 180 | add $sp, REGISTER_SPACE |
- | |
| 181 | 226 | ||
| 182 | eret |
227 | eret |
| 183 | nop |
228 | nop |
| - | 229 | ||
| - | 230 | userspace_asm: |
|
| - | 231 | .word 0x29 |
|
| - | 232 | add $sp, $a0, 0 |
|
| - | 233 | eret |
|
| - | 234 | nop |
|
| - | 235 | ||
| 184 | 236 | ||