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| 1 | # |
1 | # |
| 2 | # Copyright (C) 2003-2004 Jakub Jermar |
2 | # Copyright (C) 2003-2004 Jakub Jermar |
| 3 | # All rights reserved. |
3 | # All rights reserved. |
| 4 | # |
4 | # |
| 5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
| 6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
| 7 | # are met: |
7 | # are met: |
| 8 | # |
8 | # |
| 9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
| 10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
| 11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
| 12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
| 13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
| 14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
| 15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
| 16 | # |
16 | # |
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| 29 | #include <arch/asm/regname.h> |
29 | #include <arch/asm/regname.h> |
| 30 | #include <arch/mm/page.h> |
30 | #include <arch/mm/page.h> |
| 31 | #include <arch/asm/boot.h> |
31 | #include <arch/asm/boot.h> |
| 32 | #include <arch/context_offset.h> |
32 | #include <arch/context_offset.h> |
| 33 | 33 | ||
| 34 | .text |
34 | .text |
| 35 | 35 | ||
| 36 | .set noat |
36 | .set noat |
| 37 | .set noreorder |
37 | .set noreorder |
| 38 | .set nomacro |
38 | .set nomacro |
| 39 | 39 | ||
| 40 | .global kernel_image_start |
40 | .global kernel_image_start |
| 41 | .global tlb_refill_entry |
41 | .global tlb_refill_entry |
| 42 | .global cache_error_entry |
42 | .global cache_error_entry |
| 43 | .global exception_entry |
43 | .global exception_entry |
| 44 | .global userspace_asm |
44 | .global userspace_asm |
| 45 | 45 | ||
| 46 | # Save registers to space defined by \r |
46 | # Save registers to space defined by \r |
| 47 | # We will change $at on the way |
47 | # We will change $at on the way |
| 48 | .macro REGISTERS_STORE r |
48 | .macro REGISTERS_STORE r |
| 49 | sw $at,EOFFSET_AT(\r) |
49 | sw $at,EOFFSET_AT(\r) |
| 50 | sw $v0,EOFFSET_V0(\r) |
50 | sw $v0,EOFFSET_V0(\r) |
| 51 | sw $v1,EOFFSET_V1(\r) |
51 | sw $v1,EOFFSET_V1(\r) |
| 52 | sw $a0,EOFFSET_A0(\r) |
52 | sw $a0,EOFFSET_A0(\r) |
| 53 | sw $a1,EOFFSET_A1(\r) |
53 | sw $a1,EOFFSET_A1(\r) |
| 54 | sw $a2,EOFFSET_A2(\r) |
54 | sw $a2,EOFFSET_A2(\r) |
| 55 | sw $a3,EOFFSET_A3(\r) |
55 | sw $a3,EOFFSET_A3(\r) |
| 56 | sw $t0,EOFFSET_T0(\r) |
56 | sw $t0,EOFFSET_T0(\r) |
| 57 | sw $t1,EOFFSET_T1(\r) |
57 | sw $t1,EOFFSET_T1(\r) |
| 58 | sw $t2,EOFFSET_T2(\r) |
58 | sw $t2,EOFFSET_T2(\r) |
| 59 | sw $t3,EOFFSET_T3(\r) |
59 | sw $t3,EOFFSET_T3(\r) |
| 60 | sw $t4,EOFFSET_T4(\r) |
60 | sw $t4,EOFFSET_T4(\r) |
| 61 | sw $t5,EOFFSET_T5(\r) |
61 | sw $t5,EOFFSET_T5(\r) |
| 62 | sw $t6,EOFFSET_T6(\r) |
62 | sw $t6,EOFFSET_T6(\r) |
| 63 | sw $t7,EOFFSET_T7(\r) |
63 | sw $t7,EOFFSET_T7(\r) |
| 64 | sw $t8,EOFFSET_T8(\r) |
64 | sw $t8,EOFFSET_T8(\r) |
| 65 | sw $t9,EOFFSET_T9(\r) |
65 | sw $t9,EOFFSET_T9(\r) |
| 66 | 66 | ||
| 67 | mflo $at |
67 | mflo $at |
| 68 | sw $at, EOFFSET_LO(\r) |
68 | sw $at, EOFFSET_LO(\r) |
| 69 | mfhi $at |
69 | mfhi $at |
| 70 | sw $at, EOFFSET_HI(\r) |
70 | sw $at, EOFFSET_HI(\r) |
| 71 | 71 | ||
| - | 72 | #ifdef CONFIG_DEBUG_ALLREGS |
|
| 72 | sw $s0,EOFFSET_S0(\r) |
73 | sw $s0,EOFFSET_S0(\r) |
| 73 | sw $s1,EOFFSET_S1(\r) |
74 | sw $s1,EOFFSET_S1(\r) |
| 74 | sw $s2,EOFFSET_S2(\r) |
75 | sw $s2,EOFFSET_S2(\r) |
| 75 | sw $s3,EOFFSET_S3(\r) |
76 | sw $s3,EOFFSET_S3(\r) |
| 76 | sw $s4,EOFFSET_S4(\r) |
77 | sw $s4,EOFFSET_S4(\r) |
| 77 | sw $s5,EOFFSET_S5(\r) |
78 | sw $s5,EOFFSET_S5(\r) |
| 78 | sw $s6,EOFFSET_S6(\r) |
79 | sw $s6,EOFFSET_S6(\r) |
| 79 | sw $s7,EOFFSET_S7(\r) |
80 | sw $s7,EOFFSET_S7(\r) |
| 80 | sw $s8,EOFFSET_S8(\r) |
81 | sw $s8,EOFFSET_S8(\r) |
| - | 82 | #endif |
|
| - | 83 | ||
| 81 | sw $gp,EOFFSET_GP(\r) |
84 | sw $gp,EOFFSET_GP(\r) |
| 82 | sw $ra,EOFFSET_RA(\r) |
85 | sw $ra,EOFFSET_RA(\r) |
| 83 | sw $sp,EOFFSET_SP(\r) |
86 | sw $sp,EOFFSET_SP(\r) |
| 84 | 87 | ||
| 85 | mfc0 $at, $status |
88 | mfc0 $at, $status |
| 86 | sw $at,EOFFSET_STATUS(\r) |
89 | sw $at,EOFFSET_STATUS(\r) |
| 87 | mfc0 $at, $epc |
90 | mfc0 $at, $epc |
| 88 | sw $at,EOFFSET_EPC(\r) |
91 | sw $at,EOFFSET_EPC(\r) |
| 89 | .endm |
92 | .endm |
| 90 | 93 | ||
| 91 | .macro REGISTERS_LOAD r |
94 | .macro REGISTERS_LOAD r |
| 92 | lw $v0,EOFFSET_V0(\r) |
95 | lw $v0,EOFFSET_V0(\r) |
| 93 | lw $v1,EOFFSET_V1(\r) |
96 | lw $v1,EOFFSET_V1(\r) |
| 94 | lw $a0,EOFFSET_A0(\r) |
97 | lw $a0,EOFFSET_A0(\r) |
| 95 | lw $a1,EOFFSET_A1(\r) |
98 | lw $a1,EOFFSET_A1(\r) |
| 96 | lw $a2,EOFFSET_A2(\r) |
99 | lw $a2,EOFFSET_A2(\r) |
| 97 | lw $a3,EOFFSET_A3(\r) |
100 | lw $a3,EOFFSET_A3(\r) |
| 98 | lw $t0,EOFFSET_T0(\r) |
101 | lw $t0,EOFFSET_T0(\r) |
| 99 | lw $t1,EOFFSET_T1(\r) |
102 | lw $t1,EOFFSET_T1(\r) |
| 100 | lw $t2,EOFFSET_T2(\r) |
103 | lw $t2,EOFFSET_T2(\r) |
| 101 | lw $t3,EOFFSET_T3(\r) |
104 | lw $t3,EOFFSET_T3(\r) |
| 102 | lw $t4,EOFFSET_T4(\r) |
105 | lw $t4,EOFFSET_T4(\r) |
| 103 | lw $t5,EOFFSET_T5(\r) |
106 | lw $t5,EOFFSET_T5(\r) |
| 104 | lw $t6,EOFFSET_T6(\r) |
107 | lw $t6,EOFFSET_T6(\r) |
| 105 | lw $t7,EOFFSET_T7(\r) |
108 | lw $t7,EOFFSET_T7(\r) |
| 106 | lw $t8,EOFFSET_T8(\r) |
109 | lw $t8,EOFFSET_T8(\r) |
| 107 | lw $t9,EOFFSET_T9(\r) |
110 | lw $t9,EOFFSET_T9(\r) |
| - | 111 | ||
| - | 112 | #ifdef CONFIG_DEBUG_ALLREGS |
|
| 108 | lw $s0,EOFFSET_S0(\r) |
113 | lw $s0,EOFFSET_S0(\r) |
| 109 | lw $s1,EOFFSET_S1(\r) |
114 | lw $s1,EOFFSET_S1(\r) |
| 110 | lw $s2,EOFFSET_S2(\r) |
115 | lw $s2,EOFFSET_S2(\r) |
| 111 | lw $s3,EOFFSET_S3(\r) |
116 | lw $s3,EOFFSET_S3(\r) |
| 112 | lw $s4,EOFFSET_S4(\r) |
117 | lw $s4,EOFFSET_S4(\r) |
| 113 | lw $s5,EOFFSET_S5(\r) |
118 | lw $s5,EOFFSET_S5(\r) |
| 114 | lw $s6,EOFFSET_S6(\r) |
119 | lw $s6,EOFFSET_S6(\r) |
| 115 | lw $s7,EOFFSET_S7(\r) |
120 | lw $s7,EOFFSET_S7(\r) |
| 116 | lw $s8,EOFFSET_S8(\r) |
121 | lw $s8,EOFFSET_S8(\r) |
| - | 122 | #endif |
|
| 117 | lw $gp,EOFFSET_GP(\r) |
123 | lw $gp,EOFFSET_GP(\r) |
| 118 | lw $ra,EOFFSET_RA(\r) |
124 | lw $ra,EOFFSET_RA(\r) |
| 119 | 125 | ||
| 120 | lw $at,EOFFSET_LO(\r) |
126 | lw $at,EOFFSET_LO(\r) |
| 121 | mtlo $at |
127 | mtlo $at |
| 122 | lw $at,EOFFSET_HI(\r) |
128 | lw $at,EOFFSET_HI(\r) |
| 123 | mthi $at |
129 | mthi $at |
| 124 | 130 | ||
| 125 | lw $at,EOFFSET_STATUS(\r) |
131 | lw $at,EOFFSET_STATUS(\r) |
| 126 | mtc0 $at, $status |
132 | mtc0 $at, $status |
| 127 | lw $at,EOFFSET_EPC(\r) |
133 | lw $at,EOFFSET_EPC(\r) |
| 128 | mtc0 $at, $epc |
134 | mtc0 $at, $epc |
| 129 | 135 | ||
| 130 | lw $at,EOFFSET_AT(\r) |
136 | lw $at,EOFFSET_AT(\r) |
| 131 | lw $sp,EOFFSET_SP(\r) |
137 | lw $sp,EOFFSET_SP(\r) |
| 132 | .endm |
138 | .endm |
| 133 | 139 | ||
| 134 | # Move kernel stack pointer address to register K0 |
140 | # Move kernel stack pointer address to register K0 |
| 135 | # - if we are in user mode, load the appropriate stack |
141 | # - if we are in user mode, load the appropriate stack |
| 136 | # address |
142 | # address |
| 137 | .macro KERNEL_STACK_TO_K0 |
143 | .macro KERNEL_STACK_TO_K0 |
| 138 | # If we are in user mode |
144 | # If we are in user mode |
| 139 | mfc0 $k0, $status |
145 | mfc0 $k0, $status |
| 140 | andi $k0, 0x10 |
146 | andi $k0, 0x10 |
| 141 | 147 | ||
| 142 | beq $k0, $0, 1f |
148 | beq $k0, $0, 1f |
| 143 | add $k0, $sp, 0 |
149 | add $k0, $sp, 0 |
| 144 | 150 | ||
| 145 | # Move $k0 pointer to kernel stack |
151 | # Move $k0 pointer to kernel stack |
| 146 | lui $k0, %hi(supervisor_sp) |
152 | lui $k0, %hi(supervisor_sp) |
| 147 | ori $k0, $k0, %lo(supervisor_sp) |
153 | ori $k0, $k0, %lo(supervisor_sp) |
| 148 | # Move $k0 (superveisor_sp) |
154 | # Move $k0 (superveisor_sp) |
| 149 | lw $k0, 0($k0) |
155 | lw $k0, 0($k0) |
| 150 | 1: |
156 | 1: |
| 151 | .endm |
157 | .endm |
| 152 | 158 | ||
| 153 | .org 0x0 |
159 | .org 0x0 |
| 154 | kernel_image_start: |
160 | kernel_image_start: |
| 155 | /* Load temporary stack */ |
161 | /* Load temporary stack */ |
| 156 | lui $sp, %hi(end_stack) |
162 | lui $sp, %hi(end_stack) |
| 157 | ori $sp, $sp, %lo(end_stack) |
163 | ori $sp, $sp, %lo(end_stack) |
| 158 | 164 | ||
| 159 | /* Not sure about this, but might be needed for PIC code???? */ |
165 | /* Not sure about this, but might be needed for PIC code???? */ |
| 160 | lui $gp, 0x8000 |
166 | lui $gp, 0x8000 |
| 161 | 167 | ||
| 162 | jal main_bsp |
168 | jal main_bsp |
| 163 | nop |
169 | nop |
| 164 | 170 | ||
| 165 | 171 | ||
| 166 | .space TEMP_STACK_SIZE |
172 | .space TEMP_STACK_SIZE |
| 167 | end_stack: |
173 | end_stack: |
| 168 | 174 | ||
| 169 | tlb_refill_entry: |
175 | tlb_refill_entry: |
| 170 | j tlb_refill_handler |
176 | j tlb_refill_handler |
| 171 | nop |
177 | nop |
| 172 | 178 | ||
| 173 | cache_error_entry: |
179 | cache_error_entry: |
| 174 | j cache_error_handler |
180 | j cache_error_handler |
| 175 | nop |
181 | nop |
| 176 | 182 | ||
| 177 | exception_entry: |
183 | exception_entry: |
| 178 | j exception_handler |
184 | j exception_handler |
| 179 | nop |
185 | nop |
| 180 | 186 | ||
| 181 | 187 | ||
| 182 | 188 | ||
| 183 | exception_handler: |
189 | exception_handler: |
| 184 | KERNEL_STACK_TO_K0 |
190 | KERNEL_STACK_TO_K0 |
| 185 | sub $k0, REGISTER_SPACE |
191 | sub $k0, REGISTER_SPACE |
| 186 | REGISTERS_STORE $k0 |
192 | REGISTERS_STORE $k0 |
| 187 | add $sp, $k0, 0 |
193 | add $sp, $k0, 0 |
| 188 | 194 | ||
| 189 | add $a0, $sp, 0 |
195 | add $a0, $sp, 0 |
| 190 | jal exception /* exception(register_space) */ |
196 | jal exception /* exception(register_space) */ |
| 191 | nop |
197 | nop |
| 192 | 198 | ||
| 193 | REGISTERS_LOAD $sp |
199 | REGISTERS_LOAD $sp |
| 194 | # The $sp is automatically restored to former value |
200 | # The $sp is automatically restored to former value |
| 195 | eret |
201 | eret |
| 196 | nop |
202 | nop |
| 197 | 203 | ||
| 198 | tlb_refill_handler: |
204 | tlb_refill_handler: |
| 199 | KERNEL_STACK_TO_K0 |
205 | KERNEL_STACK_TO_K0 |
| 200 | sub $k0, REGISTER_SPACE |
206 | sub $k0, REGISTER_SPACE |
| 201 | REGISTERS_STORE $k0 |
207 | REGISTERS_STORE $k0 |
| 202 | add $sp, $k0, 0 |
208 | add $sp, $k0, 0 |
| 203 | 209 | ||
| 204 | add $a0, $sp, 0 |
210 | add $a0, $sp, 0 |
| 205 | jal tlb_refill /* tlb_refill(register_space) */ |
211 | jal tlb_refill /* tlb_refill(register_space) */ |
| 206 | nop |
212 | nop |
| 207 | 213 | ||
| 208 | REGISTERS_LOAD $sp |
214 | REGISTERS_LOAD $sp |
| 209 | 215 | ||
| 210 | eret |
216 | eret |
| 211 | nop |
217 | nop |
| 212 | 218 | ||
| 213 | cache_error_handler: |
219 | cache_error_handler: |
| 214 | KERNEL_STACK_TO_K0 |
220 | KERNEL_STACK_TO_K0 |
| 215 | sub $sp, REGISTER_SPACE |
221 | sub $sp, REGISTER_SPACE |
| 216 | REGISTERS_STORE $sp |
222 | REGISTERS_STORE $sp |
| 217 | add $sp, $k0, 0 |
223 | add $sp, $k0, 0 |
| 218 | 224 | ||
| 219 | jal cache_error |
225 | jal cache_error |
| 220 | nop |
226 | nop |
| 221 | 227 | ||
| 222 | REGISTERS_LOAD $sp |
228 | REGISTERS_LOAD $sp |
| 223 | 229 | ||
| 224 | eret |
230 | eret |
| 225 | nop |
231 | nop |
| 226 | 232 | ||
| 227 | userspace_asm: |
233 | userspace_asm: |
| 228 | add $sp, $a0, 0 |
234 | add $sp, $a0, 0 |
| 229 | add $v0, $a1, 0 |
235 | add $v0, $a1, 0 |
| 230 | eret |
236 | eret |
| 231 | nop |
237 | nop |
| 232 | 238 | ||
| 233 | 239 | ||