WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/mips32.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm.h>
#include <mm/vm.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <print.h>
 
#include <arch/interrupt.h>
#include <arch/drivers/arc.h>
#include <console/chardev.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
    interrupt_init();
 
    arc_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
 
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
    /*
     * Unmask hardware clock interrupt.
     */
    cp0_unmask_int(TIMER_IRQ);
 
    /*
     * Start hardware clock.
     */
    cp0_compare_write(cp0_compare_value + cp0_count_read());
 
    console_init();
    arc_print_memory_map();
    arc_print_devices();
}
 
void arch_post_mm_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
void userspace(void)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
   
    cp0_epc_write(UTEXT_ADDRESS);
    userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
    while (1)
        ;
}
 
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
__address supervisor_sp;
 
void before_thread_runs_arch(void)
{
    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 

Rev 575	Rev 590
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29		29
30	#include <arch.h>	30	#include <arch.h>
31	#include <arch/cp0.h>	31	#include <arch/cp0.h>
32	#include <arch/exception.h>	32	#include <arch/exception.h>
33	#include <arch/asm.h>	33	#include <arch/asm.h>
34	#include <mm/vm.h>	34	#include <mm/vm.h>
35		35
36	#include <userspace.h>	36	#include <userspace.h>
37	#include <arch/console.h>	37	#include <arch/console.h>
38	#include <memstr.h>	38	#include <memstr.h>
39	#include <proc/thread.h>	39	#include <proc/thread.h>
40	#include <print.h>	40	#include <print.h>
41		41
42	#include <arch/interrupt.h>	42	#include <arch/interrupt.h>
43	#include <arch/drivers/arc.h>	43	#include <arch/drivers/arc.h>
44	#include <console/chardev.h>	44	#include <console/chardev.h>
45		45
46	#include <arch/asm/regname.h>	46	#include <arch/asm/regname.h>
47		47
48	/* Size of the code jumping to the exception handler code	48	/* Size of the code jumping to the exception handler code
49	* - J+NOP	49	* - J+NOP
50	*/	50	*/
51	#define EXCEPTION_JUMP_SIZE 8	51	#define EXCEPTION_JUMP_SIZE 8
52		52
53	#define TLB_EXC ((char *) 0x80000000)	53	#define TLB_EXC ((char *) 0x80000000)
54	#define NORM_EXC ((char *) 0x80000180)	54	#define NORM_EXC ((char *) 0x80000180)
55	#define CACHE_EXC ((char *) 0x80000100)	55	#define CACHE_EXC ((char *) 0x80000100)
56		56
57	void arch_pre_mm_init(void)	57	void arch_pre_mm_init(void)
58	{	58	{
59	/* It is not assumed by default */	59	/* It is not assumed by default */
60	interrupts_disable();	60	interrupts_disable();
61		61
62	/* Initialize dispatch table */	62	/* Initialize dispatch table */
-		63	exception_init();
63	interrupt_init();	64	interrupt_init();
64		65
65	arc_init();	66	arc_init();
66		67
67	/* Copy the exception vectors to the right places */	68	/* Copy the exception vectors to the right places */
68	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);	69	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
69	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);	70	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
70	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);	71	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
71		72
72	/*	73	/*
73	* Switch to BEV normal level so that exception vectors point to the kernel.	74	* Switch to BEV normal level so that exception vectors point to the kernel.
74	* Clear the error level.	75	* Clear the error level.
75	*/	76	*/
76	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	77	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
77		78
78	/*	79	/*
79	* Mask all interrupts	80	* Mask all interrupts
80	*/	81	*/
81	cp0_mask_all_int();	82	cp0_mask_all_int();
82	/*	83	/*
83	* Unmask hardware clock interrupt.	84	* Unmask hardware clock interrupt.
84	*/	85	*/
85	cp0_unmask_int(TIMER_IRQ);	86	cp0_unmask_int(TIMER_IRQ);
86		87
87	/*	88	/*
88	* Start hardware clock.	89	* Start hardware clock.
89	*/	90	*/
90	cp0_compare_write(cp0_compare_value + cp0_count_read());	91	cp0_compare_write(cp0_compare_value + cp0_count_read());
91		92
92	console_init();	93	console_init();
93	arc_print_memory_map();	94	arc_print_memory_map();
94	arc_print_devices();	95	arc_print_devices();
95	}	96	}
96		97
97	void arch_post_mm_init(void)	98	void arch_post_mm_init(void)
98	{	99	{
99	}	100	}
100		101
101	void arch_pre_smp_init(void)	102	void arch_pre_smp_init(void)
102	{	103	{
103	}	104	}
104		105
105	void arch_post_smp_init(void)	106	void arch_post_smp_init(void)
106	{	107	{
107	}	108	}
108		109
109	void userspace(void)	110	void userspace(void)
110	{	111	{
111	/* EXL=1, UM=1, IE=1 */	112	/* EXL=1, UM=1, IE=1 */
112	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	113	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
113	cp0_status_um_bit \|	114	cp0_status_um_bit \|
114	cp0_status_ie_enabled_bit));	115	cp0_status_ie_enabled_bit));
115		116
116	cp0_epc_write(UTEXT_ADDRESS);	117	cp0_epc_write(UTEXT_ADDRESS);
117	userspace_asm(USTACK_ADDRESS+PAGE_SIZE);	118	userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
118	while (1)	119	while (1)
119	;	120	;
120	}	121	}
121		122
122	/* Stack pointer saved when entering user mode */	123	/* Stack pointer saved when entering user mode */
123	/* TODO: How do we do it on SMP system???? */	124	/* TODO: How do we do it on SMP system???? */
124	__address supervisor_sp;	125	__address supervisor_sp;
125		126
126	void before_thread_runs_arch(void)	127	void before_thread_runs_arch(void)
127	{	128	{
128	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	129	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
129	}	130	}
130		131

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/mips32.c @ 1780 – Rev 575 → 590