WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/mips32.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
 
#include <arch/interrupt.h>
#include <arch/drivers/arc.h>
#include <console/chardev.h>
#include <arch/debugger.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
    interrupt_init();
 
    arc_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
 
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
    /*
     * Unmask hardware clock interrupt.
     */
    cp0_unmask_int(TIMER_IRQ);
 
    /*
     * Start hardware clock.
     */
    cp0_compare_write(cp0_compare_value + cp0_count_read());
 
    console_init();
    debugger_init();
   
    /* Setup usermode */
    init.cnt = 1;
    init.tasks[0].addr = INIT_ADDRESS;
    init.tasks[0].size = INIT_SIZE;
}
 
void arch_post_mm_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section ????????
 */
__address supervisor_sp __attribute__ ((section (".text")));
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
    cp0_epc_write((__address) kernel_uarg->uspace_entry);
    userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
              (__address) kernel_uarg->uspace_uarg,
              (__address) kernel_uarg->uspace_entry);
    while (1)
        ;
}
 
void before_thread_runs_arch(void)
{
    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
__native sys_tls_set(__native addr)
{
    return 0;
}
 

Rev 1121	Rev 1122
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29		29
30	#include <arch.h>	30	#include <arch.h>
31	#include <arch/cp0.h>	31	#include <arch/cp0.h>
32	#include <arch/exception.h>	32	#include <arch/exception.h>
33	#include <arch/asm.h>	33	#include <arch/asm.h>
34	#include <mm/as.h>	34	#include <mm/as.h>
35		35
36	#include <userspace.h>	36	#include <userspace.h>
37	#include <arch/console.h>	37	#include <arch/console.h>
38	#include <memstr.h>	38	#include <memstr.h>
39	#include <proc/thread.h>	39	#include <proc/thread.h>
40	#include <proc/uarg.h>	40	#include <proc/uarg.h>
41	#include <print.h>	41	#include <print.h>
42	#include <syscall/syscall.h>	42	#include <syscall/syscall.h>
43		43
44	#include <arch/interrupt.h>	44	#include <arch/interrupt.h>
45	#include <arch/drivers/arc.h>	45	#include <arch/drivers/arc.h>
46	#include <console/chardev.h>	46	#include <console/chardev.h>
47	#include <arch/debugger.h>	47	#include <arch/debugger.h>
48		48
49	#include <arch/asm/regname.h>	49	#include <arch/asm/regname.h>
50		50
51	/* Size of the code jumping to the exception handler code	51	/* Size of the code jumping to the exception handler code
52	* - J+NOP	52	* - J+NOP
53	*/	53	*/
54	#define EXCEPTION_JUMP_SIZE 8	54	#define EXCEPTION_JUMP_SIZE 8
55		55
56	#define TLB_EXC ((char *) 0x80000000)	56	#define TLB_EXC ((char *) 0x80000000)
57	#define NORM_EXC ((char *) 0x80000180)	57	#define NORM_EXC ((char *) 0x80000180)
58	#define CACHE_EXC ((char *) 0x80000100)	58	#define CACHE_EXC ((char *) 0x80000100)
59		59
60	void arch_pre_mm_init(void)	60	void arch_pre_mm_init(void)
61	{	61	{
62	/* It is not assumed by default */	62	/* It is not assumed by default */
63	interrupts_disable();	63	interrupts_disable();
64		64
65	/* Initialize dispatch table */	65	/* Initialize dispatch table */
66	exception_init();	66	exception_init();
67	interrupt_init();	67	interrupt_init();
68		68
69	arc_init();	69	arc_init();
70		70
71	/* Copy the exception vectors to the right places */	71	/* Copy the exception vectors to the right places */
72	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);	72	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
73	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);	73	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
74	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);	74	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
75		75
76	/*	76	/*
77	* Switch to BEV normal level so that exception vectors point to the kernel.	77	* Switch to BEV normal level so that exception vectors point to the kernel.
78	* Clear the error level.	78	* Clear the error level.
79	*/	79	*/
80	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	80	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
81		81
82	/*	82	/*
83	* Mask all interrupts	83	* Mask all interrupts
84	*/	84	*/
85	cp0_mask_all_int();	85	cp0_mask_all_int();
86	/*	86	/*
87	* Unmask hardware clock interrupt.	87	* Unmask hardware clock interrupt.
88	*/	88	*/
89	cp0_unmask_int(TIMER_IRQ);	89	cp0_unmask_int(TIMER_IRQ);
90		90
91	/*	91	/*
92	* Start hardware clock.	92	* Start hardware clock.
93	*/	93	*/
94	cp0_compare_write(cp0_compare_value + cp0_count_read());	94	cp0_compare_write(cp0_compare_value + cp0_count_read());
95		95
96	console_init();	96	console_init();
97	debugger_init();	97	debugger_init();
98		98
99	/* Setup usermode */	99	/* Setup usermode */
100	init.cnt = 1;	100	init.cnt = 1;
101	init.tasks[0].addr = INIT_ADDRESS;	101	init.tasks[0].addr = INIT_ADDRESS;
102	init.tasks[0].size = INIT_SIZE;	102	init.tasks[0].size = INIT_SIZE;
103	}	103	}
104		104
105	void arch_post_mm_init(void)	105	void arch_post_mm_init(void)
106	{	106	{
107	}	107	}
108		108
109	void arch_pre_smp_init(void)	109	void arch_pre_smp_init(void)
110	{	110	{
111	}	111	}
112		112
113	void arch_post_smp_init(void)	113	void arch_post_smp_init(void)
114	{	114	{
115	}	115	}
116		116
117	/* Stack pointer saved when entering user mode */	117	/* Stack pointer saved when entering user mode */
118	/* TODO: How do we do it on SMP system???? */	118	/* TODO: How do we do it on SMP system???? */
119		119
120	/* Why the linker moves the variable 64K away in assembler	120	/* Why the linker moves the variable 64K away in assembler
121	* when not in .text section ????????	121	* when not in .text section ????????
122	*/	122	*/
123	__address supervisor_sp __attribute__ ((section (".text")));	123	__address supervisor_sp __attribute__ ((section (".text")));
124		124
125	void userspace(uspace_arg_t *kernel_uarg)	125	void userspace(uspace_arg_t *kernel_uarg)
126	{	126	{
127	/* EXL=1, UM=1, IE=1 */	127	/* EXL=1, UM=1, IE=1 */
128	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	128	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
129	cp0_status_um_bit \|	129	cp0_status_um_bit \|
130	cp0_status_ie_enabled_bit));	130	cp0_status_ie_enabled_bit));
131	cp0_epc_write((__address) kernel_uarg->uspace_entry);	131	cp0_epc_write((__address) kernel_uarg->uspace_entry);
132	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), (__address) kernel_uarg->uspace_uarg);	132	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE),
-		133	(__address) kernel_uarg->uspace_uarg,
-		134	(__address) kernel_uarg->uspace_entry);
133	while (1)	135	while (1)
134	;	136	;
135	}	137	}
136		138
137	void before_thread_runs_arch(void)	139	void before_thread_runs_arch(void)
138	{	140	{
139	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	141	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
140	}	142	}
141		143
142	void after_thread_ran_arch(void)	144	void after_thread_ran_arch(void)
143	{	145	{
144	}	146	}
145		147
146	/** Set thread-local-storage pointer	148	/** Set thread-local-storage pointer
147	*	149	*
148	* We have it currently in K1, it is	150	* We have it currently in K1, it is
149	* possible to have it separately in the future.	151	* possible to have it separately in the future.
150	*/	152	*/
151	__native sys_tls_set(__native addr)	153	__native sys_tls_set(__native addr)
152	{	154	{
153	return 0;	155	return 0;
154	}	156	}
155		157

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/mips32.c – Rev 1121 → 1122