WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/exception.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <panic.h>
#include <arch/cp0.h>
#include <arch/types.h>
#include <arch.h>
#include <debug.h>
 
void exception(void)
{
    int excno;
    __u32 epc;
    __u32 epc_shift = 0;
 
 
    ASSERT(CPU != NULL);
 
    /*
     * NOTE ON OPERATION ORDERING
     *
     * On entry, cpu_priority_high() must be called before exception bit is cleared.
     * On exit, exception bit must be set before cpu_priority_restore() is called.
     */
 
    cpu_priority_high();
    epc = cp0_epc_read();
    cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
                        cp0_status_um_bit));
 
    if (THREAD) {
 
        THREAD->saved_epc = epc;
    }
    /* decode exception number and process the exception */
    switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
        case EXC_Int:
            interrupt();
            break;
        case EXC_TLBL:
        case EXC_TLBS:
            tlb_invalid();
            break;
        case EXC_Mod:
            panic("unhandled TLB Modification Exception\n");
            break;
        case EXC_AdEL:
            panic("unhandled Address Error Exception - load or instruction fetch\n");
            break;
        case EXC_AdES:
            panic("unhandled Address Error Exception - store\n");
            break;
        case EXC_IBE:
            panic("unhandled Bus Error Exception - fetch instruction\n");
            break;
        case EXC_DBE:
            panic("unhandled Bus Error Exception - data reference: load or store\n");
            break;
        case EXC_Bp:
            /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
               (see page 138 in R4000 Manual for more information) */
            epc_shift = 4;
            break;
        case EXC_RI:
            panic("unhandled Reserved Instruction Exception\n");
            break;
        case EXC_CpU:
            panic("unhandled Coprocessor Unusable Exception\n");
            break;
        case EXC_Ov:
            panic("unhandled Arithmetic Overflow Exception\n");
            break;
        case EXC_Tr:
            panic("unhandled Trap Exception\n");
            break;
        case EXC_VCEI:
            panic("unhandled Virtual Coherency Exception - instruction\n");
            break;
        case EXC_FPE:
            panic("unhandled Floating-Point Exception\n");
            break;
        case EXC_WATCH:
            panic("unhandled reference to WatchHi/WatchLo address\n");
            break;
        case EXC_VCED:
            panic("unhandled Virtual Coherency Exception - data\n");
            break;
        default:
            panic("unhandled exception %d\n", excno);
    }
   
    if (THREAD)
 
        epc = THREAD->saved_epc;
   
 
    /* Raise EXL bit before epc_write, so that we support
     * properly nested exceptions
     */
    cp0_status_write(cp0_status_read() | cp0_status_exl_exception_bit);
    cp0_epc_write(epc + epc_shift);
}
 

Rev 227	Rev 313
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch/exception.h>	29	#include <arch/exception.h>
30	#include <arch/interrupt.h>	30	#include <arch/interrupt.h>
31	#include <panic.h>	31	#include <panic.h>
32	#include <arch/cp0.h>	32	#include <arch/cp0.h>
33	#include <arch/types.h>	33	#include <arch/types.h>
34	#include <arch.h>	34	#include <arch.h>
35	#include <debug.h>	35	#include <debug.h>
36		36
37	void exception(void)	37	void exception(void)
38	{	38	{
39	int excno;	39	int excno;
40	__u32 epc;	40	__u32 epc;
41	__u32 epc_shift = 0;	41	__u32 epc_shift = 0;
42	pri_t pri;	-
43		42
44	ASSERT(CPU != NULL);	43	ASSERT(CPU != NULL);
45		44
46	/*	45	/*
47	* NOTE ON OPERATION ORDERING	46	* NOTE ON OPERATION ORDERING
48	*	47	*
49	* On entry, cpu_priority_high() must be called before exception bit is cleared.	48	* On entry, cpu_priority_high() must be called before exception bit is cleared.
50	* On exit, exception bit must be set before cpu_priority_restore() is called.	49	* On exit, exception bit must be set before cpu_priority_restore() is called.
51	*/	50	*/
52		51
53	pri = cpu_priority_high();	52	cpu_priority_high();
54	epc = cp0_epc_read();	53	epc = cp0_epc_read();
55	cp0_status_write(cp0_status_read() & ~ cp0_status_exl_exception_bit);	54	cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit \|
-		55	cp0_status_um_bit));
56		56
57	if (THREAD) {	57	if (THREAD) {
58	THREAD->saved_pri = pri;	-
59	THREAD->saved_epc = epc;	58	THREAD->saved_epc = epc;
60	}	59	}
61	/* decode exception number and process the exception */	60	/* decode exception number and process the exception */
62	switch (excno = (cp0_cause_read() >> 2) & 0x1f) {	61	switch (excno = (cp0_cause_read() >> 2) & 0x1f) {
63	case EXC_Int:	62	case EXC_Int:
64	interrupt();	63	interrupt();
65	break;	64	break;
66	case EXC_TLBL:	65	case EXC_TLBL:
67	case EXC_TLBS:	66	case EXC_TLBS:
68	tlb_invalid();	67	tlb_invalid();
69	break;	68	break;
70	case EXC_Mod:	69	case EXC_Mod:
71	panic("unhandled TLB Modification Exception\n");	70	panic("unhandled TLB Modification Exception\n");
72	break;	71	break;
73	case EXC_AdEL:	72	case EXC_AdEL:
74	panic("unhandled Address Error Exception - load or instruction fetch\n");	73	panic("unhandled Address Error Exception - load or instruction fetch\n");
75	break;	74	break;
76	case EXC_AdES:	75	case EXC_AdES:
77	panic("unhandled Address Error Exception - store\n");	76	panic("unhandled Address Error Exception - store\n");
78	break;	77	break;
79	case EXC_IBE:	78	case EXC_IBE:
80	panic("unhandled Bus Error Exception - fetch instruction\n");	79	panic("unhandled Bus Error Exception - fetch instruction\n");
81	break;	80	break;
82	case EXC_DBE:	81	case EXC_DBE:
83	panic("unhandled Bus Error Exception - data reference: load or store\n");	82	panic("unhandled Bus Error Exception - data reference: load or store\n");
84	break;	83	break;
85	case EXC_Bp:	84	case EXC_Bp:
86	/* it is necessary to not re-execute BREAK instruction after returning from Exception handler	85	/* it is necessary to not re-execute BREAK instruction after returning from Exception handler
87	(see page 138 in R4000 Manual for more information) */	86	(see page 138 in R4000 Manual for more information) */
88	epc_shift = 4;	87	epc_shift = 4;
89	break;	88	break;
90	case EXC_RI:	89	case EXC_RI:
91	panic("unhandled Reserved Instruction Exception\n");	90	panic("unhandled Reserved Instruction Exception\n");
92	break;	91	break;
93	case EXC_CpU:	92	case EXC_CpU:
94	panic("unhandled Coprocessor Unusable Exception\n");	93	panic("unhandled Coprocessor Unusable Exception\n");
95	break;	94	break;
96	case EXC_Ov:	95	case EXC_Ov:
97	panic("unhandled Arithmetic Overflow Exception\n");	96	panic("unhandled Arithmetic Overflow Exception\n");
98	break;	97	break;
99	case EXC_Tr:	98	case EXC_Tr:
100	panic("unhandled Trap Exception\n");	99	panic("unhandled Trap Exception\n");
101	break;	100	break;
102	case EXC_VCEI:	101	case EXC_VCEI:
103	panic("unhandled Virtual Coherency Exception - instruction\n");	102	panic("unhandled Virtual Coherency Exception - instruction\n");
104	break;	103	break;
105	case EXC_FPE:	104	case EXC_FPE:
106	panic("unhandled Floating-Point Exception\n");	105	panic("unhandled Floating-Point Exception\n");
107	break;	106	break;
108	case EXC_WATCH:	107	case EXC_WATCH:
109	panic("unhandled reference to WatchHi/WatchLo address\n");	108	panic("unhandled reference to WatchHi/WatchLo address\n");
110	break;	109	break;
111	case EXC_VCED:	110	case EXC_VCED:
112	panic("unhandled Virtual Coherency Exception - data\n");	111	panic("unhandled Virtual Coherency Exception - data\n");
113	break;	112	break;
114	default:	113	default:
115	panic("unhandled exception %d\n", excno);	114	panic("unhandled exception %d\n", excno);
116	}	115	}
117		116
118	if (THREAD) {	117	if (THREAD)
119	pri = THREAD->saved_pri;	-
120	epc = THREAD->saved_epc;	118	epc = THREAD->saved_epc;
121	}	119
122		-
-		120	/* Raise EXL bit before epc_write, so that we support
123	cp0_epc_write(epc + epc_shift);	121	* properly nested exceptions
-		122	*/
124	cp0_status_write(cp0_status_read() \| cp0_status_exl_exception_bit);	123	cp0_status_write(cp0_status_read() \| cp0_status_exl_exception_bit);
125	cpu_priority_restore(pri);	124	cp0_epc_write(epc + epc_shift);
126	}	125	}
127		126

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/exception.c @ 1614 – Rev 227 → 313