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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch/exception.h> |
29 | #include <arch/exception.h> |
30 | #include <arch/interrupt.h> |
30 | #include <arch/interrupt.h> |
31 | #include <panic.h> |
31 | #include <panic.h> |
32 | #include <arch/cp0.h> |
32 | #include <arch/cp0.h> |
33 | #include <arch/types.h> |
33 | #include <arch/types.h> |
34 | #include <arch.h> |
34 | #include <arch.h> |
35 | #include <debug.h> |
35 | #include <debug.h> |
36 | #include <proc/thread.h> |
36 | #include <proc/thread.h> |
37 | #include <symtab.h> |
37 | #include <symtab.h> |
38 | #include <print.h> |
38 | #include <print.h> |
39 | #include <interrupt.h> |
39 | #include <interrupt.h> |
40 | #include <func.h> |
40 | #include <func.h> |
41 | #include <console/kconsole.h> |
41 | #include <console/kconsole.h> |
42 | #include <arch/debugger.h> |
42 | #include <arch/debugger.h> |
43 | #include <syscall/syscall.h> |
43 | #include <syscall/syscall.h> |
44 | 44 | ||
45 | static char * exctable[] = { |
45 | static char * exctable[] = { |
46 | "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store", |
46 | "Interrupt","TLB Modified","TLB Invalid","TLB Invalid Store", |
47 | "Address Error - load/instr. fetch", |
47 | "Address Error - load/instr. fetch", |
48 | "Address Error - store", |
48 | "Address Error - store", |
49 | "Bus Error - fetch instruction", |
49 | "Bus Error - fetch instruction", |
50 | "Bus Error - data reference", |
50 | "Bus Error - data reference", |
51 | "Syscall", |
51 | "Syscall", |
52 | "BreakPoint", |
52 | "BreakPoint", |
53 | "Reserved Instruction", |
53 | "Reserved Instruction", |
54 | "Coprocessor Unusable", |
54 | "Coprocessor Unusable", |
55 | "Arithmetic Overflow", |
55 | "Arithmetic Overflow", |
56 | "Trap", |
56 | "Trap", |
57 | "Virtual Coherency - instruction", |
57 | "Virtual Coherency - instruction", |
58 | "Floating Point", |
58 | "Floating Point", |
59 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
59 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
60 | "WatchHi/WatchLo", /* 23 */ |
60 | "WatchHi/WatchLo", /* 23 */ |
61 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
61 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
62 | "Virtual Coherency - data", |
62 | "Virtual Coherency - data", |
63 | }; |
63 | }; |
64 | 64 | ||
65 | static void print_regdump(istate_t *istate) |
65 | static void print_regdump(istate_t *istate) |
66 | { |
66 | { |
67 | char *pcsymbol = ""; |
67 | char *pcsymbol = ""; |
68 | char *rasymbol = ""; |
68 | char *rasymbol = ""; |
69 | 69 | ||
70 | char *s = get_symtab_entry(istate->epc); |
70 | char *s = get_symtab_entry(istate->epc); |
71 | if (s) |
71 | if (s) |
72 | pcsymbol = s; |
72 | pcsymbol = s; |
73 | s = get_symtab_entry(istate->ra); |
73 | s = get_symtab_entry(istate->ra); |
74 | if (s) |
74 | if (s) |
75 | rasymbol = s; |
75 | rasymbol = s; |
76 | 76 | ||
77 | printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol, |
77 | printf("PC: %X(%s) RA: %X(%s), SP(%P)\n",istate->epc,pcsymbol, |
78 | istate->ra,rasymbol, istate->sp); |
78 | istate->ra,rasymbol, istate->sp); |
79 | } |
79 | } |
80 | 80 | ||
81 | static void unhandled_exception(int n, istate_t *istate) |
81 | static void unhandled_exception(int n, istate_t *istate) |
82 | { |
82 | { |
83 | print_regdump(istate); |
83 | print_regdump(istate); |
84 | panic("unhandled exception %s\n", exctable[n]); |
84 | panic("unhandled exception %s\n", exctable[n]); |
85 | } |
85 | } |
86 | 86 | ||
87 | static void breakpoint_exception(int n, istate_t *istate) |
87 | static void breakpoint_exception(int n, istate_t *istate) |
88 | { |
88 | { |
89 | #ifdef CONFIG_DEBUG |
89 | #ifdef CONFIG_DEBUG |
90 | debugger_bpoint(istate); |
90 | debugger_bpoint(istate); |
91 | #else |
91 | #else |
92 | /* it is necessary to not re-execute BREAK instruction after |
92 | /* it is necessary to not re-execute BREAK instruction after |
93 | returning from Exception handler |
93 | returning from Exception handler |
94 | (see page 138 in R4000 Manual for more information) */ |
94 | (see page 138 in R4000 Manual for more information) */ |
95 | istate->epc += 4; |
95 | istate->epc += 4; |
96 | #endif |
96 | #endif |
97 | } |
97 | } |
98 | 98 | ||
99 | static void tlbmod_exception(int n, istate_t *istate) |
99 | static void tlbmod_exception(int n, istate_t *istate) |
100 | { |
100 | { |
101 | tlb_modified(istate); |
101 | tlb_modified(istate); |
102 | } |
102 | } |
103 | 103 | ||
104 | static void tlbinv_exception(int n, istate_t *istate) |
104 | static void tlbinv_exception(int n, istate_t *istate) |
105 | { |
105 | { |
106 | tlb_invalid(istate); |
106 | tlb_invalid(istate); |
107 | } |
107 | } |
108 | 108 | ||
109 | #ifdef CONFIG_FPU_LAZY |
109 | #ifdef CONFIG_FPU_LAZY |
110 | static void cpuns_exception(int n, istate_t *istate) |
110 | static void cpuns_exception(int n, istate_t *istate) |
111 | { |
111 | { |
112 | if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) |
112 | if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) |
113 | scheduler_fpu_lazy_request(); |
113 | scheduler_fpu_lazy_request(); |
114 | else |
114 | else |
115 | panic("unhandled Coprocessor Unusable Exception\n"); |
115 | panic("unhandled Coprocessor Unusable Exception\n"); |
116 | } |
116 | } |
117 | #endif |
117 | #endif |
118 | 118 | ||
119 | static void interrupt_exception(int n, istate_t *istate) |
119 | static void interrupt_exception(int n, istate_t *istate) |
120 | { |
120 | { |
121 | __u32 cause; |
121 | __u32 cause; |
122 | int i; |
122 | int i; |
123 | 123 | ||
124 | /* decode interrupt number and process the interrupt */ |
124 | /* decode interrupt number and process the interrupt */ |
125 | cause = (cp0_cause_read() >> 8) &0xff; |
125 | cause = (cp0_cause_read() >> 8) &0xff; |
126 | 126 | ||
127 | for (i = 0; i < 8; i++) |
127 | for (i = 0; i < 8; i++) |
128 | if (cause & (1 << i)) |
128 | if (cause & (1 << i)) |
129 | exc_dispatch(i+INT_OFFSET, istate); |
129 | exc_dispatch(i+INT_OFFSET, istate); |
130 | } |
130 | } |
131 | 131 | ||
132 | #include <debug.h> |
- | |
133 | /** Handle syscall userspace call */ |
132 | __native syscall_handler(__native a0, __native a1, __native a2, |
134 | static void syscall_exception(int n, istate_t *istate) |
133 | __native a3, __native sysnum) |
135 | { |
134 | { |
136 | interrupts_enable(); |
- | |
137 | if (istate->t0 < SYSCALL_END) |
135 | if (sysnum < SYSCALL_END) |
138 | istate->v0 = syscall_table[istate->t0](istate->a0, |
136 | return syscall_table[sysnum](a0,a1,a2,a3); |
139 | istate->a1, |
- | |
140 | istate->a2, |
- | |
141 | istate->a3); |
- | |
142 | else |
- | |
143 | panic("Undefined syscall %d", istate->a3); |
137 | panic("Undefined syscall %d", sysnum); |
144 | istate->epc += 4; |
- | |
145 | interrupts_disable(); |
- | |
146 | } |
138 | } |
147 | 139 | ||
- | 140 | /** Handle syscall userspace call */ |
|
148 | void exception(istate_t *istate) |
141 | static void syscall_exception(int n, istate_t *istate) |
149 | { |
142 | { |
150 | int cause; |
- | |
151 | int excno; |
- | |
152 | - | ||
153 | ASSERT(CPU != NULL); |
- | |
154 | - | ||
155 | /* |
- | |
156 | * NOTE ON OPERATION ORDERING |
- | |
157 | * |
- | |
158 | * On entry, interrupts_disable() must be called before |
- | |
159 | * exception bit is cleared. |
- | |
160 | */ |
- | |
161 | - | ||
162 | interrupts_disable(); |
- | |
163 | cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit | |
- | |
164 | cp0_status_um_bit)); |
- | |
165 | - | ||
166 | /* Save istate so that the threads can access it */ |
143 | panic("Syscall is handled through shortcut"); |
167 | /* If THREAD->istate is set, this is nested exception, |
- | |
168 | * do not rewrite it |
- | |
169 | */ |
- | |
170 | if (THREAD && !THREAD->istate) |
- | |
171 | THREAD->istate = istate; |
- | |
172 | - | ||
173 | cause = cp0_cause_read(); |
- | |
174 | excno = cp0_cause_excno(cause); |
- | |
175 | /* Dispatch exception */ |
- | |
176 | exc_dispatch(excno, istate); |
- | |
177 | - | ||
178 | /* Set to NULL, so that we can still support nested |
- | |
179 | * exceptions |
- | |
180 | * TODO: We should probably set EXL bit before this command, |
- | |
181 | * nesting. On the other hand, if some exception occurs between |
- | |
182 | * here and ERET, it won't set anything on the istate anyway. |
- | |
183 | */ |
- | |
184 | if (THREAD) |
- | |
185 | THREAD->istate = NULL; |
- | |
186 | } |
144 | } |
187 | 145 | ||
188 | void exception_init(void) |
146 | void exception_init(void) |
189 | { |
147 | { |
190 | int i; |
148 | int i; |
191 | 149 | ||
192 | /* Clear exception table */ |
150 | /* Clear exception table */ |
193 | for (i=0;i < IVT_ITEMS; i++) |
151 | for (i=0;i < IVT_ITEMS; i++) |
194 | exc_register(i, "undef", (iroutine) unhandled_exception); |
152 | exc_register(i, "undef", (iroutine) unhandled_exception); |
195 | exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception); |
153 | exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception); |
196 | exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception); |
154 | exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception); |
197 | exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception); |
155 | exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception); |
198 | exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception); |
156 | exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception); |
199 | exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception); |
157 | exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception); |
200 | #ifdef CONFIG_FPU_LAZY |
158 | #ifdef CONFIG_FPU_LAZY |
201 | exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception); |
159 | exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception); |
202 | #endif |
160 | #endif |
203 | exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception); |
161 | exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception); |
204 | } |
162 | } |
205 | 163 |