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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
- | 29 | /** @addtogroup mips32 |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
- | 33 | */ |
|
- | 34 | ||
29 | #include <interrupt.h> |
35 | #include <interrupt.h> |
30 | #include <arch/cp0.h> |
36 | #include <arch/cp0.h> |
31 | #include <arch/drivers/serial.h> |
37 | #include <arch/drivers/serial.h> |
32 | #include <console/chardev.h> |
38 | #include <console/chardev.h> |
33 | #include <console/console.h> |
39 | #include <console/console.h> |
34 | 40 | ||
35 | static chardev_t console; |
41 | static chardev_t console; |
36 | static serial_t sconf[SERIAL_MAX]; |
42 | static serial_t sconf[SERIAL_MAX]; |
37 | static bool kb_enabled; |
43 | static bool kb_enabled; |
38 | 44 | ||
39 | static void serial_write(chardev_t *d, const char ch) |
45 | static void serial_write(chardev_t *d, const char ch) |
40 | { |
46 | { |
41 | serial_t *sd = (serial_t *)d->data; |
47 | serial_t *sd = (serial_t *)d->data; |
42 | 48 | ||
43 | if (ch == '\n') |
49 | if (ch == '\n') |
44 | serial_write(d, '\r'); |
50 | serial_write(d, '\r'); |
45 | /* Wait until transmit buffer empty */ |
51 | /* Wait until transmit buffer empty */ |
46 | while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT))) |
52 | while (! (SERIAL_READ_LSR(sd->port) & (1<<TRANSMIT_EMPTY_BIT))) |
47 | ; |
53 | ; |
48 | SERIAL_WRITE(sd->port, ch); |
54 | SERIAL_WRITE(sd->port, ch); |
49 | } |
55 | } |
50 | 56 | ||
51 | static void serial_enable(chardev_t *d) |
57 | static void serial_enable(chardev_t *d) |
52 | { |
58 | { |
53 | kb_enabled = true; |
59 | kb_enabled = true; |
54 | } |
60 | } |
55 | 61 | ||
56 | static void serial_disable(chardev_t *d) |
62 | static void serial_disable(chardev_t *d) |
57 | { |
63 | { |
58 | kb_enabled = false; |
64 | kb_enabled = false; |
59 | } |
65 | } |
60 | 66 | ||
61 | int serial_init(void) |
67 | int serial_init(void) |
62 | { |
68 | { |
63 | int i = 0; |
69 | int i = 0; |
64 | if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) { |
70 | if (SERIAL_READ_LSR(SERIAL_COM1) == 0x60) { |
65 | sconf[i].port = SERIAL_COM1; |
71 | sconf[i].port = SERIAL_COM1; |
66 | sconf[i].irq = SERIAL_COM1_IRQ; |
72 | sconf[i].irq = SERIAL_COM1_IRQ; |
67 | /* Enable interrupt on available data */ |
73 | /* Enable interrupt on available data */ |
68 | i++; |
74 | i++; |
69 | } |
75 | } |
70 | return i; |
76 | return i; |
71 | } |
77 | } |
72 | 78 | ||
73 | /** Read character from serial port, wait until available */ |
79 | /** Read character from serial port, wait until available */ |
74 | static char serial_do_read(chardev_t *dev) |
80 | static char serial_do_read(chardev_t *dev) |
75 | { |
81 | { |
76 | serial_t *sd = (serial_t *)dev->data; |
82 | serial_t *sd = (serial_t *)dev->data; |
77 | char ch; |
83 | char ch; |
78 | 84 | ||
79 | while (!(SERIAL_READ_LSR(sd->port) & 1)) |
85 | while (!(SERIAL_READ_LSR(sd->port) & 1)) |
80 | ; |
86 | ; |
81 | ch = SERIAL_READ(sd->port); |
87 | ch = SERIAL_READ(sd->port); |
82 | 88 | ||
83 | if (ch =='\r') |
89 | if (ch =='\r') |
84 | ch = '\n'; |
90 | ch = '\n'; |
85 | return ch; |
91 | return ch; |
86 | } |
92 | } |
87 | 93 | ||
88 | 94 | ||
89 | /** Process keyboard interrupt. Does not work in simics? */ |
95 | /** Process keyboard interrupt. Does not work in simics? */ |
90 | static void serial_interrupt(int n, void *stack) |
96 | static void serial_interrupt(int n, void *stack) |
91 | { |
97 | { |
92 | serial_t *sd = (serial_t *)console.data; |
98 | serial_t *sd = (serial_t *)console.data; |
93 | char ch; |
99 | char ch; |
94 | 100 | ||
95 | if (!(SERIAL_READ_LSR(sd->port) & 1)) |
101 | if (!(SERIAL_READ_LSR(sd->port) & 1)) |
96 | return; |
102 | return; |
97 | ch = SERIAL_READ(sd->port); |
103 | ch = SERIAL_READ(sd->port); |
98 | 104 | ||
99 | if (ch =='\r') |
105 | if (ch =='\r') |
100 | ch = '\n'; |
106 | ch = '\n'; |
101 | chardev_push_character(&console, ch); |
107 | chardev_push_character(&console, ch); |
102 | } |
108 | } |
103 | 109 | ||
104 | 110 | ||
105 | 111 | ||
106 | static chardev_operations_t serial_ops = { |
112 | static chardev_operations_t serial_ops = { |
107 | .resume = serial_enable, |
113 | .resume = serial_enable, |
108 | .suspend = serial_disable, |
114 | .suspend = serial_disable, |
109 | .write = serial_write, |
115 | .write = serial_write, |
110 | .read = serial_do_read |
116 | .read = serial_do_read |
111 | }; |
117 | }; |
112 | 118 | ||
113 | iroutine old_timer; |
119 | iroutine old_timer; |
114 | /** Do polling on timer interrupt */ |
120 | /** Do polling on timer interrupt */ |
115 | static void timer_replace(int n, istate_t *istate) |
121 | static void timer_replace(int n, istate_t *istate) |
116 | { |
122 | { |
117 | old_timer(n, istate); |
123 | old_timer(n, istate); |
118 | serial_interrupt(n, istate); |
124 | serial_interrupt(n, istate); |
119 | } |
125 | } |
120 | 126 | ||
121 | void serial_console(void) |
127 | void serial_console(void) |
122 | { |
128 | { |
123 | serial_t *sd = &sconf[0]; |
129 | serial_t *sd = &sconf[0]; |
124 | 130 | ||
125 | 131 | ||
126 | chardev_initialize("serial_console", &console, &serial_ops); |
132 | chardev_initialize("serial_console", &console, &serial_ops); |
127 | console.data = sd; |
133 | console.data = sd; |
128 | kb_enabled = true; |
134 | kb_enabled = true; |
129 | 135 | ||
130 | // int_register(2, "serial_drvr", serial_interrupt); |
136 | // int_register(2, "serial_drvr", serial_interrupt); |
131 | /* I don't know why, but the serial interrupts simply |
137 | /* I don't know why, but the serial interrupts simply |
132 | * don't work on simics |
138 | * don't work on simics |
133 | */ |
139 | */ |
134 | old_timer = int_register(TIMER_IRQ, "serial_drvr_poll", timer_replace); |
140 | old_timer = int_register(TIMER_IRQ, "serial_drvr_poll", timer_replace); |
135 | 141 | ||
136 | stdin = &console; |
142 | stdin = &console; |
137 | stdout = &console; |
143 | stdout = &console; |
138 | } |
144 | } |
- | 145 | ||
- | 146 | /** @} |
|
- | 147 | */ |
|
- | 148 | ||
139 | 149 |