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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
2 | * Copyright (C) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <interrupt.h> |
35 | #include <interrupt.h> |
36 | #include <console/chardev.h> |
36 | #include <console/chardev.h> |
37 | #include <arch/drivers/msim.h> |
37 | #include <arch/drivers/msim.h> |
38 | #include <arch/cp0.h> |
38 | #include <arch/cp0.h> |
39 | #include <console/console.h> |
39 | #include <console/console.h> |
40 | 40 | ||
41 | static chardev_t console; |
41 | static chardev_t console; |
42 | 42 | ||
43 | static void msim_write(chardev_t *dev, const char ch); |
43 | static void msim_write(chardev_t *dev, const char ch); |
44 | static void msim_enable(chardev_t *dev); |
44 | static void msim_enable(chardev_t *dev); |
45 | static void msim_disable(chardev_t *dev); |
45 | static void msim_disable(chardev_t *dev); |
46 | static char msim_do_read(chardev_t *dev); |
46 | static char msim_do_read(chardev_t *dev); |
47 | 47 | ||
48 | static chardev_operations_t msim_ops = { |
48 | static chardev_operations_t msim_ops = { |
49 | .resume = msim_enable, |
49 | .resume = msim_enable, |
50 | .suspend = msim_disable, |
50 | .suspend = msim_disable, |
51 | .write = msim_write, |
51 | .write = msim_write, |
52 | .read = msim_do_read, |
52 | .read = msim_do_read, |
53 | }; |
53 | }; |
54 | 54 | ||
55 | /** Putchar that works with MSIM & gxemul */ |
55 | /** Putchar that works with MSIM & gxemul */ |
56 | void msim_write(chardev_t *dev, const char ch) |
56 | void msim_write(chardev_t *dev, const char ch) |
57 | { |
57 | { |
58 | *((char *) MSIM_VIDEORAM) = ch; |
58 | *((char *) MSIM_VIDEORAM) = ch; |
59 | } |
59 | } |
60 | 60 | ||
61 | /* Called from getc(). */ |
61 | /* Called from getc(). */ |
62 | void msim_enable(chardev_t *dev) |
62 | void msim_enable(chardev_t *dev) |
63 | { |
63 | { |
64 | cp0_unmask_int(MSIM_KBD_IRQ); |
64 | cp0_unmask_int(MSIM_KBD_IRQ); |
65 | } |
65 | } |
66 | 66 | ||
67 | /* Called from getc(). */ |
67 | /* Called from getc(). */ |
68 | void msim_disable(chardev_t *dev) |
68 | void msim_disable(chardev_t *dev) |
69 | { |
69 | { |
70 | cp0_mask_int(MSIM_KBD_IRQ); |
70 | cp0_mask_int(MSIM_KBD_IRQ); |
71 | } |
71 | } |
72 | 72 | ||
73 | #include <print.h> |
73 | #include <print.h> |
74 | /** Read character using polling, assume interrupts disabled */ |
74 | /** Read character using polling, assume interrupts disabled */ |
75 | static char msim_do_read(chardev_t *dev) |
75 | static char msim_do_read(chardev_t *dev) |
76 | { |
76 | { |
77 | char ch; |
77 | char ch; |
78 | 78 | ||
79 | while (1) { |
79 | while (1) { |
80 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
80 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
81 | if (ch) { |
81 | if (ch) { |
82 | if (ch == '\r') |
82 | if (ch == '\r') |
83 | return '\n'; |
83 | return '\n'; |
84 | if (ch == 0x7f) |
84 | if (ch == 0x7f) |
85 | return '\b'; |
85 | return '\b'; |
86 | return ch; |
86 | return ch; |
87 | } |
87 | } |
88 | } |
88 | } |
89 | } |
89 | } |
90 | 90 | ||
91 | /** Process keyboard interrupt. */ |
91 | /** Process keyboard interrupt. */ |
92 | static void msim_interrupt(int n, istate_t *istate) |
92 | static void msim_interrupt(int n, istate_t *istate) |
93 | { |
93 | { |
94 | char ch = 0; |
94 | char ch = 0; |
95 | 95 | ||
96 | ch = *((char *) MSIM_KBD_ADDRESS); |
96 | ch = *((char *) MSIM_KBD_ADDRESS); |
97 | if (ch =='\r') |
97 | if (ch =='\r') |
98 | ch = '\n'; |
98 | ch = '\n'; |
99 | if (ch == 0x7f) |
99 | if (ch == 0x7f) |
100 | ch = '\b'; |
100 | ch = '\b'; |
101 | chardev_push_character(&console, ch); |
101 | chardev_push_character(&console, ch); |
102 | } |
102 | } |
103 | 103 | ||
104 | 104 | ||
105 | /* Return console object representing msim console */ |
105 | /* Return console object representing msim console */ |
106 | void msim_console(void) |
106 | void msim_console(void) |
107 | { |
107 | { |
108 | chardev_initialize("msim_console", &console, &msim_ops); |
108 | chardev_initialize("msim_console", &console, &msim_ops); |
109 | 109 | ||
110 | int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt); |
110 | int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt); |
111 | 111 | ||
112 | cp0_unmask_int(MSIM_KBD_IRQ); |
112 | cp0_unmask_int(MSIM_KBD_IRQ); |
113 | 113 | ||
114 | stdin = &console; |
114 | stdin = &console; |
115 | stdout = &console; |
115 | stdout = &console; |
116 | } |
116 | } |
117 | 117 | ||
118 | static iroutine oldvector; |
118 | static iroutine oldvector; |
119 | void msim_kbd_grab(void) |
119 | void msim_kbd_grab(void) |
120 | { |
120 | { |
121 | oldvector = int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt); |
121 | oldvector = int_register(MSIM_KBD_IRQ, "msim_kbd", msim_interrupt); |
122 | } |
122 | } |
123 | void msim_kbd_release(void) |
123 | void msim_kbd_release(void) |
124 | { |
124 | { |
- | 125 | if (oldvector) |
|
125 | int_register(MSIM_KBD_IRQ, "user_interrupt", oldvector); |
126 | int_register(MSIM_KBD_IRQ, "user_interrupt", oldvector); |
126 | } |
127 | } |
127 | 128 | ||
128 | /** @} |
129 | /** @} |
129 | */ |
130 | */ |
130 | 131 | ||
131 | 132 |