WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/mips32/src/cpu/cpu.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup mips32cpu mips32
 * @ingroup cpu
 * @{
 */
/** @file
 */
 
#include <arch/cpu.h>
#include <cpu.h>
 
#include <arch.h>
 
#include <arch/cp0.h>
 
#include <typedefs.h>
#include <print.h>  
 
struct data_t {
    char *vendor;
    char *model;
};
 
static struct data_t imp_data[] = {
    { "Invalid", "Invalid" },   /* 0x00 */
    { "MIPS", "R2000" },        /* 0x01 */
    { "MIPS", "R3000" },        /* 0x02 */
    { "MIPS", "R6000" },        /* 0x03 */
    { "MIPS", " R4000/R4400" },     /* 0x04 */
    { "LSI Logic", "R3000" },   /* 0x05 */
    { "MIPS", "R6000A" },       /* 0x06 */
    { "IDT", "3051/3052" },     /* 0x07 */
    { "Invalid", "Invalid" },   /* 0x08 */
    { "MIPS", "R10000/T5" },    /* 0x09 */
    { "MIPS", "R4200" },        /* 0x0a */
    { "Unknown", "Unknown" },   /* 0x0b */
    { "Unknown", "Unknown" },   /* 0x0c */
    { "Invalid", "Invalid" },   /* 0x0d */
    { "Invalid", "Invalid" },   /* 0x0e */
    { "Invalid", "Invalid" },   /* 0x0f */
    { "MIPS", "R8000" },        /* 0x10 */
    { "Invalid", "Invalid" },   /* 0x11 */
    { "Invalid", "Invalid" },   /* 0x12 */
    { "Invalid", "Invalid" },   /* 0x13 */
    { "Invalid", "Invalid" },   /* 0x14 */
    { "Invalid", "Invalid" },   /* 0x15 */
    { "Invalid", "Invalid" },   /* 0x16 */
    { "Invalid", "Invalid" },   /* 0x17 */
    { "Invalid", "Invalid" },   /* 0x18 */
    { "Invalid", "Invalid" },   /* 0x19 */
    { "Invalid", "Invalid" },   /* 0x1a */
    { "Invalid", "Invalid" },   /* 0x1b */
    { "Invalid", "Invalid" },   /* 0x1c */
    { "Invalid", "Invalid" },   /* 0x1d */
    { "Invalid", "Invalid" },   /* 0x1e */
    { "Invalid", "Invalid" },   /* 0x1f */
    { "QED", "R4600" },     /* 0x20 */
    { "Sony", "R3000" },        /* 0x21 */
    { "Toshiba", "R3000" },     /* 0x22 */
    { "NKK", "R3000" },     /* 0x23 */
    { NULL, NULL }
};
 
static struct data_t imp_data80[] = {
    { "MIPS", "4Kc" },  /* 0x80 */
    {"Invalid","Invalid"}, /* 0x81 */
    {"Invalid","Invalid"}, /* 0x82 */
    {"MIPS","4Km & 4Kp"}, /* 0x83 */
    { NULL, NULL}
};
 
void cpu_arch_init(void)
{
}
 
void cpu_identify(void)
{
    CPU->arch.rev_num = cp0_prid_read() & 0xff;
    CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
}
 
void cpu_print_report(cpu_t *m)
{
    struct data_t *data;
    int i;
 
    if (m->arch.imp_num & 0x80) {
        /* Count records */
        for (i=0;imp_data80[i].vendor;i++)
            ;
        if ((m->arch.imp_num & 0x7f) >= i) {
            printf("imp=%d\n",m->arch.imp_num);
            return;
        }
        data = &imp_data80[m->arch.imp_num & 0x7f];
    } else {
        for (i=0;imp_data[i].vendor;i++)
            ;
        if (m->arch.imp_num >= i) {
            printf("imp=%d\n",m->arch.imp_num);
            return;
        }
        data = &imp_data[m->arch.imp_num];
    }
 
    printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
        m->id, data->vendor, data->model, m->arch.rev_num >> 4,
           m->arch.rev_num & 0xf, m->arch.imp_num);
}
 
 /** @}
 */
 
 

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/mips32/src/cpu/cpu.c @ 1705 – Rev 610 → 1702

Rev 610		Rev 1702
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
-		29	/** @addtogroup mips32cpu mips32
-		30	* @ingroup cpu
-		31	* @{
-		32	*/
-		33	/** @file
-		34	*/
-		35
29	#include <arch/cpu.h>	36	#include <arch/cpu.h>
30	#include <cpu.h>	37	#include <cpu.h>
31		38
32	#include <arch.h>	39	#include <arch.h>
33		40
34	#include <arch/cp0.h>	41	#include <arch/cp0.h>
35		42
36	#include <typedefs.h>	43	#include <typedefs.h>
37	#include <print.h>	44	#include <print.h>
38		45
39	struct data_t {	46	struct data_t {
40	char *vendor;	47	char *vendor;
41	char *model;	48	char *model;
42	};	49	};
43		50
44	static struct data_t imp_data[] = {	51	static struct data_t imp_data[] = {
45	{ "Invalid", "Invalid" }, /* 0x00 */	52	{ "Invalid", "Invalid" }, /* 0x00 */
46	{ "MIPS", "R2000" }, /* 0x01 */	53	{ "MIPS", "R2000" }, /* 0x01 */
47	{ "MIPS", "R3000" }, /* 0x02 */	54	{ "MIPS", "R3000" }, /* 0x02 */
48	{ "MIPS", "R6000" }, /* 0x03 */	55	{ "MIPS", "R6000" }, /* 0x03 */
49	{ "MIPS", " R4000/R4400" }, /* 0x04 */	56	{ "MIPS", " R4000/R4400" }, /* 0x04 */
50	{ "LSI Logic", "R3000" }, /* 0x05 */	57	{ "LSI Logic", "R3000" }, /* 0x05 */
51	{ "MIPS", "R6000A" }, /* 0x06 */	58	{ "MIPS", "R6000A" }, /* 0x06 */
52	{ "IDT", "3051/3052" }, /* 0x07 */	59	{ "IDT", "3051/3052" }, /* 0x07 */
53	{ "Invalid", "Invalid" }, /* 0x08 */	60	{ "Invalid", "Invalid" }, /* 0x08 */
54	{ "MIPS", "R10000/T5" }, /* 0x09 */	61	{ "MIPS", "R10000/T5" }, /* 0x09 */
55	{ "MIPS", "R4200" }, /* 0x0a */	62	{ "MIPS", "R4200" }, /* 0x0a */
56	{ "Unknown", "Unknown" }, /* 0x0b */	63	{ "Unknown", "Unknown" }, /* 0x0b */
57	{ "Unknown", "Unknown" }, /* 0x0c */	64	{ "Unknown", "Unknown" }, /* 0x0c */
58	{ "Invalid", "Invalid" }, /* 0x0d */	65	{ "Invalid", "Invalid" }, /* 0x0d */
59	{ "Invalid", "Invalid" }, /* 0x0e */	66	{ "Invalid", "Invalid" }, /* 0x0e */
60	{ "Invalid", "Invalid" }, /* 0x0f */	67	{ "Invalid", "Invalid" }, /* 0x0f */
61	{ "MIPS", "R8000" }, /* 0x10 */	68	{ "MIPS", "R8000" }, /* 0x10 */
62	{ "Invalid", "Invalid" }, /* 0x11 */	69	{ "Invalid", "Invalid" }, /* 0x11 */
63	{ "Invalid", "Invalid" }, /* 0x12 */	70	{ "Invalid", "Invalid" }, /* 0x12 */
64	{ "Invalid", "Invalid" }, /* 0x13 */	71	{ "Invalid", "Invalid" }, /* 0x13 */
65	{ "Invalid", "Invalid" }, /* 0x14 */	72	{ "Invalid", "Invalid" }, /* 0x14 */
66	{ "Invalid", "Invalid" }, /* 0x15 */	73	{ "Invalid", "Invalid" }, /* 0x15 */
67	{ "Invalid", "Invalid" }, /* 0x16 */	74	{ "Invalid", "Invalid" }, /* 0x16 */
68	{ "Invalid", "Invalid" }, /* 0x17 */	75	{ "Invalid", "Invalid" }, /* 0x17 */
69	{ "Invalid", "Invalid" }, /* 0x18 */	76	{ "Invalid", "Invalid" }, /* 0x18 */
70	{ "Invalid", "Invalid" }, /* 0x19 */	77	{ "Invalid", "Invalid" }, /* 0x19 */
71	{ "Invalid", "Invalid" }, /* 0x1a */	78	{ "Invalid", "Invalid" }, /* 0x1a */
72	{ "Invalid", "Invalid" }, /* 0x1b */	79	{ "Invalid", "Invalid" }, /* 0x1b */
73	{ "Invalid", "Invalid" }, /* 0x1c */	80	{ "Invalid", "Invalid" }, /* 0x1c */
74	{ "Invalid", "Invalid" }, /* 0x1d */	81	{ "Invalid", "Invalid" }, /* 0x1d */
75	{ "Invalid", "Invalid" }, /* 0x1e */	82	{ "Invalid", "Invalid" }, /* 0x1e */
76	{ "Invalid", "Invalid" }, /* 0x1f */	83	{ "Invalid", "Invalid" }, /* 0x1f */
77	{ "QED", "R4600" }, /* 0x20 */	84	{ "QED", "R4600" }, /* 0x20 */
78	{ "Sony", "R3000" }, /* 0x21 */	85	{ "Sony", "R3000" }, /* 0x21 */
79	{ "Toshiba", "R3000" }, /* 0x22 */	86	{ "Toshiba", "R3000" }, /* 0x22 */
80	{ "NKK", "R3000" }, /* 0x23 */	87	{ "NKK", "R3000" }, /* 0x23 */
81	{ NULL, NULL }	88	{ NULL, NULL }
82	};	89	};
83		90
84	static struct data_t imp_data80[] = {	91	static struct data_t imp_data80[] = {
85	{ "MIPS", "4Kc" }, /* 0x80 */	92	{ "MIPS", "4Kc" }, /* 0x80 */
86	{"Invalid","Invalid"}, /* 0x81 */	93	{"Invalid","Invalid"}, /* 0x81 */
87	{"Invalid","Invalid"}, /* 0x82 */	94	{"Invalid","Invalid"}, /* 0x82 */
88	{"MIPS","4Km & 4Kp"}, /* 0x83 */	95	{"MIPS","4Km & 4Kp"}, /* 0x83 */
89	{ NULL, NULL}	96	{ NULL, NULL}
90	};	97	};
91		98
92	void cpu_arch_init(void)	99	void cpu_arch_init(void)
93	{	100	{
94	}	101	}
95		102
96	void cpu_identify(void)	103	void cpu_identify(void)
97	{	104	{
98	CPU->arch.rev_num = cp0_prid_read() & 0xff;	105	CPU->arch.rev_num = cp0_prid_read() & 0xff;
99	CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;	106	CPU->arch.imp_num = (cp0_prid_read() >> 8) & 0xff;
100	}	107	}
101		108
102	void cpu_print_report(cpu_t *m)	109	void cpu_print_report(cpu_t *m)
103	{	110	{
104	struct data_t *data;	111	struct data_t *data;
105	int i;	112	int i;
106		113
107	if (m->arch.imp_num & 0x80) {	114	if (m->arch.imp_num & 0x80) {
108	/* Count records */	115	/* Count records */
109	for (i=0;imp_data80[i].vendor;i++)	116	for (i=0;imp_data80[i].vendor;i++)
110	;	117	;
111	if ((m->arch.imp_num & 0x7f) >= i) {	118	if ((m->arch.imp_num & 0x7f) >= i) {
112	printf("imp=%d\n",m->arch.imp_num);	119	printf("imp=%d\n",m->arch.imp_num);
113	return;	120	return;
114	}	121	}
115	data = &imp_data80[m->arch.imp_num & 0x7f];	122	data = &imp_data80[m->arch.imp_num & 0x7f];
116	} else {	123	} else {
117	for (i=0;imp_data[i].vendor;i++)	124	for (i=0;imp_data[i].vendor;i++)
118	;	125	;
119	if (m->arch.imp_num >= i) {	126	if (m->arch.imp_num >= i) {
120	printf("imp=%d\n",m->arch.imp_num);	127	printf("imp=%d\n",m->arch.imp_num);
121	return;	128	return;
122	}	129	}
123	data = &imp_data[m->arch.imp_num];	130	data = &imp_data[m->arch.imp_num];
124	}	131	}
125		132
126	printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",	133	printf("cpu%d: %s %s (rev=%d.%d, imp=%d)\n",
127	m->id, data->vendor, data->model, m->arch.rev_num >> 4,	134	m->id, data->vendor, data->model, m->arch.rev_num >> 4,
128	m->arch.rev_num & 0xf, m->arch.imp_num);	135	m->arch.rev_num & 0xf, m->arch.imp_num);
129	}	136	}
-		137
-		138	/** @}
-		139	*/
-		140
130		141