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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __mips_PAGE_H__ |
29 | #ifndef __mips_PAGE_H__ |
30 | #define __mips_PAGE_H__ |
30 | #define __mips_PAGE_H__ |
31 | 31 | ||
32 | #include <arch/mm/tlb.h> |
32 | #include <arch/mm/tlb.h> |
33 | #include <mm/page.h> |
33 | #include <mm/page.h> |
34 | #include <arch/mm/frame.h> |
34 | #include <arch/mm/frame.h> |
35 | #include <arch/types.h> |
35 | #include <arch/types.h> |
36 | #include <arch.h> |
36 | #include <arch.h> |
37 | 37 | ||
38 | #define PAGE_SIZE FRAME_SIZE |
38 | #define PAGE_SIZE FRAME_SIZE |
39 | 39 | ||
40 | #define KA2PA(x) ((x) - 0x80000000) |
40 | #define KA2PA(x) ((x) - 0x80000000) |
41 | #define PA2KA(x) ((x) + 0x80000000) |
41 | #define PA2KA(x) ((x) + 0x80000000) |
42 | 42 | ||
43 | /* |
43 | /* |
44 | * Implementation of generic 4-level page table interface. |
44 | * Implementation of generic 4-level page table interface. |
45 | * NOTE: this implementation is under construction |
45 | * NOTE: this implementation is under construction |
46 | * |
46 | * |
47 | * Page table layout: |
47 | * Page table layout: |
48 | * - 32-bit virtual addresses |
48 | * - 32-bit virtual addresses |
49 | * - Offset is 14 bits => pages are 16K long |
49 | * - Offset is 14 bits => pages are 16K long |
50 | * - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long |
50 | * - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long |
51 | * - PTL0 has 64 entries (6 bits) |
51 | * - PTL0 has 64 entries (6 bits) |
52 | * - PTL1 is not used |
52 | * - PTL1 is not used |
53 | * - PTL2 is not used |
53 | * - PTL2 is not used |
54 | * - PTL3 has 4096 entries (12 bits) |
54 | * - PTL3 has 4096 entries (12 bits) |
55 | */ |
55 | */ |
56 | 56 | ||
57 | #define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26) |
57 | #define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26) |
58 | #define PTL1_INDEX_ARCH(vaddr) 0 |
58 | #define PTL1_INDEX_ARCH(vaddr) 0 |
59 | #define PTL2_INDEX_ARCH(vaddr) 0 |
59 | #define PTL2_INDEX_ARCH(vaddr) 0 |
60 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff) |
60 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff) |
61 | 61 | ||
62 | #define GET_PTL0_ADDRESS_ARCH() (PTL0) |
62 | #define GET_PTL0_ADDRESS_ARCH() (PTL0) |
63 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) |
63 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) |
64 | 64 | ||
65 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14) |
65 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14) |
66 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
66 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
67 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
67 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
68 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14) |
68 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14) |
69 | 69 | ||
70 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14) |
70 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14) |
71 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
71 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
72 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
72 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
73 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14) |
73 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14) |
74 | 74 | ||
75 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
75 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
76 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
76 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
77 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
77 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
78 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
78 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
79 | 79 | ||
80 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
80 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
81 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
81 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
82 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
82 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
83 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
83 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
84 | 84 | ||
85 | static inline int get_pt_flags(pte_t *pt, index_t i) |
85 | static inline int get_pt_flags(pte_t *pt, index_t i) |
86 | { |
86 | { |
87 | pte_t *p = &pt[i]; |
87 | pte_t *p = &pt[i]; |
88 | 88 | ||
89 | return ( |
89 | return ( |
90 | ((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | |
90 | ((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | |
91 | ((!p->v)<<PAGE_PRESENT_SHIFT) | |
91 | ((!p->v)<<PAGE_PRESENT_SHIFT) | |
92 | (1<<PAGE_USER_SHIFT) | |
92 | (1<<PAGE_USER_SHIFT) | |
93 | (1<<PAGE_READ_SHIFT) | |
93 | (1<<PAGE_READ_SHIFT) | |
94 | ((p->d)<<PAGE_WRITE_SHIFT) | |
94 | ((p->d)<<PAGE_WRITE_SHIFT) | |
95 | (1<<PAGE_EXEC_SHIFT) |
95 | (1<<PAGE_EXEC_SHIFT) |
96 | ); |
96 | ); |
97 | 97 | ||
98 | } |
98 | } |
99 | 99 | ||
100 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
100 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
101 | { |
101 | { |
102 | pte_t *p = &pt[i]; |
102 | pte_t *p = &pt[i]; |
103 | 103 | ||
104 | p->c = (flags & PAGE_CACHEABLE) ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
104 | p->c = (flags & PAGE_CACHEABLE) ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
105 | p->v = !(flags & PAGE_NOT_PRESENT); |
105 | p->v = !(flags & PAGE_NOT_PRESENT); |
106 | p->d = flags & PAGE_WRITE; |
106 | p->d = flags & PAGE_WRITE; |
107 | } |
107 | } |
108 | 108 | ||
109 | extern void page_arch_init(void); |
109 | extern void page_arch_init(void); |
110 | 110 | ||
111 | extern pte_t *PTL0; |
111 | extern pte_t *PTL0; |
112 | 112 | ||
113 | #endif |
113 | #endif |
114 | 114 |