WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/start.S


#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/register.h>
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <mm/asid.h>
 
#define RR_MASK (0xFFFFFFFF00000002)
#define RID_SHIFT 8
#define PS_SHIFT 2
 
#define KERNEL_TRANSLATION_I 0x0010000000000661
#define KERNEL_TRANSLATION_D 0x0010000000000661
 
.section K_TEXT_START
 
.global kernel_image_start
 
stack0:
kernel_image_start:
	.auto
 
	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
 
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
	mov r9=rr[r8]
	movl r10=(RR_MASK)
	and r9=r10,r9
	movl r10=((RID_KERNEL<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
	or  r9=r10,r9
	mov rr[r8]=r9
 
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
	mov cr.ifa=r8
	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
	mov cr.itir=r10
	movl r10=(KERNEL_TRANSLATION_I)
	itr.i itr[r0]=r10
	movl r10=(KERNEL_TRANSLATION_D)
	itr.d dtr[r0]=r10
 
	# initialize PSR
	mov psr.l = r0
	srlz.i
	srlz.d
	movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /* Enable paging */
	mov r9=psr
	or r10=r10,r9
	mov cr.ipsr=r10
	mov cr.ifs=r0
	movl r8=paging_start
	mov cr.iip=r8
	srlz.d
	srlz.i
 
	.explicit
	/*
	 * Return From Interupt is the only the way to fill upper half word of PSR.
	 */
	rfi;;
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
 
.global paging_start
paging_start:
 
	/*
	 * Now we are paging.
	 */
 
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
 
	# switch to register bank 1
	bsw.1
	
	# initialize register stack
	mov ar.rsc = r0
	movl r8=(VRN_KERNEL<<VRN_SHIFT) ;;
	mov ar.bspstore = r8
	loadrs
 
	# initialize memory stack to some sane value
	movl r12 = stack0;;
	
	add r12 = - 16, r12	/* allocate a scratch area on the stack */
 
	# initialize gp (Global Pointer) register
	movl r1 = _hardcoded_load_address	;;
 
	/*
	 * Initialize hardcoded_* variables.
	 */
	movl r14 = _hardcoded_ktext_size
	movl r15 = _hardcoded_kdata_size
	movl r16 = _hardcoded_load_address
	addl r17 = @gprel(hardcoded_ktext_size), gp
	addl r18 = @gprel(hardcoded_kdata_size), gp
	addl r19 = @gprel(hardcoded_load_address), gp
	;;
	st8 [r17] = r14
	st8 [r18] = r15
	st8 [r19] = r16
 
	movl r18=main_bsp ;;
	mov b1=r18 ;;
	br.call.sptk.many b0=b1
 
0:
	br 0b
 

Rev 893	Rev 901
1	#	1	#
2	# Copyright (C) 2005 Jakub Jermar	2	# Copyright (C) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include <arch/register.h>	29	#include <arch/register.h>
30	#include <arch/mm/page.h>	30	#include <arch/mm/page.h>
31	#include <arch/mm/asid.h>	31	#include <arch/mm/asid.h>
32	#include <mm/asid.h>	32	#include <mm/asid.h>
33		33
34	#define RR_MASK (0xFFFFFFFF00000002)	34	#define RR_MASK (0xFFFFFFFF00000002)
35	#define RID_SHIFT 8	35	#define RID_SHIFT 8
36	#define PS_SHIFT 2	36	#define PS_SHIFT 2
37		37
38	#define KERNEL_TRANSLATION_I 0x0010000000000661	38	#define KERNEL_TRANSLATION_I 0x0010000000000661
39	#define KERNEL_TRANSLATION_D 0x0010000000000661	39	#define KERNEL_TRANSLATION_D 0x0010000000000661
40		40
41	.section K_TEXT_START	41	.section K_TEXT_START
42		42
43	.global kernel_image_start	43	.global kernel_image_start
44		44
45	stack0:	45	stack0:
46	kernel_image_start:	46	kernel_image_start:
47	.auto	47	.auto
48		48
49	# Fill TR.i and TR.d using Region Register #VRN_KERNEL	49	# Fill TR.i and TR.d using Region Register #VRN_KERNEL
50		50
51	movl r8=(VRN_KERNEL<<VRN_SHIFT)	51	movl r8=(VRN_KERNEL<<VRN_SHIFT)
52	mov r9=rr[r8]	52	mov r9=rr[r8]
53	movl r10=(RR_MASK)	53	movl r10=(RR_MASK)
54	and r9=r10,r9	54	and r9=r10,r9
55	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)\|(KERNEL_PAGE_WIDTH<<PS_SHIFT))	55	movl r10=((RID_KERNEL<<RID_SHIFT)\|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
56	or r9=r10,r9	56	or r9=r10,r9
57	mov rr[r8]=r9	57	mov rr[r8]=r9
58		58
59	movl r8=(VRN_KERNEL<<VRN_SHIFT)	59	movl r8=(VRN_KERNEL<<VRN_SHIFT)
60	mov cr.ifa=r8	60	mov cr.ifa=r8
61	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)	61	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
62	mov cr.itir=r10	62	mov cr.itir=r10
63	movl r10=(KERNEL_TRANSLATION_I)	63	movl r10=(KERNEL_TRANSLATION_I)
64	itr.i itr[r0]=r10	64	itr.i itr[r0]=r10
65	movl r10=(KERNEL_TRANSLATION_D)	65	movl r10=(KERNEL_TRANSLATION_D)
66	itr.d dtr[r0]=r10	66	itr.d dtr[r0]=r10
67		67
68	# initialize PSR	68	# initialize PSR
69	mov psr.l = r0	69	mov psr.l = r0
70	srlz.i	70	srlz.i
71	srlz.d	71	srlz.d
72	movl r10=(PSR_DT_MASK\|PSR_RT_MASK\|PSR_IT_MASK\|PSR_IC_MASK) /* Enable paging */	72	movl r10=(PSR_DT_MASK\|PSR_RT_MASK\|PSR_IT_MASK\|PSR_IC_MASK) /* Enable paging */
73	mov r9=psr	73	mov r9=psr
74	or r10=r10,r9	74	or r10=r10,r9
75	mov cr.ipsr=r10	75	mov cr.ipsr=r10
76	mov cr.ifs=r0	76	mov cr.ifs=r0
77	movl r8=paging_start	77	movl r8=paging_start
78	mov cr.iip=r8	78	mov cr.iip=r8
79	srlz.d	79	srlz.d
80	srlz.i	80	srlz.i
81		81
82	.explicit	82	.explicit
83	/*	83	/*
84	* Return From Interupt is the only the way to fill upper half word of PSR.	84	* Return From Interupt is the only the way to fill upper half word of PSR.
85	*/	85	*/
86	rfi;;	86	rfi;;
87	{nop 0;;}	87	{nop 0;;}
88	{nop 0;;}	88	{nop 0;;}
89	{nop 0;;}	89	{nop 0;;}
90	{nop 0;;}	90	{nop 0;;}
91	{nop 0;;}	91	{nop 0;;}
92	{nop 0;;}	92	{nop 0;;}
93	{nop 0;;}	93	{nop 0;;}
94	{nop 0;;}	94	{nop 0;;}
95		95
96	.global paging_start	96	.global paging_start
97	paging_start:	97	paging_start:
98		98
99	/*	99	/*
100	* Now we are paging.	100	* Now we are paging.
101	*/	101	*/
102		102
103	{nop 0;;}	103	{nop 0;;}
104	{nop 0;;}	104	{nop 0;;}
105	{nop 0;;}	105	{nop 0;;}
106	{nop 0;;}	106	{nop 0;;}
107	{nop 0;;}	107	{nop 0;;}
108	{nop 0;;}	108	{nop 0;;}
109	{nop 0;;}	109	{nop 0;;}
110	{nop 0;;}	110	{nop 0;;}
111		111
112	# switch to register bank 1	112	# switch to register bank 1
113	bsw.1	113	bsw.1
114		114
115	# initialize register stack	115	# initialize register stack
116	mov ar.rsc = r0	116	mov ar.rsc = r0
117	movl r8=(VRN_KERNEL<<VRN_SHIFT) ;;	117	movl r8=(VRN_KERNEL<<VRN_SHIFT) ;;
118	mov ar.bspstore = r8	118	mov ar.bspstore = r8
119	loadrs	119	loadrs
120		120
121	# initialize memory stack to some sane value	121	# initialize memory stack to some sane value
122	movl r12 = stack0;;	122	movl r12 = stack0;;
123		123
124	add r12 = - 16, r12 /* allocate a scratch area on the stack */	124	add r12 = - 16, r12 /* allocate a scratch area on the stack */
125		125
126	# initialize gp (Global Pointer) register	126	# initialize gp (Global Pointer) register
127	movl r1 = _hardcoded_load_address ;;	127	movl r1 = _hardcoded_load_address ;;
128		128
129	/*	129	/*
130	* Initialize hardcoded_* variables.	130	* Initialize hardcoded_* variables.
131	*/	131	*/
132	movl r14 = _hardcoded_ktext_size	132	movl r14 = _hardcoded_ktext_size
133	movl r15 = _hardcoded_kdata_size	133	movl r15 = _hardcoded_kdata_size
134	movl r16 = _hardcoded_load_address	134	movl r16 = _hardcoded_load_address
135	addl r17 = @gprel(hardcoded_ktext_size), gp	135	addl r17 = @gprel(hardcoded_ktext_size), gp
136	addl r18 = @gprel(hardcoded_kdata_size), gp	136	addl r18 = @gprel(hardcoded_kdata_size), gp
137	addl r19 = @gprel(hardcoded_load_address), gp	137	addl r19 = @gprel(hardcoded_load_address), gp
138	;;	138	;;
139	st8 [r17] = r14	139	st8 [r17] = r14
140	st8 [r18] = r15	140	st8 [r18] = r15
141	st8 [r19] = r16	141	st8 [r19] = r16
142		142
143	movl r18=main_bsp ;;	143	movl r18=main_bsp ;;
144	mov b1=r18 ;;	144	mov b1=r18 ;;
145	br.call.sptk.many b0=b1	145	br.call.sptk.many b0=b1
146		146
147	0:	147	0:
148	br 0b	148	br 0b
149		149

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/src/start.S – Rev 893 → 901