WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/start.S


#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
 
#include <arch/register.h>
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <mm/asid.h>
 
 
#define RR_MASK (0xFFFFFFFF00000002)
#define RID_SHIFT 8
#define PS_SHIFT 2
 
 
#define KERNEL_TRANSLATION_I 0x0010000000000661
#define KERNEL_TRANSLATION_D 0x0010000000000661
 
 
.section K_TEXT_START
 
.global kernel_image_start
 
stack0:
kernel_image_start:
	.auto
 
	#Fill TR.i and TR.d using Region Register #VRN_KERNEL
 
 
 
 
 
 
 
 
 
 
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
	mov r9=rr[r8]
	movl r10=(RR_MASK)
	and r9=r10,r9
	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
	or  r9=r10,r9
	mov rr[r8]=r9
 
 
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
	mov cr.ifa=r8
	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
	mov cr.itir=r10
	movl r10=(KERNEL_TRANSLATION_I)
	itr.i itr[r0]=r10
 
	movl r10=(KERNEL_TRANSLATION_D)
	itr.d dtr[r0]=r10
 
 
 
 
 
 
 
	# initialize PSR
	mov psr.l = r0
	srlz.i
	srlz.d
	movl r10=(PSR_DT_MASK|PSR_RT_MASK|PSR_IT_MASK|PSR_IC_MASK)  /*Enable paging*/
	mov r9=psr
	or r10=r10,r9
	mov cr.ipsr=r10
	mov cr.ifs=r0
	movl r8=paging_start
	mov cr.iip=r8
	srlz.d
	srlz.i
.explicit
 
	/*Return from interupt is only the way how to fill upper half word of PSR*/
	{rfi;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
 
.global paging_start
	/*Now we are paging*/
paging_start:
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
	{nop 0;;}
 
 
 
 
.auto
	
	# switch to register bank 1
	bsw.1
	
	# initialize register stack
	mov ar.rsc = r0
	movl r8=(VRN_KERNEL<<VRN_SHIFT)
	mov ar.bspstore = r8
	loadrs
 
	.explicit
	# initialize memory stack to some sane value
	movl r12 = stack0;;
	
	add r12 = - 16, r12	/* allocate a scratch area on the stack */
 
	# initialize gp (Global Pointer) register
	movl r1 = _hardcoded_load_address	;;
 
	
 
	#
	# Initialize hardcoded_* variables.
	#
	movl r14 = _hardcoded_ktext_size
	movl r15 = _hardcoded_kdata_size
	movl r16 = _hardcoded_load_address
	addl r17 = @gprel(hardcoded_ktext_size), gp
	addl r18 = @gprel(hardcoded_kdata_size), gp
	addl r19 = @gprel(hardcoded_load_address), gp
	;;
	st8 [r17] = r14
	st8 [r18] = r15
	st8 [r19] = r16
 
 
.auto
	
	movl r18=main_bsp 
	mov b1=r18
	br.call.sptk.many b0=b1
 
 
0:
	br 0b
 

Rev 872	Rev 879
1	#	1	#
2	# Copyright (C) 2005 Jakub Jermar	2	# Copyright (C) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29		29
30	#include <arch/register.h>	30	#include <arch/register.h>
31	#include <arch/mm/page.h>	31	#include <arch/mm/page.h>
32	#include <arch/mm/asid.h>	32	#include <arch/mm/asid.h>
33	#include <mm/asid.h>	33	#include <mm/asid.h>
34		34
35		35
36	#define RR_MASK (0xFFFFFFFF00000002)	36	#define RR_MASK (0xFFFFFFFF00000002)
37	#define RID_SHIFT 8	37	#define RID_SHIFT 8
38	#define PS_SHIFT 2	38	#define PS_SHIFT 2
39		39
40		40
41	#define KERNEL_TRANSLATION_I 0x0010000000000661	41	#define KERNEL_TRANSLATION_I 0x0010000000000661
42	#define KERNEL_TRANSLATION_D 0x0010000000000661	42	#define KERNEL_TRANSLATION_D 0x0010000000000661
43		43
44		44
45	.section K_TEXT_START	45	.section K_TEXT_START
46		46
47	.global kernel_image_start	47	.global kernel_image_start
48		48
49	stack0:	49	stack0:
50	kernel_image_start:	50	kernel_image_start:
51	.auto	51	.auto
52		52
53	#Fill TR.i and TR.d and enable paging	53	#Fill TR.i and TR.d using Region Register #VRN_KERNEL
54		-
55	mov r9=rr[r0]	-
56	movl r10=(RR_MASK)	-
57	and r9=r10,r9	-
58	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)\|(KERNEL_PAGE_WIDTH<<PS_SHIFT))	-
59	or r9=r10,r9	-
60	mov rr[r0]=r9	-
61		-
62		-
63		54
64	movl r8=(VRN_KERNEL<<VRN_SHIFT)	55	movl r8=(VRN_KERNEL<<VRN_SHIFT)
65	mov r9=rr[r8]	56	mov r9=rr[r8]
66	movl r10=(RR_MASK)	57	movl r10=(RR_MASK)
67	and r9=r10,r9	58	and r9=r10,r9
68	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)\|(KERNEL_PAGE_WIDTH<<PS_SHIFT))	59	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)\|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
69	or r9=r10,r9	60	or r9=r10,r9
70	mov rr[r8]=r9	61	mov rr[r8]=r9
71		62
72		63
73	movl r8=(VRN_KERNEL<<VRN_SHIFT)	64	movl r8=(VRN_KERNEL<<VRN_SHIFT)
74	mov cr.ifa=r8	65	mov cr.ifa=r8
75	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)	66	movl r10=(KERNEL_PAGE_WIDTH<<PS_SHIFT)
76	mov cr.itir=r10	67	mov cr.itir=r10
77	movl r10=(KERNEL_TRANSLATION_I)	68	movl r10=(KERNEL_TRANSLATION_I)
78	itr.i itr[r0]=r10	69	itr.i itr[r0]=r10
79		70
80	movl r10=(KERNEL_TRANSLATION_D)	71	movl r10=(KERNEL_TRANSLATION_D)
81	itr.d dtr[r0]=r10	72	itr.d dtr[r0]=r10
82		73
83		74
84		-
85		-
86		-
87		-
88		-
89	# initialize PSR	75	# initialize PSR
90	mov psr.l = r0	76	mov psr.l = r0
91	srlz.i	77	srlz.i
92	srlz.d	78	srlz.d
93	movl r10=(PSR_DT_MASK\|PSR_RT_MASK\|PSR_IT_MASK\|PSR_IC_MASK) /Enable paging/	79	movl r10=(PSR_DT_MASK\|PSR_RT_MASK\|PSR_IT_MASK\|PSR_IC_MASK) /Enable paging/
94	mov r9=psr	80	mov r9=psr
95	or r10=r10,r9	81	or r10=r10,r9
96	mov cr.ipsr=r10	82	mov cr.ipsr=r10
97	mov cr.ifs=r0	83	mov cr.ifs=r0
98	movl r8=paging_start	84	movl r8=paging_start
99	mov cr.iip=r8	85	mov cr.iip=r8
100	srlz.d	86	srlz.d
101	srlz.i	87	srlz.i
102	.explicit	88	.explicit
-		89
-		90	/Return from interupt is only the way how to fill upper half word of PSR/
103	{rfi;;}	91	{rfi;;}
104	{nop 0;;}	92	{nop 0;;}
105	{nop 0;;}	93	{nop 0;;}
106	{nop 0;;}	94	{nop 0;;}
107	{nop 0;;}	95	{nop 0;;}
108	{nop 0;;}	96	{nop 0;;}
109	{nop 0;;}	97	{nop 0;;}
110	{nop 0;;}	98	{nop 0;;}
111	{nop 0;;}	99	{nop 0;;}
-		100
-		101	.global paging_start
-		102	/Now we are paging/
-		103	paging_start:
112	{nop 0;;}	104	{nop 0;;}
113	{nop 0;;}	105	{nop 0;;}
114	{nop 0;;}	106	{nop 0;;}
115	{nop 0;;}	107	{nop 0;;}
116	{nop 0;;}	108	{nop 0;;}
117	{nop 0;;}	109	{nop 0;;}
118	{nop 0;;}	110	{nop 0;;}
119	{nop 0;;}	111	{nop 0;;}
120		112
121	.global paging_start	-
122	paging_start:	-
123		-
124	.auto	113	.auto
125		114
126	# switch to register bank 1	115	# switch to register bank 1
127	bsw.1	116	bsw.1
128		117
129	# initialize register stack	118	# initialize register stack
130	mov ar.rsc = r0	119	mov ar.rsc = r0
131	movl r8=(VRN_KERNEL<<VRN_SHIFT)	120	movl r8=(VRN_KERNEL<<VRN_SHIFT)
132	mov ar.bspstore = r8	121	mov ar.bspstore = r8
133	loadrs	122	loadrs
134		123
135	.explicit	124	.explicit
136	# initialize memory stack to some sane value	125	# initialize memory stack to some sane value
137	movl r12 = stack0;;	126	movl r12 = stack0;;
138		127
139	add r12 = - 16, r12 /* allocate a scratch area on the stack */	128	add r12 = - 16, r12 /* allocate a scratch area on the stack */
140		129
141	# initialize gp (Global Pointer) register	130	# initialize gp (Global Pointer) register
142	movl r1 = _hardcoded_load_address ;;	131	movl r1 = _hardcoded_load_address ;;
143		132
144		133
145		134
146	#	135	#
147	# Initialize hardcoded_* variables.	136	# Initialize hardcoded_* variables.
148	#	137	#
149	movl r14 = _hardcoded_ktext_size	138	movl r14 = _hardcoded_ktext_size
150	movl r15 = _hardcoded_kdata_size	139	movl r15 = _hardcoded_kdata_size
151	movl r16 = _hardcoded_load_address	140	movl r16 = _hardcoded_load_address
152	addl r17 = @gprel(hardcoded_ktext_size), gp	141	addl r17 = @gprel(hardcoded_ktext_size), gp
153	addl r18 = @gprel(hardcoded_kdata_size), gp	142	addl r18 = @gprel(hardcoded_kdata_size), gp
154	addl r19 = @gprel(hardcoded_load_address), gp	143	addl r19 = @gprel(hardcoded_load_address), gp
155	;;	144	;;
156	st8 [r17] = r14	145	st8 [r17] = r14
157	st8 [r18] = r15	146	st8 [r18] = r15
158	st8 [r19] = r16	147	st8 [r19] = r16
159		148
160		149
161	.auto	150	.auto
162		151
163	movl r18=main_bsp	152	movl r18=main_bsp
164	mov b1=r18	153	mov b1=r18
165	br.call.sptk.many b0=b1	154	br.call.sptk.many b0=b1
166		155
167		156
168	0:	157	0:
169	br 0b	158	br 0b
170		159

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/src/start.S – Rev 872 → 879