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1 | /* |
1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /* |
29 | /* |
30 | * ASID management. |
30 | * ASID management. |
31 | * |
31 | * |
32 | * Because ia64 has much wider ASIDs (18-24 bits) compared to other |
32 | * Because ia64 has much wider ASIDs (18-24 bits) compared to other |
33 | * architectures (e.g. 8 bits on mips32 and 13 bits on sparc64), it is |
33 | * architectures (e.g. 8 bits on mips32 and 13 bits on sparc64), it is |
34 | * inappropriate to use same methods (i.e. genarch/mm/asid_fifo.c) for |
34 | * inappropriate to use same methods (i.e. genarch/mm/asid_fifo.c) for |
35 | * all of them. |
35 | * all of them. |
36 | * |
36 | * |
37 | * Instead, ia64 assigns ASID values from a counter that eventually |
37 | * Instead, ia64 assigns ASID values from a counter that eventually |
38 | * overflows. When this happens, the counter is reset and all TLBs are |
38 | * overflows. When this happens, the counter is reset and all TLBs are |
39 | * entirely invalidated. Furthermore, all address space structures, |
39 | * entirely invalidated. Furthermore, all address space structures, |
40 | * except for the one with asid == ASID_KERNEL, are assigned new ASID. |
40 | * except for the one with asid == ASID_KERNEL, are assigned new ASID. |
41 | * |
41 | * |
42 | * It is important to understand that, in SPARTAN, one ASID represents |
42 | * It is important to understand that, in SPARTAN, one ASID represents |
43 | * RIDS_PER_ASID consecutive hardware RIDs (Region ID's). |
43 | * RIDS_PER_ASID consecutive hardware RIDs (Region ID's). |
44 | * |
44 | * |
45 | * Note that the algorithm used can handle only the maximum of |
45 | * Note that the algorithm used can handle only the maximum of |
46 | * ASID_OVERFLOW-ASID_START address spaces at a time. |
46 | * ASID_OVERFLOW-ASID_START address spaces at a time. |
47 | */ |
47 | */ |
48 | 48 | ||
49 | #include <arch/mm/asid.h> |
49 | #include <arch/mm/asid.h> |
50 | #include <mm/asid.h> |
50 | #include <mm/asid.h> |
51 | #include <mm/as.h> |
51 | #include <mm/as.h> |
- | 52 | #include <genarch/mm/page_ht.h> |
|
52 | #include <mm/tlb.h> |
53 | #include <mm/tlb.h> |
53 | #include <list.h> |
54 | #include <list.h> |
54 | #include <typedefs.h> |
55 | #include <typedefs.h> |
55 | #include <debug.h> |
56 | #include <debug.h> |
56 | 57 | ||
57 | /** |
58 | /** |
58 | * Stores the ASID to be returned next. |
59 | * Stores the ASID to be returned next. |
59 | * Must be only accessed when asidlock is held. |
60 | * Must be only accessed when asidlock is held. |
60 | */ |
61 | */ |
61 | static asid_t next_asid = ASID_START; |
62 | static asid_t next_asid = ASID_START; |
62 | 63 | ||
63 | /** Assign next ASID. |
64 | /** Assign next ASID. |
64 | * |
65 | * |
65 | * On ia64, this function is used only to allocate ASID |
66 | * On ia64, this function is used only to allocate ASID |
66 | * for a newly created address space. As a side effect, |
67 | * for a newly created address space. As a side effect, |
67 | * it might attempt to shootdown TLBs and reassign |
68 | * it might attempt to shootdown TLBs and reassign |
68 | * ASIDs to existing address spaces. |
69 | * ASIDs to existing address spaces. |
69 | * |
70 | * |
70 | * When calling this function, interrupts must be disabled |
71 | * When calling this function, interrupts must be disabled |
71 | * and the asidlock must be held. |
72 | * and the asidlock must be held. |
72 | * |
73 | * |
73 | * @return ASID for new address space. |
74 | * @return ASID for new address space. |
74 | */ |
75 | */ |
75 | asid_t asid_find_free(void) |
76 | asid_t asid_find_free(void) |
76 | { |
77 | { |
77 | as_t *as; |
78 | as_t *as; |
78 | link_t *cur; |
79 | link_t *cur; |
79 | 80 | ||
80 | if (next_asid == ASID_OVERFLOW) { |
81 | if (next_asid == ASID_OVERFLOW) { |
81 | /* |
82 | /* |
82 | * The counter has overflown. |
83 | * The counter has overflown. |
83 | */ |
84 | */ |
84 | 85 | ||
85 | /* |
86 | /* |
86 | * Reset the counter. |
87 | * Reset the counter. |
87 | */ |
88 | */ |
88 | next_asid = ASID_START; |
89 | next_asid = ASID_START; |
89 | 90 | ||
90 | /* |
91 | /* |
91 | * Initiate TLB shootdown. |
92 | * Initiate TLB shootdown. |
92 | */ |
93 | */ |
93 | tlb_shootdown_start(TLB_INVL_ALL, 0, 0, 0); |
94 | tlb_shootdown_start(TLB_INVL_ALL, 0, 0, 0); |
94 | 95 | ||
95 | /* |
96 | /* |
96 | * Reassign ASIDs to existing address spaces. |
97 | * Reassign ASIDs to existing address spaces. |
97 | */ |
98 | */ |
98 | for (cur = as_with_asid_head.next; cur != &as_with_asid_head; cur = cur->next) { |
99 | for (cur = as_with_asid_head.next; cur != &as_with_asid_head; cur = cur->next) { |
99 | ASSERT(next_asid < ASID_OVERFLOW); |
100 | ASSERT(next_asid < ASID_OVERFLOW); |
100 | 101 | ||
101 | as = list_get_instance(cur, as_t, as_with_asid_link); |
102 | as = list_get_instance(cur, as_t, as_with_asid_link); |
102 | 103 | ||
103 | spinlock_lock(&as->lock); |
104 | spinlock_lock(&as->lock); |
104 | as->asid = next_asid++; |
105 | as->asid = next_asid++; |
105 | spinlock_unlock(&as->lock); |
106 | spinlock_unlock(&as->lock); |
106 | } |
107 | } |
- | 108 | ||
- | 109 | /* |
|
- | 110 | * The page hash table uses VHPT long format PTE's. |
|
- | 111 | * Unfortunatelly, this format has no space to |
|
- | 112 | * store as_t pointer, so it is necessary to |
|
- | 113 | * invalidate the whole structure after all ASIDs |
|
- | 114 | * have been reassigned. The information swept out |
|
- | 115 | * from the page hash table can be later reconstructed |
|
- | 116 | * from as_t structures on demand. |
|
- | 117 | */ |
|
- | 118 | ht_invalidate_all(); |
|
107 | 119 | ||
108 | /* |
120 | /* |
109 | * Finish TLB shootdown. |
121 | * Finish TLB shootdown. |
110 | */ |
122 | */ |
111 | tlb_shootdown_finalize(); |
123 | tlb_shootdown_finalize(); |
112 | tlb_invalidate_all(); |
124 | tlb_invalidate_all(); |
113 | } |
125 | } |
114 | 126 | ||
115 | ASSERT(next_asid < ASID_OVERFLOW); |
127 | ASSERT(next_asid < ASID_OVERFLOW); |
116 | return next_asid++; |
128 | return next_asid++; |
117 | } |
129 | } |
118 | 130 |