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/*
1
/*
2
 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
3
 * Copyright (C) 2005 Jakub Vana
3
 * Copyright (C) 2005 Jakub Vana
4
 * All rights reserved.
4
 * All rights reserved.
5
 *
5
 *
6
 * Redistribution and use in source and binary forms, with or without
6
 * Redistribution and use in source and binary forms, with or without
7
 * modification, are permitted provided that the following conditions
7
 * modification, are permitted provided that the following conditions
8
 * are met:
8
 * are met:
9
 *
9
 *
10
 * - Redistributions of source code must retain the above copyright
10
 * - Redistributions of source code must retain the above copyright
11
 *   notice, this list of conditions and the following disclaimer.
11
 *   notice, this list of conditions and the following disclaimer.
12
 * - Redistributions in binary form must reproduce the above copyright
12
 * - Redistributions in binary form must reproduce the above copyright
13
 *   notice, this list of conditions and the following disclaimer in the
13
 *   notice, this list of conditions and the following disclaimer in the
14
 *   documentation and/or other materials provided with the distribution.
14
 *   documentation and/or other materials provided with the distribution.
15
 * - The name of the author may not be used to endorse or promote products
15
 * - The name of the author may not be used to endorse or promote products
16
 *   derived from this software without specific prior written permission.
16
 *   derived from this software without specific prior written permission.
17
 *
17
 *
18
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
 *
28
 *
29
 */
29
 */
30
 
30
 
31
#include <arch/interrupt.h>
31
#include <arch/interrupt.h>
32
#include <panic.h>
32
#include <panic.h>
33
#include <print.h>
33
#include <print.h>
34
#include <console/console.h>
34
#include <console/console.h>
35
#include <arch/types.h>
35
#include <arch/types.h>
36
#include <arch/asm.h>
36
#include <arch/asm.h>
37
#include <arch/barrier.h>
37
#include <arch/barrier.h>
38
#include <arch/register.h>
38
#include <arch/register.h>
39
#include <arch/drivers/it.h>
39
#include <arch/drivers/it.h>
40
#include <arch.h>
40
#include <arch.h>
41
#include <symtab.h>
41
#include <symtab.h>
42
#include <debug.h>
42
#include <debug.h>
-
 
43
#include <syscall/syscall.h>
-
 
44
#include <print.h>
43
 
45
 
44
#define VECTORS_64_BUNDLE   20
46
#define VECTORS_64_BUNDLE   20
45
#define VECTORS_16_BUNDLE   48
47
#define VECTORS_16_BUNDLE   48
46
#define VECTORS_16_BUNDLE_START 0x5000
48
#define VECTORS_16_BUNDLE_START 0x5000
47
#define VECTOR_MAX      0x7f00
49
#define VECTOR_MAX      0x7f00
48
 
50
 
49
#define BUNDLE_SIZE     16
51
#define BUNDLE_SIZE     16
50
 
52
 
51
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
53
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
52
    "VHPT Translation vector",
54
    "VHPT Translation vector",
53
    "Instruction TLB vector",
55
    "Instruction TLB vector",
54
    "Data TLB vector",
56
    "Data TLB vector",
55
    "Alternate Instruction TLB vector",
57
    "Alternate Instruction TLB vector",
56
    "Alternate Data TLB vector",
58
    "Alternate Data TLB vector",
57
    "Data Nested TLB vector",
59
    "Data Nested TLB vector",
58
    "Instruction Key Miss vector",
60
    "Instruction Key Miss vector",
59
    "Data Key Miss vector",
61
    "Data Key Miss vector",
60
    "Dirty-Bit vector",
62
    "Dirty-Bit vector",
61
    "Instruction Access-Bit vector",
63
    "Instruction Access-Bit vector",
62
    "Data Access-Bit vector"
64
    "Data Access-Bit vector"
63
    "Break Instruction vector",
65
    "Break Instruction vector",
64
    "External Interrupt vector"
66
    "External Interrupt vector"
65
    "Reserved",
67
    "Reserved",
66
    "Reserved",
68
    "Reserved",
67
    "Reserved",
69
    "Reserved",
68
    "Reserved",
70
    "Reserved",
69
    "Reserved",
71
    "Reserved",
70
    "Reserved",
72
    "Reserved",
71
    "Reserved"
73
    "Reserved"
72
};
74
};
73
 
75
 
74
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
76
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
75
    "Page Not Present vector",
77
    "Page Not Present vector",
76
    "Key Permission vector",
78
    "Key Permission vector",
77
    "Instruction Access rights vector",
79
    "Instruction Access rights vector",
78
    "Data Access Rights vector",
80
    "Data Access Rights vector",
79
    "General Exception vector",
81
    "General Exception vector",
80
    "Disabled FP-Register vector",
82
    "Disabled FP-Register vector",
81
    "NaT Consumption vector",
83
    "NaT Consumption vector",
82
    "Speculation vector",
84
    "Speculation vector",
83
    "Reserved",
85
    "Reserved",
84
    "Debug vector",
86
    "Debug vector",
85
    "Unaligned Reference vector",
87
    "Unaligned Reference vector",
86
    "Unsupported Data Reference vector",
88
    "Unsupported Data Reference vector",
87
    "Floating-point Fault vector",
89
    "Floating-point Fault vector",
88
    "Floating-point Trap vector",
90
    "Floating-point Trap vector",
89
    "Lower-Privilege Transfer Trap vector",
91
    "Lower-Privilege Transfer Trap vector",
90
    "Taken Branch Trap vector",
92
    "Taken Branch Trap vector",
91
    "Single STep Trap vector",
93
    "Single STep Trap vector",
92
    "Reserved",
94
    "Reserved",
93
    "Reserved",
95
    "Reserved",
94
    "Reserved",
96
    "Reserved",
95
    "Reserved",
97
    "Reserved",
96
    "Reserved",
98
    "Reserved",
97
    "Reserved",
99
    "Reserved",
98
    "Reserved",
100
    "Reserved",
99
    "Reserved",
101
    "Reserved",
100
    "IA-32 Exception vector",
102
    "IA-32 Exception vector",
101
    "IA-32 Intercept vector",
103
    "IA-32 Intercept vector",
102
    "IA-32 Interrupt vector",
104
    "IA-32 Interrupt vector",
103
    "Reserved",
105
    "Reserved",
104
    "Reserved",
106
    "Reserved",
105
    "Reserved"
107
    "Reserved"
106
};
108
};
107
 
109
 
108
static char *vector_to_string(__u16 vector);
110
static char *vector_to_string(__u16 vector);
109
static void dump_interrupted_context(struct exception_regdump *pstate);
111
static void dump_interrupted_context(struct exception_regdump *pstate);
110
 
112
 
111
char *vector_to_string(__u16 vector)
113
char *vector_to_string(__u16 vector)
112
{
114
{
113
    ASSERT(vector <= VECTOR_MAX);
115
    ASSERT(vector <= VECTOR_MAX);
114
   
116
   
115
    if (vector >= VECTORS_16_BUNDLE_START)
117
    if (vector >= VECTORS_16_BUNDLE_START)
116
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
118
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
117
    else
119
    else
118
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
120
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
119
}
121
}
120
 
122
 
121
void dump_interrupted_context(struct exception_regdump *pstate)
123
void dump_interrupted_context(struct exception_regdump *pstate)
122
{
124
{
123
    char *ifa, *iipa, *iip;
125
    char *ifa, *iipa, *iip;
124
 
126
 
125
    ifa = get_symtab_entry(pstate->cr_ifa);
127
    ifa = get_symtab_entry(pstate->cr_ifa);
126
    iipa = get_symtab_entry(pstate->cr_iipa);
128
    iipa = get_symtab_entry(pstate->cr_iipa);
127
    iip = get_symtab_entry(pstate->cr_iip);
129
    iip = get_symtab_entry(pstate->cr_iip);
128
 
130
 
129
    putchar('\n');
131
    putchar('\n');
130
    printf("Interrupted context dump:\n");
132
    printf("Interrupted context dump:\n");
131
    printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
133
    printf("ar.bsp=%P\tar.bspstore=%P\n", pstate->ar_bsp, pstate->ar_bspstore);
132
    printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
134
    printf("ar.rnat=%Q\tar.rsc=%Q\n", pstate->ar_rnat, pstate->ar_rsc);
133
    printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
135
    printf("ar.ifs=%Q\tar.pfs=%Q\n", pstate->ar_ifs, pstate->ar_pfs);
134
    printf("cr.isr=%Q\tcr.ips=%Q\t\n", pstate->cr_isr.value, pstate->cr_ips);
136
    printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", pstate->cr_isr.value, pstate->cr_ipsr);
135
   
137
   
136
    printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
138
    printf("cr.iip=%Q, #%d\t(%s)\n", pstate->cr_iip, pstate->cr_isr.ei ,iip ? iip : "?");
137
    printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
139
    printf("cr.iipa=%Q\t(%s)\n", pstate->cr_iipa, iipa ? iipa : "?");
138
    printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
140
    printf("cr.ifa=%Q\t(%s)\n", pstate->cr_ifa, ifa ? ifa : "?");
139
}
141
}
140
 
142
 
141
void general_exception(__u64 vector, struct exception_regdump *pstate)
143
void general_exception(__u64 vector, struct exception_regdump *pstate)
142
{
144
{
143
    char *desc = "";
145
    char *desc = "";
144
 
146
 
145
    dump_interrupted_context(pstate);
147
    dump_interrupted_context(pstate);
146
 
148
 
147
    switch (pstate->cr_isr.ge_code) {
149
    switch (pstate->cr_isr.ge_code) {
148
        case GE_ILLEGALOP:
150
        case GE_ILLEGALOP:
149
        desc = "Illegal Operation fault";
151
        desc = "Illegal Operation fault";
150
        break;
152
        break;
151
        case GE_PRIVOP:
153
        case GE_PRIVOP:
152
        desc = "Privileged Operation fault";
154
        desc = "Privileged Operation fault";
153
        break;
155
        break;
154
        case GE_PRIVREG:
156
        case GE_PRIVREG:
155
        desc = "Privileged Register fault";
157
        desc = "Privileged Register fault";
156
        break;
158
        break;
157
        case GE_RESREGFLD:
159
        case GE_RESREGFLD:
158
        desc = "Reserved Register/Field fault";
160
        desc = "Reserved Register/Field fault";
159
        break;
161
        break;
160
        case GE_DISBLDISTRAN:
162
        case GE_DISBLDISTRAN:
161
        desc = "Disabled Instruction Set Transition fault";
163
        desc = "Disabled Instruction Set Transition fault";
162
        break;
164
        break;
163
        case GE_ILLEGALDEP:
165
        case GE_ILLEGALDEP:
164
        desc = "Illegal Dependency fault";
166
        desc = "Illegal Dependency fault";
165
        break;
167
        break;
166
        default:
168
        default:
167
            desc = "unknown";
169
            desc = "unknown";
168
        break;
170
        break;
169
    }
171
    }
170
 
172
 
171
    panic("General Exception (%s)\n", desc);
173
    panic("General Exception (%s)\n", desc);
172
}
174
}
173
 
175
 
-
 
176
/** Handle syscall. */
174
void break_instruction(__u64 vector, struct exception_regdump *pstate)
177
int break_instruction(__u64 vector, struct exception_regdump *pstate)
175
{
178
{
-
 
179
    /*
-
 
180
     * Move to next instruction after BREAK.
-
 
181
     */
-
 
182
    if (pstate->cr_ipsr.ri == 2) {
-
 
183
        pstate->cr_ipsr.ri = 0;
-
 
184
        pstate->cr_iip += 16;
-
 
185
    } else {
176
    dump_interrupted_context(pstate);
186
        pstate->cr_ipsr.ri++;
-
 
187
    }
-
 
188
 
-
 
189
    if (pstate->in0 < SYSCALL_END)
-
 
190
        return syscall_table[pstate->in0](pstate->in1, pstate->in2, pstate->in3);
-
 
191
    else
177
    panic("Break Instruction\n");
192
        panic("Undefined syscall %d", pstate->in0);
-
 
193
       
-
 
194
    return -1;
178
}
195
}
179
 
196
 
180
void universal_handler(__u64 vector, struct exception_regdump *pstate)
197
void universal_handler(__u64 vector, struct exception_regdump *pstate)
181
{
198
{
182
    dump_interrupted_context(pstate);
199
    dump_interrupted_context(pstate);
183
    panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
200
    panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
184
}
201
}
185
 
202
 
186
void external_interrupt(__u64 vector, struct exception_regdump *pstate)
203
void external_interrupt(__u64 vector, struct exception_regdump *pstate)
187
{
204
{
188
    cr_ivr_t ivr;
205
    cr_ivr_t ivr;
189
   
206
   
190
    ivr.value = ivr_read();
207
    ivr.value = ivr_read();
191
    srlz_d();
208
    srlz_d();
192
 
209
 
193
    switch(ivr.vector) {
210
    switch(ivr.vector) {
194
        case INTERRUPT_TIMER:
211
        case INTERRUPT_TIMER:
195
        it_interrupt();
212
        it_interrupt();
196
            break;
213
            break;
197
        case INTERRUPT_SPURIOUS:
214
        case INTERRUPT_SPURIOUS:
198
            printf("cpu%d: spurious interrupt\n", CPU->id);
215
            printf("cpu%d: spurious interrupt\n", CPU->id);
199
        break;
216
        break;
200
        default:
217
        default:
201
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
218
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
202
        break;
219
        break;
203
    }
220
    }
204
}
221
}
205
 
222