WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/interrupt.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * Copyright (C) 2005 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#include <arch/interrupt.h>
#include <panic.h>
#include <print.h>
#include <console/console.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/register.h>
#include <arch/drivers/it.h>
#include <arch.h>
#include <symtab.h>
#include <debug.h>
#include <syscall/syscall.h>
#include <print.h>
#include <proc/scheduler.h>
 
#define VECTORS_64_BUNDLE   20
#define VECTORS_16_BUNDLE   48
#define VECTORS_16_BUNDLE_START 0x5000
#define VECTOR_MAX      0x7f00
 
#define BUNDLE_SIZE     16
 
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
    "VHPT Translation vector",
    "Instruction TLB vector",
    "Data TLB vector",
    "Alternate Instruction TLB vector",
    "Alternate Data TLB vector",
    "Data Nested TLB vector",
    "Instruction Key Miss vector",
    "Data Key Miss vector",
    "Dirty-Bit vector",
    "Instruction Access-Bit vector",
    "Data Access-Bit vector"
    "Break Instruction vector",
    "External Interrupt vector"
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
    "Page Not Present vector",
    "Key Permission vector",
    "Instruction Access rights vector",
    "Data Access Rights vector",
    "General Exception vector",
    "Disabled FP-Register vector",
    "NaT Consumption vector",
    "Speculation vector",
    "Reserved",
    "Debug vector",
    "Unaligned Reference vector",
    "Unsupported Data Reference vector",
    "Floating-point Fault vector",
    "Floating-point Trap vector",
    "Lower-Privilege Transfer Trap vector",
    "Taken Branch Trap vector",
    "Single STep Trap vector",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "IA-32 Exception vector",
    "IA-32 Intercept vector",
    "IA-32 Interrupt vector",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
static char *vector_to_string(__u16 vector);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(__u16 vector)
{
    ASSERT(vector <= VECTOR_MAX);
   
    if (vector >= VECTORS_16_BUNDLE_START)
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
    else
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
}
 
void dump_interrupted_context(istate_t *istate)
{
    char *ifa, *iipa, *iip;
 
    ifa = get_symtab_entry(istate->cr_ifa);
    iipa = get_symtab_entry(istate->cr_iipa);
    iip = get_symtab_entry(istate->cr_iip);
 
    putchar('\n');
    printf("Interrupted context dump:\n");
    printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
    printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
    printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
    printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
   
    printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
    printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
    printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
}
 
void general_exception(__u64 vector, istate_t *istate)
{
    char *desc = "";
 
    dump_interrupted_context(istate);
 
    switch (istate->cr_isr.ge_code) {
        case GE_ILLEGALOP:
        desc = "Illegal Operation fault";
        break;
        case GE_PRIVOP:
        desc = "Privileged Operation fault";
        break;
        case GE_PRIVREG:
        desc = "Privileged Register fault";
        break;
        case GE_RESREGFLD:
        desc = "Reserved Register/Field fault";
        break;
        case GE_DISBLDISTRAN:
        desc = "Disabled Instruction Set Transition fault";
        break;
        case GE_ILLEGALDEP:
        desc = "Illegal Dependency fault";
        break;
        default:
            desc = "unknown";
        break;
    }
 
    panic("General Exception (%s)\n", desc);
}
 
 
void disabled_fp_register(__u64 vector, istate_t *istate)
{
#ifdef CONFIG_CPU_LAZY
    scheduler_fpu_lazy_request();  
#endif
}
 
 
void nop_handler(__u64 vector, istate_t *istate)
{
}
 
 
 
/** Handle syscall. */
int break_instruction(__u64 vector, istate_t *istate)
{
    /*
     * Move to next instruction after BREAK.
     */
    if (istate->cr_ipsr.ri == 2) {
        istate->cr_ipsr.ri = 0;
        istate->cr_iip += 16;
    } else {
        istate->cr_ipsr.ri++;
    }
 
    if (istate->in4 < SYSCALL_END)
        return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
    else
        panic("Undefined syscall %d", istate->in4);
       
    return -1;
}
 
void universal_handler(__u64 vector, istate_t *istate)
{
    dump_interrupted_context(istate);
    panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
}
 
void external_interrupt(__u64 vector, istate_t *istate)
{
    cr_ivr_t ivr;
   
    ivr.value = ivr_read();
    srlz_d();
 
    switch(ivr.vector) {
        case INTERRUPT_TIMER:
        it_interrupt();
            break;
        case INTERRUPT_SPURIOUS:
            printf("cpu%d: spurious interrupt\n", CPU->id);
        break;
        default:
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
        break;
    }
}
 

Rev 962	Rev 1023
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* Copyright (C) 2005 Jakub Vana	3	* Copyright (C) 2005 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*	28	*
29	*/	29	*/
30		30
31	#include <arch/interrupt.h>	31	#include <arch/interrupt.h>
32	#include <panic.h>	32	#include <panic.h>
33	#include <print.h>	33	#include <print.h>
34	#include <console/console.h>	34	#include <console/console.h>
35	#include <arch/types.h>	35	#include <arch/types.h>
36	#include <arch/asm.h>	36	#include <arch/asm.h>
37	#include <arch/barrier.h>	37	#include <arch/barrier.h>
38	#include <arch/register.h>	38	#include <arch/register.h>
39	#include <arch/drivers/it.h>	39	#include <arch/drivers/it.h>
40	#include <arch.h>	40	#include <arch.h>
41	#include <symtab.h>	41	#include <symtab.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <syscall/syscall.h>	43	#include <syscall/syscall.h>
44	#include <print.h>	44	#include <print.h>
-		45	#include <proc/scheduler.h>
45		46
46	#define VECTORS_64_BUNDLE 20	47	#define VECTORS_64_BUNDLE 20
47	#define VECTORS_16_BUNDLE 48	48	#define VECTORS_16_BUNDLE 48
48	#define VECTORS_16_BUNDLE_START 0x5000	49	#define VECTORS_16_BUNDLE_START 0x5000
49	#define VECTOR_MAX 0x7f00	50	#define VECTOR_MAX 0x7f00
50		51
51	#define BUNDLE_SIZE 16	52	#define BUNDLE_SIZE 16
52		53
53	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {	54	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
54	"VHPT Translation vector",	55	"VHPT Translation vector",
55	"Instruction TLB vector",	56	"Instruction TLB vector",
56	"Data TLB vector",	57	"Data TLB vector",
57	"Alternate Instruction TLB vector",	58	"Alternate Instruction TLB vector",
58	"Alternate Data TLB vector",	59	"Alternate Data TLB vector",
59	"Data Nested TLB vector",	60	"Data Nested TLB vector",
60	"Instruction Key Miss vector",	61	"Instruction Key Miss vector",
61	"Data Key Miss vector",	62	"Data Key Miss vector",
62	"Dirty-Bit vector",	63	"Dirty-Bit vector",
63	"Instruction Access-Bit vector",	64	"Instruction Access-Bit vector",
64	"Data Access-Bit vector"	65	"Data Access-Bit vector"
65	"Break Instruction vector",	66	"Break Instruction vector",
66	"External Interrupt vector"	67	"External Interrupt vector"
67	"Reserved",	68	"Reserved",
68	"Reserved",	69	"Reserved",
69	"Reserved",	70	"Reserved",
70	"Reserved",	71	"Reserved",
71	"Reserved",	72	"Reserved",
72	"Reserved",	73	"Reserved",
73	"Reserved"	74	"Reserved"
74	};	75	};
75		76
76	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {	77	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
77	"Page Not Present vector",	78	"Page Not Present vector",
78	"Key Permission vector",	79	"Key Permission vector",
79	"Instruction Access rights vector",	80	"Instruction Access rights vector",
80	"Data Access Rights vector",	81	"Data Access Rights vector",
81	"General Exception vector",	82	"General Exception vector",
82	"Disabled FP-Register vector",	83	"Disabled FP-Register vector",
83	"NaT Consumption vector",	84	"NaT Consumption vector",
84	"Speculation vector",	85	"Speculation vector",
85	"Reserved",	86	"Reserved",
86	"Debug vector",	87	"Debug vector",
87	"Unaligned Reference vector",	88	"Unaligned Reference vector",
88	"Unsupported Data Reference vector",	89	"Unsupported Data Reference vector",
89	"Floating-point Fault vector",	90	"Floating-point Fault vector",
90	"Floating-point Trap vector",	91	"Floating-point Trap vector",
91	"Lower-Privilege Transfer Trap vector",	92	"Lower-Privilege Transfer Trap vector",
92	"Taken Branch Trap vector",	93	"Taken Branch Trap vector",
93	"Single STep Trap vector",	94	"Single STep Trap vector",
94	"Reserved",	95	"Reserved",
95	"Reserved",	96	"Reserved",
96	"Reserved",	97	"Reserved",
97	"Reserved",	98	"Reserved",
98	"Reserved",	99	"Reserved",
99	"Reserved",	100	"Reserved",
100	"Reserved",	101	"Reserved",
101	"Reserved",	102	"Reserved",
102	"IA-32 Exception vector",	103	"IA-32 Exception vector",
103	"IA-32 Intercept vector",	104	"IA-32 Intercept vector",
104	"IA-32 Interrupt vector",	105	"IA-32 Interrupt vector",
105	"Reserved",	106	"Reserved",
106	"Reserved",	107	"Reserved",
107	"Reserved"	108	"Reserved"
108	};	109	};
109		110
110	static char *vector_to_string(__u16 vector);	111	static char *vector_to_string(__u16 vector);
111	static void dump_interrupted_context(istate_t *istate);	112	static void dump_interrupted_context(istate_t *istate);
112		113
113	char *vector_to_string(__u16 vector)	114	char *vector_to_string(__u16 vector)
114	{	115	{
115	ASSERT(vector <= VECTOR_MAX);	116	ASSERT(vector <= VECTOR_MAX);
116		117
117	if (vector >= VECTORS_16_BUNDLE_START)	118	if (vector >= VECTORS_16_BUNDLE_START)
118	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];	119	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
119	else	120	else
120	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];	121	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
121	}	122	}
122		123
123	void dump_interrupted_context(istate_t *istate)	124	void dump_interrupted_context(istate_t *istate)
124	{	125	{
125	char ifa, iipa, *iip;	126	char ifa, iipa, *iip;
126		127
127	ifa = get_symtab_entry(istate->cr_ifa);	128	ifa = get_symtab_entry(istate->cr_ifa);
128	iipa = get_symtab_entry(istate->cr_iipa);	129	iipa = get_symtab_entry(istate->cr_iipa);
129	iip = get_symtab_entry(istate->cr_iip);	130	iip = get_symtab_entry(istate->cr_iip);
130		131
131	putchar('\n');	132	putchar('\n');
132	printf("Interrupted context dump:\n");	133	printf("Interrupted context dump:\n");
133	printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);	134	printf("ar.bsp=%P\tar.bspstore=%P\n", istate->ar_bsp, istate->ar_bspstore);
134	printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);	135	printf("ar.rnat=%Q\tar.rsc=%Q\n", istate->ar_rnat, istate->ar_rsc);
135	printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);	136	printf("ar.ifs=%Q\tar.pfs=%Q\n", istate->ar_ifs, istate->ar_pfs);
136	printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);	137	printf("cr.isr=%Q\tcr.ipsr=%Q\t\n", istate->cr_isr.value, istate->cr_ipsr);
137		138
138	printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");	139	printf("cr.iip=%Q, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei ,iip ? iip : "?");
139	printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");	140	printf("cr.iipa=%Q\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");
140	printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");	141	printf("cr.ifa=%Q\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");
141	}	142	}
142		143
143	void general_exception(__u64 vector, istate_t *istate)	144	void general_exception(__u64 vector, istate_t *istate)
144	{	145	{
145	char *desc = "";	146	char *desc = "";
146		147
147	dump_interrupted_context(istate);	148	dump_interrupted_context(istate);
148		149
149	switch (istate->cr_isr.ge_code) {	150	switch (istate->cr_isr.ge_code) {
150	case GE_ILLEGALOP:	151	case GE_ILLEGALOP:
151	desc = "Illegal Operation fault";	152	desc = "Illegal Operation fault";
152	break;	153	break;
153	case GE_PRIVOP:	154	case GE_PRIVOP:
154	desc = "Privileged Operation fault";	155	desc = "Privileged Operation fault";
155	break;	156	break;
156	case GE_PRIVREG:	157	case GE_PRIVREG:
157	desc = "Privileged Register fault";	158	desc = "Privileged Register fault";
158	break;	159	break;
159	case GE_RESREGFLD:	160	case GE_RESREGFLD:
160	desc = "Reserved Register/Field fault";	161	desc = "Reserved Register/Field fault";
161	break;	162	break;
162	case GE_DISBLDISTRAN:	163	case GE_DISBLDISTRAN:
163	desc = "Disabled Instruction Set Transition fault";	164	desc = "Disabled Instruction Set Transition fault";
164	break;	165	break;
165	case GE_ILLEGALDEP:	166	case GE_ILLEGALDEP:
166	desc = "Illegal Dependency fault";	167	desc = "Illegal Dependency fault";
167	break;	168	break;
168	default:	169	default:
169	desc = "unknown";	170	desc = "unknown";
170	break;	171	break;
171	}	172	}
172		173
173	panic("General Exception (%s)\n", desc);	174	panic("General Exception (%s)\n", desc);
174	}	175	}
175		176
-		177
-		178	void disabled_fp_register(__u64 vector, istate_t *istate)
-		179	{
-		180	#ifdef CONFIG_CPU_LAZY
-		181	scheduler_fpu_lazy_request();
-		182	#endif
-		183	}
-		184
-		185
-		186	void nop_handler(__u64 vector, istate_t *istate)
-		187	{
-		188	}
-		189
-		190
-		191
176	/** Handle syscall. */	192	/** Handle syscall. */
177	int break_instruction(__u64 vector, istate_t *istate)	193	int break_instruction(__u64 vector, istate_t *istate)
178	{	194	{
179	/*	195	/*
180	* Move to next instruction after BREAK.	196	* Move to next instruction after BREAK.
181	*/	197	*/
182	if (istate->cr_ipsr.ri == 2) {	198	if (istate->cr_ipsr.ri == 2) {
183	istate->cr_ipsr.ri = 0;	199	istate->cr_ipsr.ri = 0;
184	istate->cr_iip += 16;	200	istate->cr_iip += 16;
185	} else {	201	} else {
186	istate->cr_ipsr.ri++;	202	istate->cr_ipsr.ri++;
187	}	203	}
188		204
189	if (istate->in4 < SYSCALL_END)	205	if (istate->in4 < SYSCALL_END)
190	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);	206	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
191	else	207	else
192	panic("Undefined syscall %d", istate->in4);	208	panic("Undefined syscall %d", istate->in4);
193		209
194	return -1;	210	return -1;
195	}	211	}
196		212
197	void universal_handler(__u64 vector, istate_t *istate)	213	void universal_handler(__u64 vector, istate_t *istate)
198	{	214	{
199	dump_interrupted_context(istate);	215	dump_interrupted_context(istate);
200	panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));	216	panic("Interruption: %W (%s)\n", (__u16) vector, vector_to_string(vector));
201	}	217	}
202		218
203	void external_interrupt(__u64 vector, istate_t *istate)	219	void external_interrupt(__u64 vector, istate_t *istate)
204	{	220	{
205	cr_ivr_t ivr;	221	cr_ivr_t ivr;
206		222
207	ivr.value = ivr_read();	223	ivr.value = ivr_read();
208	srlz_d();	224	srlz_d();
209		225
210	switch(ivr.vector) {	226	switch(ivr.vector) {
211	case INTERRUPT_TIMER:	227	case INTERRUPT_TIMER:
212	it_interrupt();	228	it_interrupt();
213	break;	229	break;
214	case INTERRUPT_SPURIOUS:	230	case INTERRUPT_SPURIOUS:
215	printf("cpu%d: spurious interrupt\n", CPU->id);	231	printf("cpu%d: spurious interrupt\n", CPU->id);
216	break;	232	break;
217	default:	233	default:
218	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);	234	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
219	break;	235	break;
220	}	236	}
221	}	237	}
222		238

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/src/interrupt.c @ 1780 – Rev 962 → 1023