WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/interrupt.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * Copyright (C) 2005 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#include <arch/interrupt.h>
#include <panic.h>
#include <print.h>
#include <console/console.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/register.h>
#include <arch/drivers/it.h>
#include <arch.h>
#include <symtab.h>
#include <debug.h>
#include <syscall/syscall.h>
#include <print.h>
#include <proc/scheduler.h>
#include <ipc/sysipc.h>
#include <ipc/irq.h>
#include <ipc/ipc.h>
 
 
#define VECTORS_64_BUNDLE   20
#define VECTORS_16_BUNDLE   48
#define VECTORS_16_BUNDLE_START 0x5000
#define VECTOR_MAX      0x7f00
 
#define BUNDLE_SIZE     16
 
 
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
    "VHPT Translation vector",
    "Instruction TLB vector",
    "Data TLB vector",
    "Alternate Instruction TLB vector",
    "Alternate Data TLB vector",
    "Data Nested TLB vector",
    "Instruction Key Miss vector",
    "Data Key Miss vector",
    "Dirty-Bit vector",
    "Instruction Access-Bit vector",
    "Data Access-Bit vector"
    "Break Instruction vector",
    "External Interrupt vector"
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
    "Page Not Present vector",
    "Key Permission vector",
    "Instruction Access rights vector",
    "Data Access Rights vector",
    "General Exception vector",
    "Disabled FP-Register vector",
    "NaT Consumption vector",
    "Speculation vector",
    "Reserved",
    "Debug vector",
    "Unaligned Reference vector",
    "Unsupported Data Reference vector",
    "Floating-point Fault vector",
    "Floating-point Trap vector",
    "Lower-Privilege Transfer Trap vector",
    "Taken Branch Trap vector",
    "Single STep Trap vector",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "IA-32 Exception vector",
    "IA-32 Intercept vector",
    "IA-32 Interrupt vector",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
static char *vector_to_string(__u16 vector);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(__u16 vector)
{
    ASSERT(vector <= VECTOR_MAX);
   
    if (vector >= VECTORS_16_BUNDLE_START)
        return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
    else
        return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
}
 
void dump_interrupted_context(istate_t *istate)
{
    char *ifa, *iipa, *iip;
 
    ifa = get_symtab_entry(istate->cr_ifa);
    iipa = get_symtab_entry(istate->cr_iipa);
    iip = get_symtab_entry(istate->cr_iip);
 
    putchar('\n');
    printf("Interrupted context dump:\n");
    printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
    printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
    printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
    printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
   
    printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
    printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
    printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
}
 
void general_exception(__u64 vector, istate_t *istate)
{
    char *desc = "";
 
    dump_interrupted_context(istate);
 
    switch (istate->cr_isr.ge_code) {
        case GE_ILLEGALOP:
        desc = "Illegal Operation fault";
        break;
        case GE_PRIVOP:
        desc = "Privileged Operation fault";
        break;
        case GE_PRIVREG:
        desc = "Privileged Register fault";
        break;
        case GE_RESREGFLD:
        desc = "Reserved Register/Field fault";
        break;
        case GE_DISBLDISTRAN:
        desc = "Disabled Instruction Set Transition fault";
        break;
        case GE_ILLEGALDEP:
        desc = "Illegal Dependency fault";
        break;
        default:
            desc = "unknown";
        break;
    }
 
    panic("General Exception (%s)\n", desc);
}
 
void fpu_enable(void);
 
void disabled_fp_register(__u64 vector, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY 
    scheduler_fpu_lazy_request();  
#else
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
#endif
}
 
 
void nop_handler(__u64 vector, istate_t *istate)
{
}
 
 
 
/** Handle syscall. */
int break_instruction(__u64 vector, istate_t *istate)
{
    /*
     * Move to next instruction after BREAK.
     */
    if (istate->cr_ipsr.ri == 2) {
        istate->cr_ipsr.ri = 0;
        istate->cr_iip += 16;
    } else {
        istate->cr_ipsr.ri++;
    }
 
    if (istate->in4 < SYSCALL_END)
        return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
    else
        panic("Undefined syscall %d", istate->in4);
       
    return -1;
}
 
void universal_handler(__u64 vector, istate_t *istate)
{
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
}
 
void external_interrupt(__u64 vector, istate_t *istate)
{
    cr_ivr_t ivr;
   
    ivr.value = ivr_read();
    srlz_d();
 
    switch(ivr.vector) {
        case INTERRUPT_TIMER:
        it_interrupt();
            break;
        case INTERRUPT_SPURIOUS:
            printf("cpu%d: spurious interrupt\n", CPU->id);
        break;
        default:
        panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
        break;
    }
}
 
void virtual_interrupt(__u64 irq,void *param)
{
    switch(irq) {
        case IRQ_KBD:
            if(kbd_uspace) ipc_irq_send_notif(irq);
            break;
        default:
            panic("\nUnhandled Virtual Interrupt request %d\n", irq);
        break;
    }
}
 
/* Reregister irq to be IPC-ready */
void irq_ipc_bind_arch(__native irq)
{
    if(irq==IRQ_KBD) {
        kbd_uspace=1;
        return;
    }
    panic("not implemented\n");
    /* TODO */
}
 
 
 
 

Rev 1265	Rev 1507
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* Copyright (C) 2005 Jakub Vana	3	* Copyright (C) 2005 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*	28	*
29	*/	29	*/
30		30
31	#include <arch/interrupt.h>	31	#include <arch/interrupt.h>
32	#include <panic.h>	32	#include <panic.h>
33	#include <print.h>	33	#include <print.h>
34	#include <console/console.h>	34	#include <console/console.h>
35	#include <arch/types.h>	35	#include <arch/types.h>
36	#include <arch/asm.h>	36	#include <arch/asm.h>
37	#include <arch/barrier.h>	37	#include <arch/barrier.h>
38	#include <arch/register.h>	38	#include <arch/register.h>
39	#include <arch/drivers/it.h>	39	#include <arch/drivers/it.h>
40	#include <arch.h>	40	#include <arch.h>
41	#include <symtab.h>	41	#include <symtab.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <syscall/syscall.h>	43	#include <syscall/syscall.h>
44	#include <print.h>	44	#include <print.h>
45	#include <proc/scheduler.h>	45	#include <proc/scheduler.h>
46	#include <ipc/sysipc.h>	46	#include <ipc/sysipc.h>
-		47	#include <ipc/irq.h>
-		48	#include <ipc/ipc.h>
47		49
48		50
49	#define VECTORS_64_BUNDLE 20	51	#define VECTORS_64_BUNDLE 20
50	#define VECTORS_16_BUNDLE 48	52	#define VECTORS_16_BUNDLE 48
51	#define VECTORS_16_BUNDLE_START 0x5000	53	#define VECTORS_16_BUNDLE_START 0x5000
52	#define VECTOR_MAX 0x7f00	54	#define VECTOR_MAX 0x7f00
53		55
54	#define BUNDLE_SIZE 16	56	#define BUNDLE_SIZE 16
55		57
-		58
56	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {	59	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
57	"VHPT Translation vector",	60	"VHPT Translation vector",
58	"Instruction TLB vector",	61	"Instruction TLB vector",
59	"Data TLB vector",	62	"Data TLB vector",
60	"Alternate Instruction TLB vector",	63	"Alternate Instruction TLB vector",
61	"Alternate Data TLB vector",	64	"Alternate Data TLB vector",
62	"Data Nested TLB vector",	65	"Data Nested TLB vector",
63	"Instruction Key Miss vector",	66	"Instruction Key Miss vector",
64	"Data Key Miss vector",	67	"Data Key Miss vector",
65	"Dirty-Bit vector",	68	"Dirty-Bit vector",
66	"Instruction Access-Bit vector",	69	"Instruction Access-Bit vector",
67	"Data Access-Bit vector"	70	"Data Access-Bit vector"
68	"Break Instruction vector",	71	"Break Instruction vector",
69	"External Interrupt vector"	72	"External Interrupt vector"
70	"Reserved",	73	"Reserved",
71	"Reserved",	74	"Reserved",
72	"Reserved",	75	"Reserved",
73	"Reserved",	76	"Reserved",
74	"Reserved",	77	"Reserved",
75	"Reserved",	78	"Reserved",
76	"Reserved"	79	"Reserved"
77	};	80	};
78		81
79	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {	82	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
80	"Page Not Present vector",	83	"Page Not Present vector",
81	"Key Permission vector",	84	"Key Permission vector",
82	"Instruction Access rights vector",	85	"Instruction Access rights vector",
83	"Data Access Rights vector",	86	"Data Access Rights vector",
84	"General Exception vector",	87	"General Exception vector",
85	"Disabled FP-Register vector",	88	"Disabled FP-Register vector",
86	"NaT Consumption vector",	89	"NaT Consumption vector",
87	"Speculation vector",	90	"Speculation vector",
88	"Reserved",	91	"Reserved",
89	"Debug vector",	92	"Debug vector",
90	"Unaligned Reference vector",	93	"Unaligned Reference vector",
91	"Unsupported Data Reference vector",	94	"Unsupported Data Reference vector",
92	"Floating-point Fault vector",	95	"Floating-point Fault vector",
93	"Floating-point Trap vector",	96	"Floating-point Trap vector",
94	"Lower-Privilege Transfer Trap vector",	97	"Lower-Privilege Transfer Trap vector",
95	"Taken Branch Trap vector",	98	"Taken Branch Trap vector",
96	"Single STep Trap vector",	99	"Single STep Trap vector",
97	"Reserved",	100	"Reserved",
98	"Reserved",	101	"Reserved",
99	"Reserved",	102	"Reserved",
100	"Reserved",	103	"Reserved",
101	"Reserved",	104	"Reserved",
102	"Reserved",	105	"Reserved",
103	"Reserved",	106	"Reserved",
104	"Reserved",	107	"Reserved",
105	"IA-32 Exception vector",	108	"IA-32 Exception vector",
106	"IA-32 Intercept vector",	109	"IA-32 Intercept vector",
107	"IA-32 Interrupt vector",	110	"IA-32 Interrupt vector",
108	"Reserved",	111	"Reserved",
109	"Reserved",	112	"Reserved",
110	"Reserved"	113	"Reserved"
111	};	114	};
112		115
113	static char *vector_to_string(__u16 vector);	116	static char *vector_to_string(__u16 vector);
114	static void dump_interrupted_context(istate_t *istate);	117	static void dump_interrupted_context(istate_t *istate);
115		118
116	char *vector_to_string(__u16 vector)	119	char *vector_to_string(__u16 vector)
117	{	120	{
118	ASSERT(vector <= VECTOR_MAX);	121	ASSERT(vector <= VECTOR_MAX);
119		122
120	if (vector >= VECTORS_16_BUNDLE_START)	123	if (vector >= VECTORS_16_BUNDLE_START)
121	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];	124	return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
122	else	125	else
123	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];	126	return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
124	}	127	}
125		128
126	void dump_interrupted_context(istate_t *istate)	129	void dump_interrupted_context(istate_t *istate)
127	{	130	{
128	char ifa, iipa, *iip;	131	char ifa, iipa, *iip;
129		132
130	ifa = get_symtab_entry(istate->cr_ifa);	133	ifa = get_symtab_entry(istate->cr_ifa);
131	iipa = get_symtab_entry(istate->cr_iipa);	134	iipa = get_symtab_entry(istate->cr_iipa);
132	iip = get_symtab_entry(istate->cr_iip);	135	iip = get_symtab_entry(istate->cr_iip);
133		136
134	putchar('\n');	137	putchar('\n');
135	printf("Interrupted context dump:\n");	138	printf("Interrupted context dump:\n");
136	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);	139	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
137	printf("ar.rnat=%#llx\tar.rsc=%$llx\n", istate->ar_rnat, istate->ar_rsc);	140	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
138	printf("ar.ifs=%#llx\tar.pfs=%#llx\n", istate->ar_ifs, istate->ar_pfs);	141	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
139	printf("cr.isr=%#llx\tcr.ipsr=%#llx\t\n", istate->cr_isr.value, istate->cr_ipsr);	142	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
140		143
141	printf("cr.iip=%#llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip ? iip : "?");	144	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
142	printf("cr.iipa=%#llx\t(%s)\n", istate->cr_iipa, iipa ? iipa : "?");	145	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
143	printf("cr.ifa=%#llx\t(%s)\n", istate->cr_ifa, ifa ? ifa : "?");	146	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
144	}	147	}
145		148
146	void general_exception(__u64 vector, istate_t *istate)	149	void general_exception(__u64 vector, istate_t *istate)
147	{	150	{
148	char *desc = "";	151	char *desc = "";
149		152
150	dump_interrupted_context(istate);	153	dump_interrupted_context(istate);
151		154
152	switch (istate->cr_isr.ge_code) {	155	switch (istate->cr_isr.ge_code) {
153	case GE_ILLEGALOP:	156	case GE_ILLEGALOP:
154	desc = "Illegal Operation fault";	157	desc = "Illegal Operation fault";
155	break;	158	break;
156	case GE_PRIVOP:	159	case GE_PRIVOP:
157	desc = "Privileged Operation fault";	160	desc = "Privileged Operation fault";
158	break;	161	break;
159	case GE_PRIVREG:	162	case GE_PRIVREG:
160	desc = "Privileged Register fault";	163	desc = "Privileged Register fault";
161	break;	164	break;
162	case GE_RESREGFLD:	165	case GE_RESREGFLD:
163	desc = "Reserved Register/Field fault";	166	desc = "Reserved Register/Field fault";
164	break;	167	break;
165	case GE_DISBLDISTRAN:	168	case GE_DISBLDISTRAN:
166	desc = "Disabled Instruction Set Transition fault";	169	desc = "Disabled Instruction Set Transition fault";
167	break;	170	break;
168	case GE_ILLEGALDEP:	171	case GE_ILLEGALDEP:
169	desc = "Illegal Dependency fault";	172	desc = "Illegal Dependency fault";
170	break;	173	break;
171	default:	174	default:
172	desc = "unknown";	175	desc = "unknown";
173	break;	176	break;
174	}	177	}
175		178
176	panic("General Exception (%s)\n", desc);	179	panic("General Exception (%s)\n", desc);
177	}	180	}
178		181
179	void fpu_enable(void);	182	void fpu_enable(void);
180		183
181	void disabled_fp_register(__u64 vector, istate_t *istate)	184	void disabled_fp_register(__u64 vector, istate_t *istate)
182	{	185	{
183	#ifdef CONFIG_FPU_LAZY	186	#ifdef CONFIG_FPU_LAZY
184	scheduler_fpu_lazy_request();	187	scheduler_fpu_lazy_request();
185	#else	188	#else
186	dump_interrupted_context(istate);	189	dump_interrupted_context(istate);
187	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	190	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
188	#endif	191	#endif
189	}	192	}
190		193
191		194
192	void nop_handler(__u64 vector, istate_t *istate)	195	void nop_handler(__u64 vector, istate_t *istate)
193	{	196	{
194	}	197	}
195		198
196		199
197		200
198	/** Handle syscall. */	201	/** Handle syscall. */
199	int break_instruction(__u64 vector, istate_t *istate)	202	int break_instruction(__u64 vector, istate_t *istate)
200	{	203	{
201	/*	204	/*
202	* Move to next instruction after BREAK.	205	* Move to next instruction after BREAK.
203	*/	206	*/
204	if (istate->cr_ipsr.ri == 2) {	207	if (istate->cr_ipsr.ri == 2) {
205	istate->cr_ipsr.ri = 0;	208	istate->cr_ipsr.ri = 0;
206	istate->cr_iip += 16;	209	istate->cr_iip += 16;
207	} else {	210	} else {
208	istate->cr_ipsr.ri++;	211	istate->cr_ipsr.ri++;
209	}	212	}
210		213
211	if (istate->in4 < SYSCALL_END)	214	if (istate->in4 < SYSCALL_END)
212	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);	215	return syscall_table[istate->in4](istate->in0, istate->in1, istate->in2, istate->in3);
213	else	216	else
214	panic("Undefined syscall %d", istate->in4);	217	panic("Undefined syscall %d", istate->in4);
215		218
216	return -1;	219	return -1;
217	}	220	}
218		221
219	void universal_handler(__u64 vector, istate_t *istate)	222	void universal_handler(__u64 vector, istate_t *istate)
220	{	223	{
221	dump_interrupted_context(istate);	224	dump_interrupted_context(istate);
222	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));	225	panic("Interruption: %#hx (%s)\n", (__u16) vector, vector_to_string(vector));
223	}	226	}
224		227
225	void external_interrupt(__u64 vector, istate_t *istate)	228	void external_interrupt(__u64 vector, istate_t *istate)
226	{	229	{
227	cr_ivr_t ivr;	230	cr_ivr_t ivr;
228		231
229	ivr.value = ivr_read();	232	ivr.value = ivr_read();
230	srlz_d();	233	srlz_d();
231		234
232	switch(ivr.vector) {	235	switch(ivr.vector) {
233	case INTERRUPT_TIMER:	236	case INTERRUPT_TIMER:
234	it_interrupt();	237	it_interrupt();
235	break;	238	break;
236	case INTERRUPT_SPURIOUS:	239	case INTERRUPT_SPURIOUS:
237	printf("cpu%d: spurious interrupt\n", CPU->id);	240	printf("cpu%d: spurious interrupt\n", CPU->id);
238	break;	241	break;
239	default:	242	default:
240	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);	243	panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
241	break;	244	break;
242	}	245	}
243	}	246	}
244		247
-		248	void virtual_interrupt(__u64 irq,void *param)
-		249	{
-		250	switch(irq) {
-		251	case IRQ_KBD:
-		252	if(kbd_uspace) ipc_irq_send_notif(irq);
-		253	break;
-		254	default:
-		255	panic("\nUnhandled Virtual Interrupt request %d\n", irq);
-		256	break;
-		257	}
-		258	}
-		259
245	/* Reregister irq to be IPC-ready */	260	/* Reregister irq to be IPC-ready */
246	void irq_ipc_bind_arch(__native irq)	261	void irq_ipc_bind_arch(__native irq)
247	{	262	{
-		263	if(irq==IRQ_KBD) {
-		264	kbd_uspace=1;
-		265	return;
-		266	}
248	panic("not implemented\n");	267	panic("not implemented\n");
249	/* TODO */	268	/* TODO */
250	}	269	}
-		270
-		271
-		272
251		273

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(root)/kernel/trunk/arch/ia64/src/interrupt.c – Rev 1265 → 1507