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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#include <arch.h>
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#include <arch.h>
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#include <arch/ski/ski.h>
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#include <arch/ski/ski.h>
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#include <arch/drivers/it.h>
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#include <arch/drivers/it.h>
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#include <arch/interrupt.h>
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#include <arch/interrupt.h>
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#include <arch/barrier.h>
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#include <arch/barrier.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <arch/register.h>
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#include <arch/register.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch/context.h>
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#include <arch/context.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/mm/page.h>
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#include <arch/mm/page.h>
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#include <mm/as.h>
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#include <mm/as.h>
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#include <config.h>
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#include <config.h>
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#include <userspace.h>
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#include <userspace.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <proc/uarg.h>
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#include <proc/uarg.h>
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#include <syscall/syscall.h>
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#include <syscall/syscall.h>
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void arch_pre_main(void)
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void arch_pre_main(void)
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{
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{
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    /* Setup usermode init tasks. */
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    /* Setup usermode init tasks. */
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    init.cnt = 5;
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    init.cnt = 6;
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    init.tasks[0].addr = INIT0_ADDRESS;
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    init.tasks[0].addr = INIT0_ADDRESS;
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    init.tasks[0].size = INIT0_SIZE;
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    init.tasks[0].size = INIT0_SIZE;
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    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
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    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
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    init.tasks[1].size = INIT0_SIZE;
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    init.tasks[1].size = INIT0_SIZE;
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    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
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    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
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    init.tasks[2].size = INIT0_SIZE;
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    init.tasks[2].size = INIT0_SIZE;
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    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
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    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
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    init.tasks[3].size = INIT0_SIZE;
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    init.tasks[3].size = INIT0_SIZE;
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    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
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    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
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    init.tasks[4].size = INIT0_SIZE;
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    init.tasks[4].size = INIT0_SIZE;
-
 
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    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
-
 
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    init.tasks[5].size = INIT0_SIZE;
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}
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}
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void arch_pre_mm_init(void)
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void arch_pre_mm_init(void)
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{
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{
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    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
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    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
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    iva_write((__address) &ivt);
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    iva_write((__address) &ivt);
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    srlz_d();
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    srlz_d();
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    ski_init_console();
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    ski_init_console();
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    it_init(); 
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    it_init(); 
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}
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}
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void arch_post_mm_init(void)
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void arch_post_mm_init(void)
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{
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{
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    ski_set_console_sysinfo();
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    ski_set_console_sysinfo();
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}
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}
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void arch_pre_smp_init(void)
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void arch_pre_smp_init(void)
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{
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{
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}
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}
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void arch_post_smp_init(void)
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void arch_post_smp_init(void)
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{
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{
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}
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}
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/** Enter userspace and never return. */
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/** Enter userspace and never return. */
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void userspace(uspace_arg_t *kernel_uarg)
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void userspace(uspace_arg_t *kernel_uarg)
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{
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{
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    psr_t psr;
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    psr_t psr;
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    rsc_t rsc;
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    rsc_t rsc;
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    psr.value = psr_read();
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    psr.value = psr_read();
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    psr.cpl = PL_USER;
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    psr.cpl = PL_USER;
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    psr.i = true;               /* start with interrupts enabled */
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    psr.i = true;               /* start with interrupts enabled */
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    psr.ic = true;
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    psr.ic = true;
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    psr.ri = 0;             /* start with instruction #0 */
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    psr.ri = 0;             /* start with instruction #0 */
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    psr.bn = 1;             /* start in bank 0 */
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    psr.bn = 1;             /* start in bank 0 */
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    __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
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    __asm__ volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
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    rsc.loadrs = 0;
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    rsc.loadrs = 0;
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    rsc.be = false;
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    rsc.be = false;
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    rsc.pl = PL_USER;
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    rsc.pl = PL_USER;
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    rsc.mode = 3;               /* eager mode */
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    rsc.mode = 3;               /* eager mode */
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    switch_to_userspace((__address) kernel_uarg->uspace_entry,
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    switch_to_userspace((__address) kernel_uarg->uspace_entry,
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                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
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                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
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                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE,
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                ((__address) kernel_uarg->uspace_stack)+PAGE_SIZE,
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                (__address) kernel_uarg->uspace_uarg,
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                (__address) kernel_uarg->uspace_uarg,
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                psr.value, rsc.value);
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                psr.value, rsc.value);
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    while (1) {
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    while (1) {
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        ;
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        ;
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    }
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    }
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}
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}
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/** Set thread-local-storage pointer.
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/** Set thread-local-storage pointer.
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 *
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 *
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 * We use r13 (a.k.a. tp) for this purpose.
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 * We use r13 (a.k.a. tp) for this purpose.
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 */
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 */
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__native sys_tls_set(__native addr)
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__native sys_tls_set(__native addr)
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{
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{
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        return 0;
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        return 0;
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}
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}
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/** Acquire console back for kernel
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/** Acquire console back for kernel
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 *
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 *
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 */
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 */
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void arch_grab_console(void)
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void arch_grab_console(void)
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{
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{
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}
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}
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/** Return console to userspace
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/** Return console to userspace
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 *
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 *
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 */
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 */
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void arch_release_console(void)
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void arch_release_console(void)
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{
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{
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}
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}
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