WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/src/context.S


#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global context_save_arch
.global context_restore_arch
 
context_save_arch:
	alloc loc0 = ar.pfs, 1, 8, 0, 0
	mov loc1 = ar.unat	;;
	/* loc2 */
	mov loc3 = ar.rsc
 
	.auto
 
	/*
	 * Flush dirty registers to backing store.
	 * After this ar.bsp and ar.bspstore are equal.
	 */
	flushrs
	mov loc4 = ar.bsp	
	
	/*
	 * Put RSE to enforced lazy mode.
	 * So that ar.rnat can be read.
	 */
 
	and loc5 = ~3, loc3
	mov ar.rsc = loc5
	mov loc5 = ar.rnat
 
	.explicit
 
	mov loc6 = ar.lc
	
	/*
	 * Save application registers
	 */
	st8 [in0] = loc0, 8	;;	/* save ar.pfs */
	st8 [in0] = loc1, 8	;;	/* save ar.unat (caller) */
	mov loc2 = in0		;;
	add in0 = 8, in0	;;	/* skip ar.unat (callee) */
	st8 [in0] = loc3, 8	;;	/* save ar.rsc */
	st8 [in0] = loc4, 8	;;	/* save ar.bsp */
	st8 [in0] = loc5, 8	;;	/* save ar.rnat */
	st8 [in0] = loc6, 8	;;	/* save ar.lc */
	
	/*
	 * Save general registers including NaT bits
	 */
	st8.spill [in0] = r1, 8		;;
	st8.spill [in0] = r4, 8		;;
	st8.spill [in0] = r5, 8		;;
	st8.spill [in0] = r6, 8		;;
	st8.spill [in0] = r7, 8		;;
	st8.spill [in0] = r12, 8	;;	/* save sp */
	st8.spill [in0] = r13, 8	;;
 
	mov loc3 = ar.unat		;;
	st8 [loc2] = loc3		/* save ar.unat (callee) */
 
	/*
	 * Save branch registers
	 */
	mov loc2 = b0		;;
	st8 [in0] = loc2, 8		/* save pc */
	mov loc3 = b1		;;
	st8 [in0] = loc3, 8
	mov loc4 = b2		;;
	st8 [in0] = loc4, 8
	mov loc5 = b3		;;
	st8 [in0] = loc5, 8
	mov loc6 = b4		;;
	st8 [in0] = loc6, 8
	mov loc7 = b5		;;
	st8 [in0] = loc7, 8
 
	/*
	 * Save predicate registers
	 */
	mov loc2 = pr		;;
	st8 [in0] = loc2, 8
	
	mov ar.unat = loc1
	
	add r8 = r0, r0, 1 		/* context_save returns 1 */
	br.ret.sptk.many b0
 
context_restore_arch:
	alloc loc0 = ar.pfs, 1, 9, 0, 0	;;
 
	ld8 loc0 = [in0], 8	;;	/* load ar.pfs */
	ld8 loc1 = [in0], 8	;;	/* load ar.unat (caller) */
	ld8 loc2 = [in0], 8	;;	/* load ar.unat (callee) */
	ld8 loc3 = [in0], 8	;;	/* load ar.rsc */
	ld8 loc4 = [in0], 8	;;	/* load ar.bsp */
	ld8 loc5 = [in0], 8	;;	/* load ar.rnat */
	ld8 loc6 = [in0], 8	;;	/* load ar.lc */
	
	.auto	
 
	/*
	 * Invalidate the ALAT
	 */
	invala
 
	/*
	 * Put RSE to enforced lazy mode.
	 * So that ar.bspstore and ar.rnat can be written.
	 */
	movl loc8 = ~3
	and loc8 = loc3, loc8
	mov ar.rsc = loc8
 
	/*
	 * Flush dirty registers to backing store.
	 * We do this because we want the following move
	 * to ar.bspstore to assign the same value to ar.bsp.
	 */
	flushrs
 
	/*
	 * Restore application registers
	 */
	mov ar.bspstore = loc4	/* rse.bspload = ar.bsp = ar.bspstore = loc4 */
	mov ar.rnat = loc5
	mov ar.pfs = loc0
	mov ar.rsc = loc3
 
	.explicit
 
	mov ar.unat = loc2	;;
	mov ar.lc = loc6
	
	/*
	 * Restore general registers including NaT bits
	 */
	ld8.fill r1 = [in0], 8	;;
	ld8.fill r4 = [in0], 8	;;
	ld8.fill r5 = [in0], 8	;;
	ld8.fill r6 = [in0], 8	;;
	ld8.fill r7 = [in0], 8	;;
	ld8.fill r12 = [in0], 8	;;	/* restore sp */
	ld8.fill r13 = [in0], 8	;;
 
	/* 
	 * Restore branch registers
	 */
	ld8 loc2 = [in0], 8	;;	/* restore pc */
	mov b0 = loc2
	ld8 loc3 = [in0], 8	;;
	mov b1 = loc3
	ld8 loc4 = [in0], 8	;;
	mov b2 = loc4
	ld8 loc5 = [in0], 8	;;
	mov b3 = loc5
	ld8 loc6 = [in0], 8	;;
	mov b4 = loc6
	ld8 loc7 = [in0], 8	;;
	mov b5 = loc7
 
	/*
	 * Restore predicate registers
	 */
	ld8 loc2 = [in0], 8	;;
	mov pr = loc2, ~0
	
	mov ar.unat = loc1
	
	mov r8 = r0			/* context_restore returns 0 */
	br.ret.sptk.many b0
 

Rev 416	Rev 435
1	#	1	#
2	# Copyright (C) 2005 Jakub Jermar	2	# Copyright (C) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	.text	29	.text
30		30
31	.global context_save_arch	31	.global context_save_arch
32	.global context_restore_arch	32	.global context_restore_arch
33		33
34	context_save_arch:	34	context_save_arch:
35	alloc loc0 = ar.pfs, 1, 8, 0, 0	35	alloc loc0 = ar.pfs, 1, 8, 0, 0
36	mov loc1 = ar.unat ;;	36	mov loc1 = ar.unat ;;
37	/* loc2 */	37	/* loc2 */
38	mov loc3 = ar.rsc	38	mov loc3 = ar.rsc
39		39
40	.auto	40	.auto
41		41
42	/*	42	/*
43	* Flush dirty registers to backing store.	43	* Flush dirty registers to backing store.
44	* After this ar.bsp and ar.bspstore are equal.	44	* After this ar.bsp and ar.bspstore are equal.
45	*/	45	*/
46	flushrs	46	flushrs
47	mov loc4 = ar.bsp	47	mov loc4 = ar.bsp
48		48
49	/*	49	/*
50	* Put RSE to enforced lazy mode.	50	* Put RSE to enforced lazy mode.
51	* So that ar.rnat can be read.	51	* So that ar.rnat can be read.
52	*/	52	*/
53	movl loc5 = ~3	-
54	and loc5 = loc3, loc5	53	and loc5 = ~3, loc3
55	mov ar.rsc = loc5	54	mov ar.rsc = loc5
56	mov loc5 = ar.rnat	55	mov loc5 = ar.rnat
57		56
58	.explicit	57	.explicit
59		58
60	mov loc6 = ar.lc	59	mov loc6 = ar.lc
61		60
62	/*	61	/*
63	* Save application registers	62	* Save application registers
64	*/	63	*/
65	st8 [in0] = loc0, 8 ;; /* save ar.pfs */	64	st8 [in0] = loc0, 8 ;; /* save ar.pfs */
66	st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */	65	st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */
67	mov loc2 = in0 ;;	66	mov loc2 = in0 ;;
68	add in0 = 8, in0 ;; /* skip ar.unat (callee) */	67	add in0 = 8, in0 ;; /* skip ar.unat (callee) */
69	st8 [in0] = loc3, 8 ;; /* save ar.rsc */	68	st8 [in0] = loc3, 8 ;; /* save ar.rsc */
70	st8 [in0] = loc4, 8 ;; /* save ar.bsp */	69	st8 [in0] = loc4, 8 ;; /* save ar.bsp */
71	st8 [in0] = loc5, 8 ;; /* save ar.rnat */	70	st8 [in0] = loc5, 8 ;; /* save ar.rnat */
72	st8 [in0] = loc6, 8 ;; /* save ar.lc */	71	st8 [in0] = loc6, 8 ;; /* save ar.lc */
73		72
74	/*	73	/*
75	* Save general registers including NaT bits	74	* Save general registers including NaT bits
76	*/	75	*/
77	st8.spill [in0] = r1, 8 ;;	76	st8.spill [in0] = r1, 8 ;;
78	st8.spill [in0] = r4, 8 ;;	77	st8.spill [in0] = r4, 8 ;;
79	st8.spill [in0] = r5, 8 ;;	78	st8.spill [in0] = r5, 8 ;;
80	st8.spill [in0] = r6, 8 ;;	79	st8.spill [in0] = r6, 8 ;;
81	st8.spill [in0] = r7, 8 ;;	80	st8.spill [in0] = r7, 8 ;;
82	st8.spill [in0] = r12, 8 ;; /* save sp */	81	st8.spill [in0] = r12, 8 ;; /* save sp */
83	st8.spill [in0] = r13, 8 ;;	82	st8.spill [in0] = r13, 8 ;;
84		83
85	mov loc3 = ar.unat ;;	84	mov loc3 = ar.unat ;;
86	st8 [loc2] = loc3 /* save ar.unat (callee) */	85	st8 [loc2] = loc3 /* save ar.unat (callee) */
87		86
88	/*	87	/*
89	* Save branch registers	88	* Save branch registers
90	*/	89	*/
91	mov loc2 = b0 ;;	90	mov loc2 = b0 ;;
92	st8 [in0] = loc2, 8 /* save pc */	91	st8 [in0] = loc2, 8 /* save pc */
93	mov loc3 = b1 ;;	92	mov loc3 = b1 ;;
94	st8 [in0] = loc3, 8	93	st8 [in0] = loc3, 8
95	mov loc4 = b2 ;;	94	mov loc4 = b2 ;;
96	st8 [in0] = loc4, 8	95	st8 [in0] = loc4, 8
97	mov loc5 = b3 ;;	96	mov loc5 = b3 ;;
98	st8 [in0] = loc5, 8	97	st8 [in0] = loc5, 8
99	mov loc6 = b4 ;;	98	mov loc6 = b4 ;;
100	st8 [in0] = loc6, 8	99	st8 [in0] = loc6, 8
101	mov loc7 = b5 ;;	100	mov loc7 = b5 ;;
102	st8 [in0] = loc7, 8	101	st8 [in0] = loc7, 8
103		102
104	/*	103	/*
105	* Save predicate registers	104	* Save predicate registers
106	*/	105	*/
107	mov loc2 = pr ;;	106	mov loc2 = pr ;;
108	st8 [in0] = loc2, 8	107	st8 [in0] = loc2, 8
109		108
110	mov ar.unat = loc1	109	mov ar.unat = loc1
111		110
112	add r8 = r0, r0, 1 /* context_save returns 1 */	111	add r8 = r0, r0, 1 /* context_save returns 1 */
113	br.ret.sptk.many b0	112	br.ret.sptk.many b0
114		113
115	context_restore_arch:	114	context_restore_arch:
116	alloc loc0 = ar.pfs, 1, 9, 0, 0 ;;	115	alloc loc0 = ar.pfs, 1, 9, 0, 0 ;;
117		116
118	ld8 loc0 = [in0], 8 ;; /* load ar.pfs */	117	ld8 loc0 = [in0], 8 ;; /* load ar.pfs */
119	ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */	118	ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */
120	ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */	119	ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */
121	ld8 loc3 = [in0], 8 ;; /* load ar.rsc */	120	ld8 loc3 = [in0], 8 ;; /* load ar.rsc */
122	ld8 loc4 = [in0], 8 ;; /* load ar.bsp */	121	ld8 loc4 = [in0], 8 ;; /* load ar.bsp */
123	ld8 loc5 = [in0], 8 ;; /* load ar.rnat */	122	ld8 loc5 = [in0], 8 ;; /* load ar.rnat */
124	ld8 loc6 = [in0], 8 ;; /* load ar.lc */	123	ld8 loc6 = [in0], 8 ;; /* load ar.lc */
125		124
126	.auto	125	.auto
127		126
128	/*	127	/*
129	* Invalidate the ALAT	128	* Invalidate the ALAT
130	*/	129	*/
131	invala	130	invala
132		131
133	/*	132	/*
134	* Put RSE to enforced lazy mode.	133	* Put RSE to enforced lazy mode.
135	* So that ar.bspstore and ar.rnat can be written.	134	* So that ar.bspstore and ar.rnat can be written.
136	*/	135	*/
137	movl loc8 = ~3	136	movl loc8 = ~3
138	and loc8 = loc3, loc8	137	and loc8 = loc3, loc8
139	mov ar.rsc = loc8	138	mov ar.rsc = loc8
140		139
141	/*	140	/*
142	* Flush dirty registers to backing store.	141	* Flush dirty registers to backing store.
143	* We do this because we want the following move	142	* We do this because we want the following move
144	* to ar.bspstore to assign the same value to ar.bsp.	143	* to ar.bspstore to assign the same value to ar.bsp.
145	*/	144	*/
146	flushrs	145	flushrs
147		146
148	/*	147	/*
149	* Restore application registers	148	* Restore application registers
150	*/	149	*/
151	mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */	150	mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */
152	mov ar.rnat = loc5	151	mov ar.rnat = loc5
153	mov ar.pfs = loc0	152	mov ar.pfs = loc0
154	mov ar.rsc = loc3	153	mov ar.rsc = loc3
155		154
156	.explicit	155	.explicit
157		156
158	mov ar.unat = loc2 ;;	157	mov ar.unat = loc2 ;;
159	mov ar.lc = loc6	158	mov ar.lc = loc6
160		159
161	/*	160	/*
162	* Restore general registers including NaT bits	161	* Restore general registers including NaT bits
163	*/	162	*/
164	ld8.fill r1 = [in0], 8 ;;	163	ld8.fill r1 = [in0], 8 ;;
165	ld8.fill r4 = [in0], 8 ;;	164	ld8.fill r4 = [in0], 8 ;;
166	ld8.fill r5 = [in0], 8 ;;	165	ld8.fill r5 = [in0], 8 ;;
167	ld8.fill r6 = [in0], 8 ;;	166	ld8.fill r6 = [in0], 8 ;;
168	ld8.fill r7 = [in0], 8 ;;	167	ld8.fill r7 = [in0], 8 ;;
169	ld8.fill r12 = [in0], 8 ;; /* restore sp */	168	ld8.fill r12 = [in0], 8 ;; /* restore sp */
170	ld8.fill r13 = [in0], 8 ;;	169	ld8.fill r13 = [in0], 8 ;;
171		170
172	/*	171	/*
173	* Restore branch registers	172	* Restore branch registers
174	*/	173	*/
175	ld8 loc2 = [in0], 8 ;; /* restore pc */	174	ld8 loc2 = [in0], 8 ;; /* restore pc */
176	mov b0 = loc2	175	mov b0 = loc2
177	ld8 loc3 = [in0], 8 ;;	176	ld8 loc3 = [in0], 8 ;;
178	mov b1 = loc3	177	mov b1 = loc3
179	ld8 loc4 = [in0], 8 ;;	178	ld8 loc4 = [in0], 8 ;;
180	mov b2 = loc4	179	mov b2 = loc4
181	ld8 loc5 = [in0], 8 ;;	180	ld8 loc5 = [in0], 8 ;;
182	mov b3 = loc5	181	mov b3 = loc5
183	ld8 loc6 = [in0], 8 ;;	182	ld8 loc6 = [in0], 8 ;;
184	mov b4 = loc6	183	mov b4 = loc6
185	ld8 loc7 = [in0], 8 ;;	184	ld8 loc7 = [in0], 8 ;;
186	mov b5 = loc7	185	mov b5 = loc7
187		186
188	/*	187	/*
189	* Restore predicate registers	188	* Restore predicate registers
190	*/	189	*/
191	ld8 loc2 = [in0], 8 ;;	190	ld8 loc2 = [in0], 8 ;;
192	mov pr = loc2, ~0	191	mov pr = loc2, ~0
193		192
194	mov ar.unat = loc1	193	mov ar.unat = loc1
195		194
196	mov r8 = r0 /* context_restore returns 0 */	195	mov r8 = r0 /* context_restore returns 0 */
197	br.ret.sptk.many b0	196	br.ret.sptk.many b0
198		197

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/src/context.S @ 1594 – Rev 416 → 435