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| 1 | # |
1 | # |
| 2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
| 3 | # All rights reserved. |
3 | # All rights reserved. |
| 4 | # |
4 | # |
| 5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
| 6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
| 7 | # are met: |
7 | # are met: |
| 8 | # |
8 | # |
| 9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
| 10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
| 11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
| 12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
| 13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
| 14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
| 15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
| 16 | # |
16 | # |
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| 29 | .text |
29 | .text |
| 30 | 30 | ||
| 31 | .global context_save_arch |
31 | .global context_save_arch |
| 32 | .global context_restore_arch |
32 | .global context_restore_arch |
| 33 | 33 | ||
| 34 | context_save_arch: |
34 | context_save_arch: |
| 35 | alloc loc0 = ar.pfs, 1, 8, 0, 0 |
35 | alloc loc0 = ar.pfs, 1, 8, 0, 0 |
| 36 | mov loc1 = ar.unat ;; |
36 | mov loc1 = ar.unat ;; |
| 37 | /* loc2 */ |
37 | /* loc2 */ |
| 38 | mov loc3 = ar.rsc |
38 | mov loc3 = ar.rsc |
| 39 | 39 | ||
| 40 | .auto |
40 | .auto |
| 41 | 41 | ||
| 42 | /* |
42 | /* |
| 43 | * Flush dirty registers to backing store. |
43 | * Flush dirty registers to backing store. |
| 44 | * After this ar.bsp and ar.bspstore are equal. |
44 | * After this ar.bsp and ar.bspstore are equal. |
| 45 | */ |
45 | */ |
| 46 | flushrs |
46 | flushrs |
| 47 | mov loc4 = ar.bsp |
47 | mov loc4 = ar.bsp |
| 48 | 48 | ||
| 49 | /* |
49 | /* |
| 50 | * Put RSE to enforced lazy mode. |
50 | * Put RSE to enforced lazy mode. |
| 51 | * So that ar.rnat can be read. |
51 | * So that ar.rnat can be read. |
| 52 | */ |
52 | */ |
| 53 | and loc5 = ~3, loc3 |
53 | and loc5 = ~3, loc3 |
| 54 | mov ar.rsc = loc5 |
54 | mov ar.rsc = loc5 |
| 55 | mov loc5 = ar.rnat |
55 | mov loc5 = ar.rnat |
| 56 | 56 | ||
| 57 | .explicit |
57 | .explicit |
| 58 | 58 | ||
| 59 | mov loc6 = ar.lc |
59 | mov loc6 = ar.lc |
| 60 | 60 | ||
| 61 | /* |
61 | /* |
| 62 | * Save application registers |
62 | * Save application registers |
| 63 | */ |
63 | */ |
| 64 | st8 [in0] = loc0, 8 ;; /* save ar.pfs */ |
64 | st8 [in0] = loc0, 8 ;; /* save ar.pfs */ |
| 65 | st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ |
65 | st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */ |
| 66 | mov loc2 = in0 ;; |
66 | mov loc2 = in0 ;; |
| 67 | add in0 = 8, in0 ;; /* skip ar.unat (callee) */ |
67 | add in0 = 8, in0 ;; /* skip ar.unat (callee) */ |
| 68 | st8 [in0] = loc3, 8 ;; /* save ar.rsc */ |
68 | st8 [in0] = loc3, 8 ;; /* save ar.rsc */ |
| 69 | st8 [in0] = loc4, 8 ;; /* save ar.bsp */ |
69 | st8 [in0] = loc4, 8 ;; /* save ar.bsp */ |
| 70 | st8 [in0] = loc5, 8 ;; /* save ar.rnat */ |
70 | st8 [in0] = loc5, 8 ;; /* save ar.rnat */ |
| 71 | st8 [in0] = loc6, 8 ;; /* save ar.lc */ |
71 | st8 [in0] = loc6, 8 ;; /* save ar.lc */ |
| 72 | 72 | ||
| 73 | /* |
73 | /* |
| 74 | * Save general registers including NaT bits |
74 | * Save general registers including NaT bits |
| 75 | */ |
75 | */ |
| 76 | st8.spill [in0] = r1, 8 ;; |
76 | st8.spill [in0] = r1, 8 ;; |
| 77 | st8.spill [in0] = r4, 8 ;; |
77 | st8.spill [in0] = r4, 8 ;; |
| 78 | st8.spill [in0] = r5, 8 ;; |
78 | st8.spill [in0] = r5, 8 ;; |
| 79 | st8.spill [in0] = r6, 8 ;; |
79 | st8.spill [in0] = r6, 8 ;; |
| 80 | st8.spill [in0] = r7, 8 ;; |
80 | st8.spill [in0] = r7, 8 ;; |
| 81 | st8.spill [in0] = r12, 8 ;; /* save sp */ |
81 | st8.spill [in0] = r12, 8 ;; /* save sp */ |
| 82 | st8.spill [in0] = r13, 8 ;; |
82 | st8.spill [in0] = r13, 8 ;; |
| 83 | 83 | ||
| 84 | mov loc3 = ar.unat ;; |
84 | mov loc3 = ar.unat ;; |
| 85 | st8 [loc2] = loc3 /* save ar.unat (callee) */ |
85 | st8 [loc2] = loc3 /* save ar.unat (callee) */ |
| 86 | 86 | ||
| 87 | /* |
87 | /* |
| 88 | * Save branch registers |
88 | * Save branch registers |
| 89 | */ |
89 | */ |
| 90 | mov loc2 = b0 ;; |
90 | mov loc2 = b0 ;; |
| 91 | st8 [in0] = loc2, 8 /* save pc */ |
91 | st8 [in0] = loc2, 8 /* save pc */ |
| 92 | mov loc3 = b1 ;; |
92 | mov loc3 = b1 ;; |
| 93 | st8 [in0] = loc3, 8 |
93 | st8 [in0] = loc3, 8 |
| 94 | mov loc4 = b2 ;; |
94 | mov loc4 = b2 ;; |
| 95 | st8 [in0] = loc4, 8 |
95 | st8 [in0] = loc4, 8 |
| 96 | mov loc5 = b3 ;; |
96 | mov loc5 = b3 ;; |
| 97 | st8 [in0] = loc5, 8 |
97 | st8 [in0] = loc5, 8 |
| 98 | mov loc6 = b4 ;; |
98 | mov loc6 = b4 ;; |
| 99 | st8 [in0] = loc6, 8 |
99 | st8 [in0] = loc6, 8 |
| 100 | mov loc7 = b5 ;; |
100 | mov loc7 = b5 ;; |
| 101 | st8 [in0] = loc7, 8 |
101 | st8 [in0] = loc7, 8 |
| 102 | 102 | ||
| 103 | /* |
103 | /* |
| 104 | * Save predicate registers |
104 | * Save predicate registers |
| 105 | */ |
105 | */ |
| 106 | mov loc2 = pr ;; |
106 | mov loc2 = pr ;; |
| - | 107 | st8 [in0] = loc2, 16;; /*Next fpu registers should be spilled to 16B aligned address*/ |
|
| - | 108 | ||
| - | 109 | ||
| - | 110 | stf.spill [in0]=f2,16;; |
|
| - | 111 | stf.spill [in0]=f3,16;; |
|
| - | 112 | stf.spill [in0]=f4,16;; |
|
| - | 113 | stf.spill [in0]=f5,16;; |
|
| - | 114 | ||
| 107 | st8 [in0] = loc2, 8 |
115 | stf.spill [in0]=f16,16;; |
| - | 116 | stf.spill [in0]=f17,16;; |
|
| - | 117 | stf.spill [in0]=f18,16;; |
|
| - | 118 | stf.spill [in0]=f19,16;; |
|
| - | 119 | stf.spill [in0]=f20,16;; |
|
| - | 120 | stf.spill [in0]=f21,16;; |
|
| - | 121 | stf.spill [in0]=f22,16;; |
|
| - | 122 | stf.spill [in0]=f23,16;; |
|
| - | 123 | stf.spill [in0]=f24,16;; |
|
| - | 124 | stf.spill [in0]=f25,16;; |
|
| - | 125 | stf.spill [in0]=f26,16;; |
|
| - | 126 | stf.spill [in0]=f27,16;; |
|
| - | 127 | stf.spill [in0]=f28,16;; |
|
| - | 128 | stf.spill [in0]=f29,16;; |
|
| - | 129 | stf.spill [in0]=f30,16;; |
|
| - | 130 | stf.spill [in0]=f31,16;; |
|
| - | 131 | ||
| 108 | 132 | ||
| 109 | mov ar.unat = loc1 |
133 | mov ar.unat = loc1 |
| 110 | 134 | ||
| 111 | add r8 = r0, r0, 1 /* context_save returns 1 */ |
135 | add r8 = r0, r0, 1 /* context_save returns 1 */ |
| 112 | br.ret.sptk.many b0 |
136 | br.ret.sptk.many b0 |
| 113 | 137 | ||
| 114 | context_restore_arch: |
138 | context_restore_arch: |
| 115 | alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; |
139 | alloc loc0 = ar.pfs, 1, 9, 0, 0 ;; |
| 116 | 140 | ||
| 117 | ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ |
141 | ld8 loc0 = [in0], 8 ;; /* load ar.pfs */ |
| 118 | ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ |
142 | ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */ |
| 119 | ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ |
143 | ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */ |
| 120 | ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ |
144 | ld8 loc3 = [in0], 8 ;; /* load ar.rsc */ |
| 121 | ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ |
145 | ld8 loc4 = [in0], 8 ;; /* load ar.bsp */ |
| 122 | ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ |
146 | ld8 loc5 = [in0], 8 ;; /* load ar.rnat */ |
| 123 | ld8 loc6 = [in0], 8 ;; /* load ar.lc */ |
147 | ld8 loc6 = [in0], 8 ;; /* load ar.lc */ |
| 124 | 148 | ||
| 125 | .auto |
149 | .auto |
| 126 | 150 | ||
| 127 | /* |
151 | /* |
| 128 | * Invalidate the ALAT |
152 | * Invalidate the ALAT |
| 129 | */ |
153 | */ |
| 130 | invala |
154 | invala |
| 131 | 155 | ||
| 132 | /* |
156 | /* |
| 133 | * Put RSE to enforced lazy mode. |
157 | * Put RSE to enforced lazy mode. |
| 134 | * So that ar.bspstore and ar.rnat can be written. |
158 | * So that ar.bspstore and ar.rnat can be written. |
| 135 | */ |
159 | */ |
| 136 | movl loc8 = ~3 |
160 | movl loc8 = ~3 |
| 137 | and loc8 = loc3, loc8 |
161 | and loc8 = loc3, loc8 |
| 138 | mov ar.rsc = loc8 |
162 | mov ar.rsc = loc8 |
| 139 | 163 | ||
| 140 | /* |
164 | /* |
| 141 | * Flush dirty registers to backing store. |
165 | * Flush dirty registers to backing store. |
| 142 | * We do this because we want the following move |
166 | * We do this because we want the following move |
| 143 | * to ar.bspstore to assign the same value to ar.bsp. |
167 | * to ar.bspstore to assign the same value to ar.bsp. |
| 144 | */ |
168 | */ |
| 145 | flushrs |
169 | flushrs |
| 146 | 170 | ||
| 147 | /* |
171 | /* |
| 148 | * Restore application registers |
172 | * Restore application registers |
| 149 | */ |
173 | */ |
| 150 | mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */ |
174 | mov ar.bspstore = loc4 /* rse.bspload = ar.bsp = ar.bspstore = loc4 */ |
| 151 | mov ar.rnat = loc5 |
175 | mov ar.rnat = loc5 |
| 152 | mov ar.pfs = loc0 |
176 | mov ar.pfs = loc0 |
| 153 | mov ar.rsc = loc3 |
177 | mov ar.rsc = loc3 |
| 154 | 178 | ||
| 155 | .explicit |
179 | .explicit |
| 156 | 180 | ||
| 157 | mov ar.unat = loc2 ;; |
181 | mov ar.unat = loc2 ;; |
| 158 | mov ar.lc = loc6 |
182 | mov ar.lc = loc6 |
| 159 | 183 | ||
| 160 | /* |
184 | /* |
| 161 | * Restore general registers including NaT bits |
185 | * Restore general registers including NaT bits |
| 162 | */ |
186 | */ |
| 163 | ld8.fill r1 = [in0], 8 ;; |
187 | ld8.fill r1 = [in0], 8 ;; |
| 164 | ld8.fill r4 = [in0], 8 ;; |
188 | ld8.fill r4 = [in0], 8 ;; |
| 165 | ld8.fill r5 = [in0], 8 ;; |
189 | ld8.fill r5 = [in0], 8 ;; |
| 166 | ld8.fill r6 = [in0], 8 ;; |
190 | ld8.fill r6 = [in0], 8 ;; |
| 167 | ld8.fill r7 = [in0], 8 ;; |
191 | ld8.fill r7 = [in0], 8 ;; |
| 168 | ld8.fill r12 = [in0], 8 ;; /* restore sp */ |
192 | ld8.fill r12 = [in0], 8 ;; /* restore sp */ |
| 169 | ld8.fill r13 = [in0], 8 ;; |
193 | ld8.fill r13 = [in0], 8 ;; |
| 170 | 194 | ||
| 171 | /* |
195 | /* |
| 172 | * Restore branch registers |
196 | * Restore branch registers |
| 173 | */ |
197 | */ |
| 174 | ld8 loc2 = [in0], 8 ;; /* restore pc */ |
198 | ld8 loc2 = [in0], 8 ;; /* restore pc */ |
| 175 | mov b0 = loc2 |
199 | mov b0 = loc2 |
| 176 | ld8 loc3 = [in0], 8 ;; |
200 | ld8 loc3 = [in0], 8 ;; |
| 177 | mov b1 = loc3 |
201 | mov b1 = loc3 |
| 178 | ld8 loc4 = [in0], 8 ;; |
202 | ld8 loc4 = [in0], 8 ;; |
| 179 | mov b2 = loc4 |
203 | mov b2 = loc4 |
| 180 | ld8 loc5 = [in0], 8 ;; |
204 | ld8 loc5 = [in0], 8 ;; |
| 181 | mov b3 = loc5 |
205 | mov b3 = loc5 |
| 182 | ld8 loc6 = [in0], 8 ;; |
206 | ld8 loc6 = [in0], 8 ;; |
| 183 | mov b4 = loc6 |
207 | mov b4 = loc6 |
| 184 | ld8 loc7 = [in0], 8 ;; |
208 | ld8 loc7 = [in0], 8 ;; |
| 185 | mov b5 = loc7 |
209 | mov b5 = loc7 |
| 186 | 210 | ||
| 187 | /* |
211 | /* |
| 188 | * Restore predicate registers |
212 | * Restore predicate registers |
| 189 | */ |
213 | */ |
| 190 | ld8 loc2 = [in0], 8 ;; |
214 | ld8 loc2 = [in0], 16 ;; |
| 191 | mov pr = loc2, ~0 |
215 | mov pr = loc2, ~0 |
| 192 | 216 | ||
| - | 217 | ldf.fill f2=[in0],16;; |
|
| - | 218 | ldf.fill f3=[in0],16;; |
|
| - | 219 | ldf.fill f4=[in0],16;; |
|
| - | 220 | ldf.fill f5=[in0],16;; |
|
| - | 221 | ||
| - | 222 | ldf.fill f16=[in0],16;; |
|
| - | 223 | ldf.fill f17=[in0],16;; |
|
| - | 224 | ldf.fill f18=[in0],16;; |
|
| - | 225 | ldf.fill f19=[in0],16;; |
|
| - | 226 | ldf.fill f20=[in0],16;; |
|
| - | 227 | ldf.fill f21=[in0],16;; |
|
| - | 228 | ldf.fill f22=[in0],16;; |
|
| - | 229 | ldf.fill f23=[in0],16;; |
|
| - | 230 | ldf.fill f24=[in0],16;; |
|
| - | 231 | ldf.fill f25=[in0],16;; |
|
| - | 232 | ldf.fill f26=[in0],16;; |
|
| - | 233 | ldf.fill f27=[in0],16;; |
|
| - | 234 | ldf.fill f28=[in0],16;; |
|
| - | 235 | ldf.fill f29=[in0],16;; |
|
| - | 236 | ldf.fill f30=[in0],16;; |
|
| - | 237 | ldf.fill f31=[in0],16;; |
|
| - | 238 | ||
| - | 239 | ||
| - | 240 | ||
| 193 | mov ar.unat = loc1 |
241 | mov ar.unat = loc1 |
| 194 | 242 | ||
| 195 | mov r8 = r0 /* context_restore returns 0 */ |
243 | mov r8 = r0 /* context_restore returns 0 */ |
| 196 | br.ret.sptk.many b0 |
244 | br.ret.sptk.many b0 |
| 197 | 245 | ||