WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/mm/page.h


/*
 * Copyright (C) 2005 - 2006 Jakub Jermar
 * Copyright (C) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia64_PAGE_H__
#define __ia64_PAGE_H__
 
#include <arch/mm/frame.h>
 
#define PAGE_SIZE   FRAME_SIZE
#define PAGE_WIDTH  FRAME_WIDTH
 
 
#ifdef KERNEL
 
/** Bit width of the TLB-locked portion of kernel address space. */
#define KERNEL_PAGE_WIDTH   28  /* 256M */
 
#define PPN_SHIFT           12
 
#define VRN_SHIFT           61
#define VRN_MASK            (7LL << VRN_SHIFT)
#define VA2VRN(va)          ((va)>>VRN_SHIFT)
 
#ifdef __ASM__
#define VRN_KERNEL          7
#else
#define VRN_KERNEL          7LL
#endif
 
#define REGION_REGISTERS        8
 
#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
#define VHPT_WIDTH          20          /* 1M */
#define VHPT_SIZE           (1 << VHPT_WIDTH)
 
 
#define PTA_BASE_SHIFT          15
 
/** Memory Attributes. */
#define MA_WRITEBACK    0x0
#define MA_UNCACHEABLE  0x4
 
/** Privilege Levels. Only the most and the least privileged ones are ever used. */
#define PL_KERNEL   0x0
#define PL_USER     0x3
 
/* Access Rigths. Only certain combinations are used by the kernel. */
#define AR_READ     0x0
#define AR_EXECUTE  0x1
#define AR_WRITE    0x2
 
#ifndef __ASM__
 
#include <arch/mm/frame.h>
#include <arch/barrier.h>
#include <genarch/mm/page_ht.h>
#include <arch/mm/asid.h>
#include <arch/types.h>
#include <typedefs.h>
#include <debug.h>
 
struct vhpt_tag_info {
    unsigned long long tag : 63;
    unsigned ti : 1;
} __attribute__ ((packed));
 
union vhpt_tag {
    struct vhpt_tag_info tag_info;
    unsigned tag_word;
};
 
struct vhpt_entry_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned : 1;
    unsigned ma : 3;
    unsigned a : 1;
    unsigned d : 1;
    unsigned pl : 2;
    unsigned ar : 3;
    unsigned long long ppn : 38;
    unsigned : 2;
    unsigned ed : 1;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned key : 24;
    unsigned : 32;
   
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
struct vhpt_entry_not_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned long long ig0 : 52;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned long long ig2 : 56;
 
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
typedef union vhpt_entry {
    struct vhpt_entry_present present;
    struct vhpt_entry_not_present not_present;
    __u64 word[4];
} vhpt_entry_t;
 
struct region_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned ps : 6;
    unsigned rid : 24;
    unsigned : 32;
} __attribute__ ((packed));
 
typedef union region_register {
    struct region_register_map map;
    unsigned long long word;
} region_register;
 
struct pta_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned size : 6;
    unsigned vf : 1;
    unsigned : 6;
    unsigned long long base : 49;
} __attribute__ ((packed));
 
typedef union pta_register {
    struct pta_register_map map;
    __u64 word;
} pta_register;
 
/** Return Translation Hashed Entry Address.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return Address of the head of VHPT collision chain.
 */
static inline __u64 thash(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Return Translation Hashed Entry Tag.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
 */
static inline __u64 ttag(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Read Region Register.
 *
 * @param i Region register index.
 *
 * @return Current contents of rr[i].
 */
static inline __u64 rr_read(index_t i)
{
    __u64 ret;
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
    return ret;
}
 
/** Write Region Register.
 *
 * @param i Region register index.
 * @param v Value to be written to rr[i].
 */
static inline void rr_write(index_t i, __u64 v)
{
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile (
        "mov rr[%0] = %1\n"
        :
        : "r" (i << VRN_SHIFT), "r" (v)
    );
}
 
/** Read Page Table Register.
 *
 * @return Current value stored in PTA.
 */
static inline __u64 pta_read(void)
{
    __u64 ret;
   
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
   
    return ret;
}
 
/** Write Page Table Register.
 *
 * @param v New value to be stored in PTA.
 */
static inline void pta_write(__u64 v)
{
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
}
 
extern void page_arch_init(void);
 
extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 

Rev 1108	Rev 1210
1	/*	1	/*
2	* Copyright (C) 2005 - 2006 Jakub Jermar	2	* Copyright (C) 2005 - 2006 Jakub Jermar
3	* Copyright (C) 2006 Jakub Vana	3	* Copyright (C) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	#ifndef __ia64_PAGE_H__	30	#ifndef __ia64_PAGE_H__
31	#define __ia64_PAGE_H__	31	#define __ia64_PAGE_H__
32		32
33	#include <arch/mm/frame.h>	33	#include <arch/mm/frame.h>
34		34
35	#define PAGE_SIZE FRAME_SIZE	35	#define PAGE_SIZE FRAME_SIZE
36	#define PAGE_WIDTH FRAME_WIDTH	36	#define PAGE_WIDTH FRAME_WIDTH
37		37
38		38
39	#ifdef KERNEL	39	#ifdef KERNEL
40		40
41	/** Bit width of the TLB-locked portion of kernel address space. */	41	/** Bit width of the TLB-locked portion of kernel address space. */
42	#define KERNEL_PAGE_WIDTH 28 /* 256M */	42	#define KERNEL_PAGE_WIDTH 28 /* 256M */
43		43
44	#define PPN_SHIFT 12	44	#define PPN_SHIFT 12
45		45
46	#define VRN_SHIFT 61	46	#define VRN_SHIFT 61
47	#define VRN_MASK (7LL << VRN_SHIFT)	47	#define VRN_MASK (7LL << VRN_SHIFT)
48	#define VA2VRN(va) ((va)>>VRN_SHIFT)	48	#define VA2VRN(va) ((va)>>VRN_SHIFT)
49		49
50	#ifdef __ASM__	50	#ifdef __ASM__
51	#define VRN_KERNEL 7	51	#define VRN_KERNEL 7
52	#else	52	#else
53	#define VRN_KERNEL 7LL	53	#define VRN_KERNEL 7LL
54	#endif	54	#endif
55		55
56	#define REGION_REGISTERS 8	56	#define REGION_REGISTERS 8
57		57
58	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))	58	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
59	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))	59	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
60		60
61	#define VHPT_WIDTH 20 /* 1M */	61	#define VHPT_WIDTH 20 /* 1M */
62	#define VHPT_SIZE (1 << VHPT_WIDTH)	62	#define VHPT_SIZE (1 << VHPT_WIDTH)
63	#define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */	-
64		63
65	#define PTA_BASE_SHIFT 15	64	#define PTA_BASE_SHIFT 15
66		65
67	/** Memory Attributes. */	66	/** Memory Attributes. */
68	#define MA_WRITEBACK 0x0	67	#define MA_WRITEBACK 0x0
69	#define MA_UNCACHEABLE 0x4	68	#define MA_UNCACHEABLE 0x4
70		69
71	/** Privilege Levels. Only the most and the least privileged ones are ever used. */	70	/** Privilege Levels. Only the most and the least privileged ones are ever used. */
72	#define PL_KERNEL 0x0	71	#define PL_KERNEL 0x0
73	#define PL_USER 0x3	72	#define PL_USER 0x3
74		73
75	/* Access Rigths. Only certain combinations are used by the kernel. */	74	/* Access Rigths. Only certain combinations are used by the kernel. */
76	#define AR_READ 0x0	75	#define AR_READ 0x0
77	#define AR_EXECUTE 0x1	76	#define AR_EXECUTE 0x1
78	#define AR_WRITE 0x2	77	#define AR_WRITE 0x2
79		78
80	#ifndef __ASM__	79	#ifndef __ASM__
81		80
82	#include <arch/mm/frame.h>	81	#include <arch/mm/frame.h>
83	#include <arch/barrier.h>	82	#include <arch/barrier.h>
84	#include <genarch/mm/page_ht.h>	83	#include <genarch/mm/page_ht.h>
85	#include <arch/mm/asid.h>	84	#include <arch/mm/asid.h>
86	#include <arch/types.h>	85	#include <arch/types.h>
87	#include <typedefs.h>	86	#include <typedefs.h>
88	#include <debug.h>	87	#include <debug.h>
89		88
90	struct vhpt_tag_info {	89	struct vhpt_tag_info {
91	unsigned long long tag : 63;	90	unsigned long long tag : 63;
92	unsigned ti : 1;	91	unsigned ti : 1;
93	} __attribute__ ((packed));	92	} __attribute__ ((packed));
94		93
95	union vhpt_tag {	94	union vhpt_tag {
96	struct vhpt_tag_info tag_info;	95	struct vhpt_tag_info tag_info;
97	unsigned tag_word;	96	unsigned tag_word;
98	};	97	};
99		98
100	struct vhpt_entry_present {	99	struct vhpt_entry_present {
101	/* Word 0 */	100	/* Word 0 */
102	unsigned p : 1;	101	unsigned p : 1;
103	unsigned : 1;	102	unsigned : 1;
104	unsigned ma : 3;	103	unsigned ma : 3;
105	unsigned a : 1;	104	unsigned a : 1;
106	unsigned d : 1;	105	unsigned d : 1;
107	unsigned pl : 2;	106	unsigned pl : 2;
108	unsigned ar : 3;	107	unsigned ar : 3;
109	unsigned long long ppn : 38;	108	unsigned long long ppn : 38;
110	unsigned : 2;	109	unsigned : 2;
111	unsigned ed : 1;	110	unsigned ed : 1;
112	unsigned ig1 : 11;	111	unsigned ig1 : 11;
113		112
114	/* Word 1 */	113	/* Word 1 */
115	unsigned : 2;	114	unsigned : 2;
116	unsigned ps : 6;	115	unsigned ps : 6;
117	unsigned key : 24;	116	unsigned key : 24;
118	unsigned : 32;	117	unsigned : 32;
119		118
120	/* Word 2 */	119	/* Word 2 */
121	union vhpt_tag tag;	120	union vhpt_tag tag;
122		121
123	/* Word 3 */	122	/* Word 3 */
124	__u64 ig3 : 64;	123	__u64 ig3 : 64;
125	} __attribute__ ((packed));	124	} __attribute__ ((packed));
126		125
127	struct vhpt_entry_not_present {	126	struct vhpt_entry_not_present {
128	/* Word 0 */	127	/* Word 0 */
129	unsigned p : 1;	128	unsigned p : 1;
130	unsigned long long ig0 : 52;	129	unsigned long long ig0 : 52;
131	unsigned ig1 : 11;	130	unsigned ig1 : 11;
132		131
133	/* Word 1 */	132	/* Word 1 */
134	unsigned : 2;	133	unsigned : 2;
135	unsigned ps : 6;	134	unsigned ps : 6;
136	unsigned long long ig2 : 56;	135	unsigned long long ig2 : 56;
137		136
138	/* Word 2 */	137	/* Word 2 */
139	union vhpt_tag tag;	138	union vhpt_tag tag;
140		139
141	/* Word 3 */	140	/* Word 3 */
142	__u64 ig3 : 64;	141	__u64 ig3 : 64;
143	} __attribute__ ((packed));	142	} __attribute__ ((packed));
144		143
145	typedef union vhpt_entry {	144	typedef union vhpt_entry {
146	struct vhpt_entry_present present;	145	struct vhpt_entry_present present;
147	struct vhpt_entry_not_present not_present;	146	struct vhpt_entry_not_present not_present;
148	__u64 word[4];	147	__u64 word[4];
149	} vhpt_entry_t;	148	} vhpt_entry_t;
150		149
151	struct region_register_map {	150	struct region_register_map {
152	unsigned ve : 1;	151	unsigned ve : 1;
153	unsigned : 1;	152	unsigned : 1;
154	unsigned ps : 6;	153	unsigned ps : 6;
155	unsigned rid : 24;	154	unsigned rid : 24;
156	unsigned : 32;	155	unsigned : 32;
157	} __attribute__ ((packed));	156	} __attribute__ ((packed));
158		157
159	typedef union region_register {	158	typedef union region_register {
160	struct region_register_map map;	159	struct region_register_map map;
161	unsigned long long word;	160	unsigned long long word;
162	} region_register;	161	} region_register;
163		162
164	struct pta_register_map {	163	struct pta_register_map {
165	unsigned ve : 1;	164	unsigned ve : 1;
166	unsigned : 1;	165	unsigned : 1;
167	unsigned size : 6;	166	unsigned size : 6;
168	unsigned vf : 1;	167	unsigned vf : 1;
169	unsigned : 6;	168	unsigned : 6;
170	unsigned long long base : 49;	169	unsigned long long base : 49;
171	} __attribute__ ((packed));	170	} __attribute__ ((packed));
172		171
173	typedef union pta_register {	172	typedef union pta_register {
174	struct pta_register_map map;	173	struct pta_register_map map;
175	__u64 word;	174	__u64 word;
176	} pta_register;	175	} pta_register;
177		176
178	/** Return Translation Hashed Entry Address.	177	/** Return Translation Hashed Entry Address.
179	*	178	*
180	* VRN bits are used to read RID (ASID) from one	179	* VRN bits are used to read RID (ASID) from one
181	* of the eight region registers registers.	180	* of the eight region registers registers.
182	*	181	*
183	* @param va Virtual address including VRN bits.	182	* @param va Virtual address including VRN bits.
184	*	183	*
185	* @return Address of the head of VHPT collision chain.	184	* @return Address of the head of VHPT collision chain.
186	*/	185	*/
187	static inline __u64 thash(__u64 va)	186	static inline __u64 thash(__u64 va)
188	{	187	{
189	__u64 ret;	188	__u64 ret;
190		189
191	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));	190	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
192		191
193	return ret;	192	return ret;
194	}	193	}
195		194
196	/** Return Translation Hashed Entry Tag.	195	/** Return Translation Hashed Entry Tag.
197	*	196	*
198	* VRN bits are used to read RID (ASID) from one	197	* VRN bits are used to read RID (ASID) from one
199	* of the eight region registers.	198	* of the eight region registers.
200	*	199	*
201	* @param va Virtual address including VRN bits.	200	* @param va Virtual address including VRN bits.
202	*	201	*
203	* @return The unique tag for VPN and RID in the collision chain returned by thash().	202	* @return The unique tag for VPN and RID in the collision chain returned by thash().
204	*/	203	*/
205	static inline __u64 ttag(__u64 va)	204	static inline __u64 ttag(__u64 va)
206	{	205	{
207	__u64 ret;	206	__u64 ret;
208		207
209	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));	208	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
210		209
211	return ret;	210	return ret;
212	}	211	}
213		212
214	/** Read Region Register.	213	/** Read Region Register.
215	*	214	*
216	* @param i Region register index.	215	* @param i Region register index.
217	*	216	*
218	* @return Current contents of rr[i].	217	* @return Current contents of rr[i].
219	*/	218	*/
220	static inline __u64 rr_read(index_t i)	219	static inline __u64 rr_read(index_t i)
221	{	220	{
222	__u64 ret;	221	__u64 ret;
223	ASSERT(i < REGION_REGISTERS);	222	ASSERT(i < REGION_REGISTERS);
224	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));	223	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
225	return ret;	224	return ret;
226	}	225	}
227		226
228	/** Write Region Register.	227	/** Write Region Register.
229	*	228	*
230	* @param i Region register index.	229	* @param i Region register index.
231	* @param v Value to be written to rr[i].	230	* @param v Value to be written to rr[i].
232	*/	231	*/
233	static inline void rr_write(index_t i, __u64 v)	232	static inline void rr_write(index_t i, __u64 v)
234	{	233	{
235	ASSERT(i < REGION_REGISTERS);	234	ASSERT(i < REGION_REGISTERS);
236	__asm__ volatile (	235	__asm__ volatile (
237	"mov rr[%0] = %1\n"	236	"mov rr[%0] = %1\n"
238	:	237	:
239	: "r" (i << VRN_SHIFT), "r" (v)	238	: "r" (i << VRN_SHIFT), "r" (v)
240	);	239	);
241	}	240	}
242		241
243	/** Read Page Table Register.	242	/** Read Page Table Register.
244	*	243	*
245	* @return Current value stored in PTA.	244	* @return Current value stored in PTA.
246	*/	245	*/
247	static inline __u64 pta_read(void)	246	static inline __u64 pta_read(void)
248	{	247	{
249	__u64 ret;	248	__u64 ret;
250		249
251	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));	250	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
252		251
253	return ret;	252	return ret;
254	}	253	}
255		254
256	/** Write Page Table Register.	255	/** Write Page Table Register.
257	*	256	*
258	* @param v New value to be stored in PTA.	257	* @param v New value to be stored in PTA.
259	*/	258	*/
260	static inline void pta_write(__u64 v)	259	static inline void pta_write(__u64 v)
261	{	260	{
262	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));	261	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
263	}	262	}
264		263
265	extern void page_arch_init(void);	264	extern void page_arch_init(void);
266		265
267	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);	266	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
268	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);	267	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
269	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);	268	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
270		269
271	#endif /* __ASM__ */	270	#endif /* __ASM__ */
272		271
273	#endif /* KERNEL */	272	#endif /* KERNEL */
274		273
275	#endif	274	#endif
276		275

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(root)/kernel/trunk/arch/ia64/include/mm/page.h @ 1702 – Rev 1108 → 1210