WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/mm/page.h


/*
 * Copyright (C) 2005 - 2006 Jakub Jermar
 * Copyright (C) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia64_PAGE_H__
#define __ia64_PAGE_H__
 
#include <arch/mm/frame.h>
 
#define PAGE_SIZE   FRAME_SIZE
#define PAGE_WIDTH  FRAME_WIDTH
 
 
#ifdef KERNEL
 
/** Bit width of the TLB-locked portion of kernel address space. */
#define KERNEL_PAGE_WIDTH   28  /* 256M */
 
 
 
#define PPN_SHIFT           12
 
#define VRN_SHIFT           61
#define VRN_MASK            (7LL << VRN_SHIFT)
#define VA2VRN(va)          ((va)>>VRN_SHIFT)
 
#ifdef __ASM__
#define VRN_KERNEL          7
#else
#define VRN_KERNEL          7LL
#endif
 
#define REGION_REGISTERS        8
 
#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
#define VHPT_WIDTH          20          /* 1M */
#define VHPT_SIZE           (1 << VHPT_WIDTH)
#define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
 
#define PTA_BASE_SHIFT          15
 
/** Memory Attributes. */
#define MA_WRITEBACK    0x0
#define MA_UNCACHEABLE  0x4
 
/** Privilege Levels. Only the most and the least privileged ones are ever used. */
#define PL_KERNEL   0x0
#define PL_USER     0x3
 
/* Access Rigths. Only certain combinations are used by the kernel. */
#define AR_READ     0x0
#define AR_EXECUTE  0x1
#define AR_WRITE    0x2
 
#ifndef __ASM__
 
#include <arch/mm/frame.h>
#include <arch/barrier.h>
#include <genarch/mm/page_ht.h>
#include <arch/mm/asid.h>
#include <arch/types.h>
#include <typedefs.h>
#include <debug.h>
 
struct vhpt_tag_info {
    unsigned long long tag : 63;
    unsigned ti : 1;
} __attribute__ ((packed));
 
union vhpt_tag {
    struct vhpt_tag_info tag_info;
    unsigned tag_word;
};
 
struct vhpt_entry_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned : 1;
    unsigned ma : 3;
    unsigned a : 1;
    unsigned d : 1;
    unsigned pl : 2;
    unsigned ar : 3;
    unsigned long long ppn : 38;
    unsigned : 2;
    unsigned ed : 1;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned key : 24;
    unsigned : 32;
   
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
struct vhpt_entry_not_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned long long ig0 : 52;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned long long ig2 : 56;
 
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
typedef union vhpt_entry {
    struct vhpt_entry_present present;
    struct vhpt_entry_not_present not_present;
    __u64 word[4];
} vhpt_entry_t;
 
struct region_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned ps : 6;
    unsigned rid : 24;
    unsigned : 32;
} __attribute__ ((packed));
 
typedef union region_register {
    struct region_register_map map;
    unsigned long long word;
} region_register;
 
struct pta_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned size : 6;
    unsigned vf : 1;
    unsigned : 6;
    unsigned long long base : 49;
} __attribute__ ((packed));
 
typedef union pta_register {
    struct pta_register_map map;
    __u64 word;
} pta_register;
 
/** Return Translation Hashed Entry Address.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return Address of the head of VHPT collision chain.
 */
static inline __u64 thash(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Return Translation Hashed Entry Tag.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
 */
static inline __u64 ttag(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Read Region Register.
 *
 * @param i Region register index.
 *
 * @return Current contents of rr[i].
 */
static inline __u64 rr_read(index_t i)
{
    __u64 ret;
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
    return ret;
}
 
/** Write Region Register.
 *
 * @param i Region register index.
 * @param v Value to be written to rr[i].
 */
static inline void rr_write(index_t i, __u64 v)
{
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile (
        "mov rr[%0] = %1\n"
        :
        : "r" (i << VRN_SHIFT), "r" (v)
    );
}
 
/** Read Page Table Register.
 *
 * @return Current value stored in PTA.
 */
static inline __u64 pta_read(void)
{
    __u64 ret;
   
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
   
    return ret;
}
 
/** Write Page Table Register.
 *
 * @param v New value to be stored in PTA.
 */
static inline void pta_write(__u64 v)
{
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
}
 
extern void page_arch_init(void);
 
extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 

Rev 967	Rev 1108
1	/*	1	/*
2	* Copyright (C) 2005 - 2006 Jakub Jermar	2	* Copyright (C) 2005 - 2006 Jakub Jermar
3	* Copyright (C) 2006 Jakub Vana	3	* Copyright (C) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	#ifndef __ia64_PAGE_H__	30	#ifndef __ia64_PAGE_H__
31	#define __ia64_PAGE_H__	31	#define __ia64_PAGE_H__
32		32
33	#include <arch/mm/frame.h>	33	#include <arch/mm/frame.h>
34		34
35	#define PAGE_SIZE FRAME_SIZE	35	#define PAGE_SIZE FRAME_SIZE
36	#define PAGE_WIDTH FRAME_WIDTH	36	#define PAGE_WIDTH FRAME_WIDTH
37		37
38		38
39	#ifdef KERNEL	39	#ifdef KERNEL
40		40
41	/** Bit width of the TLB-locked portion of kernel address space. */	41	/** Bit width of the TLB-locked portion of kernel address space. */
42	#define KERNEL_PAGE_WIDTH 28 /* 256M */	42	#define KERNEL_PAGE_WIDTH 28 /* 256M */
43		43
44	#define SET_PTL0_ADDRESS_ARCH(x) /*< To be removed as situation permits. /	-
45		-
46	#define PPN_SHIFT 12	44	#define PPN_SHIFT 12
47		45
48	#define VRN_SHIFT 61	46	#define VRN_SHIFT 61
49	#define VRN_MASK (7LL << VRN_SHIFT)	47	#define VRN_MASK (7LL << VRN_SHIFT)
50	#define VA2VRN(va) ((va)>>VRN_SHIFT)	48	#define VA2VRN(va) ((va)>>VRN_SHIFT)
51		49
52	#ifdef __ASM__	50	#ifdef __ASM__
53	#define VRN_KERNEL 7	51	#define VRN_KERNEL 7
54	#else	52	#else
55	#define VRN_KERNEL 7LL	53	#define VRN_KERNEL 7LL
56	#endif	54	#endif
57		55
58	#define REGION_REGISTERS 8	56	#define REGION_REGISTERS 8
59		57
60	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))	58	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
61	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))	59	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
62		60
63	#define VHPT_WIDTH 20 /* 1M */	61	#define VHPT_WIDTH 20 /* 1M */
64	#define VHPT_SIZE (1 << VHPT_WIDTH)	62	#define VHPT_SIZE (1 << VHPT_WIDTH)
65	#define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */	63	#define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */
66		64
67	#define PTA_BASE_SHIFT 15	65	#define PTA_BASE_SHIFT 15
68		66
69	/** Memory Attributes. */	67	/** Memory Attributes. */
70	#define MA_WRITEBACK 0x0	68	#define MA_WRITEBACK 0x0
71	#define MA_UNCACHEABLE 0x4	69	#define MA_UNCACHEABLE 0x4
72		70
73	/** Privilege Levels. Only the most and the least privileged ones are ever used. */	71	/** Privilege Levels. Only the most and the least privileged ones are ever used. */
74	#define PL_KERNEL 0x0	72	#define PL_KERNEL 0x0
75	#define PL_USER 0x3	73	#define PL_USER 0x3
76		74
77	/* Access Rigths. Only certain combinations are used by the kernel. */	75	/* Access Rigths. Only certain combinations are used by the kernel. */
78	#define AR_READ 0x0	76	#define AR_READ 0x0
79	#define AR_EXECUTE 0x1	77	#define AR_EXECUTE 0x1
80	#define AR_WRITE 0x2	78	#define AR_WRITE 0x2
81		79
82	#ifndef __ASM__	80	#ifndef __ASM__
83		81
84	#include <arch/mm/frame.h>	82	#include <arch/mm/frame.h>
85	#include <arch/barrier.h>	83	#include <arch/barrier.h>
86	#include <genarch/mm/page_ht.h>	84	#include <genarch/mm/page_ht.h>
87	#include <arch/mm/asid.h>	85	#include <arch/mm/asid.h>
88	#include <arch/types.h>	86	#include <arch/types.h>
89	#include <typedefs.h>	87	#include <typedefs.h>
90	#include <debug.h>	88	#include <debug.h>
91		89
92	struct vhpt_tag_info {	90	struct vhpt_tag_info {
93	unsigned long long tag : 63;	91	unsigned long long tag : 63;
94	unsigned ti : 1;	92	unsigned ti : 1;
95	} __attribute__ ((packed));	93	} __attribute__ ((packed));
96		94
97	union vhpt_tag {	95	union vhpt_tag {
98	struct vhpt_tag_info tag_info;	96	struct vhpt_tag_info tag_info;
99	unsigned tag_word;	97	unsigned tag_word;
100	};	98	};
101		99
102	struct vhpt_entry_present {	100	struct vhpt_entry_present {
103	/* Word 0 */	101	/* Word 0 */
104	unsigned p : 1;	102	unsigned p : 1;
105	unsigned : 1;	103	unsigned : 1;
106	unsigned ma : 3;	104	unsigned ma : 3;
107	unsigned a : 1;	105	unsigned a : 1;
108	unsigned d : 1;	106	unsigned d : 1;
109	unsigned pl : 2;	107	unsigned pl : 2;
110	unsigned ar : 3;	108	unsigned ar : 3;
111	unsigned long long ppn : 38;	109	unsigned long long ppn : 38;
112	unsigned : 2;	110	unsigned : 2;
113	unsigned ed : 1;	111	unsigned ed : 1;
114	unsigned ig1 : 11;	112	unsigned ig1 : 11;
115		113
116	/* Word 1 */	114	/* Word 1 */
117	unsigned : 2;	115	unsigned : 2;
118	unsigned ps : 6;	116	unsigned ps : 6;
119	unsigned key : 24;	117	unsigned key : 24;
120	unsigned : 32;	118	unsigned : 32;
121		119
122	/* Word 2 */	120	/* Word 2 */
123	union vhpt_tag tag;	121	union vhpt_tag tag;
124		122
125	/* Word 3 */	123	/* Word 3 */
126	__u64 ig3 : 64;	124	__u64 ig3 : 64;
127	} __attribute__ ((packed));	125	} __attribute__ ((packed));
128		126
129	struct vhpt_entry_not_present {	127	struct vhpt_entry_not_present {
130	/* Word 0 */	128	/* Word 0 */
131	unsigned p : 1;	129	unsigned p : 1;
132	unsigned long long ig0 : 52;	130	unsigned long long ig0 : 52;
133	unsigned ig1 : 11;	131	unsigned ig1 : 11;
134		132
135	/* Word 1 */	133	/* Word 1 */
136	unsigned : 2;	134	unsigned : 2;
137	unsigned ps : 6;	135	unsigned ps : 6;
138	unsigned long long ig2 : 56;	136	unsigned long long ig2 : 56;
139		137
140	/* Word 2 */	138	/* Word 2 */
141	union vhpt_tag tag;	139	union vhpt_tag tag;
142		140
143	/* Word 3 */	141	/* Word 3 */
144	__u64 ig3 : 64;	142	__u64 ig3 : 64;
145	} __attribute__ ((packed));	143	} __attribute__ ((packed));
146		144
147	typedef union vhpt_entry {	145	typedef union vhpt_entry {
148	struct vhpt_entry_present present;	146	struct vhpt_entry_present present;
149	struct vhpt_entry_not_present not_present;	147	struct vhpt_entry_not_present not_present;
150	__u64 word[4];	148	__u64 word[4];
151	} vhpt_entry_t;	149	} vhpt_entry_t;
152		150
153	struct region_register_map {	151	struct region_register_map {
154	unsigned ve : 1;	152	unsigned ve : 1;
155	unsigned : 1;	153	unsigned : 1;
156	unsigned ps : 6;	154	unsigned ps : 6;
157	unsigned rid : 24;	155	unsigned rid : 24;
158	unsigned : 32;	156	unsigned : 32;
159	} __attribute__ ((packed));	157	} __attribute__ ((packed));
160		158
161	typedef union region_register {	159	typedef union region_register {
162	struct region_register_map map;	160	struct region_register_map map;
163	unsigned long long word;	161	unsigned long long word;
164	} region_register;	162	} region_register;
165		163
166	struct pta_register_map {	164	struct pta_register_map {
167	unsigned ve : 1;	165	unsigned ve : 1;
168	unsigned : 1;	166	unsigned : 1;
169	unsigned size : 6;	167	unsigned size : 6;
170	unsigned vf : 1;	168	unsigned vf : 1;
171	unsigned : 6;	169	unsigned : 6;
172	unsigned long long base : 49;	170	unsigned long long base : 49;
173	} __attribute__ ((packed));	171	} __attribute__ ((packed));
174		172
175	typedef union pta_register {	173	typedef union pta_register {
176	struct pta_register_map map;	174	struct pta_register_map map;
177	__u64 word;	175	__u64 word;
178	} pta_register;	176	} pta_register;
179		177
180	/** Return Translation Hashed Entry Address.	178	/** Return Translation Hashed Entry Address.
181	*	179	*
182	* VRN bits are used to read RID (ASID) from one	180	* VRN bits are used to read RID (ASID) from one
183	* of the eight region registers registers.	181	* of the eight region registers registers.
184	*	182	*
185	* @param va Virtual address including VRN bits.	183	* @param va Virtual address including VRN bits.
186	*	184	*
187	* @return Address of the head of VHPT collision chain.	185	* @return Address of the head of VHPT collision chain.
188	*/	186	*/
189	static inline __u64 thash(__u64 va)	187	static inline __u64 thash(__u64 va)
190	{	188	{
191	__u64 ret;	189	__u64 ret;
192		190
193	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));	191	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
194		192
195	return ret;	193	return ret;
196	}	194	}
197		195
198	/** Return Translation Hashed Entry Tag.	196	/** Return Translation Hashed Entry Tag.
199	*	197	*
200	* VRN bits are used to read RID (ASID) from one	198	* VRN bits are used to read RID (ASID) from one
201	* of the eight region registers.	199	* of the eight region registers.
202	*	200	*
203	* @param va Virtual address including VRN bits.	201	* @param va Virtual address including VRN bits.
204	*	202	*
205	* @return The unique tag for VPN and RID in the collision chain returned by thash().	203	* @return The unique tag for VPN and RID in the collision chain returned by thash().
206	*/	204	*/
207	static inline __u64 ttag(__u64 va)	205	static inline __u64 ttag(__u64 va)
208	{	206	{
209	__u64 ret;	207	__u64 ret;
210		208
211	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));	209	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
212		210
213	return ret;	211	return ret;
214	}	212	}
215		213
216	/** Read Region Register.	214	/** Read Region Register.
217	*	215	*
218	* @param i Region register index.	216	* @param i Region register index.
219	*	217	*
220	* @return Current contents of rr[i].	218	* @return Current contents of rr[i].
221	*/	219	*/
222	static inline __u64 rr_read(index_t i)	220	static inline __u64 rr_read(index_t i)
223	{	221	{
224	__u64 ret;	222	__u64 ret;
225	ASSERT(i < REGION_REGISTERS);	223	ASSERT(i < REGION_REGISTERS);
226	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));	224	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
227	return ret;	225	return ret;
228	}	226	}
229		227
230	/** Write Region Register.	228	/** Write Region Register.
231	*	229	*
232	* @param i Region register index.	230	* @param i Region register index.
233	* @param v Value to be written to rr[i].	231	* @param v Value to be written to rr[i].
234	*/	232	*/
235	static inline void rr_write(index_t i, __u64 v)	233	static inline void rr_write(index_t i, __u64 v)
236	{	234	{
237	ASSERT(i < REGION_REGISTERS);	235	ASSERT(i < REGION_REGISTERS);
238	__asm__ volatile (	236	__asm__ volatile (
239	"mov rr[%0] = %1\n"	237	"mov rr[%0] = %1\n"
240	:	238	:
241	: "r" (i << VRN_SHIFT), "r" (v)	239	: "r" (i << VRN_SHIFT), "r" (v)
242	);	240	);
243	}	241	}
244		242
245	/** Read Page Table Register.	243	/** Read Page Table Register.
246	*	244	*
247	* @return Current value stored in PTA.	245	* @return Current value stored in PTA.
248	*/	246	*/
249	static inline __u64 pta_read(void)	247	static inline __u64 pta_read(void)
250	{	248	{
251	__u64 ret;	249	__u64 ret;
252		250
253	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));	251	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
254		252
255	return ret;	253	return ret;
256	}	254	}
257		255
258	/** Write Page Table Register.	256	/** Write Page Table Register.
259	*	257	*
260	* @param v New value to be stored in PTA.	258	* @param v New value to be stored in PTA.
261	*/	259	*/
262	static inline void pta_write(__u64 v)	260	static inline void pta_write(__u64 v)
263	{	261	{
264	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));	262	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
265	}	263	}
266		264
267	extern void page_arch_init(void);	265	extern void page_arch_init(void);
268		266
269	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);	267	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
270	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);	268	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
271	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);	269	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
272		270
273	#endif /* __ASM__ */	271	#endif /* __ASM__ */
274		272
275	#endif /* KERNEL */	273	#endif /* KERNEL */
276		274
277	#endif	275	#endif
278		276

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(root)/kernel/trunk/arch/ia64/include/mm/page.h – Rev 967 → 1108