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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
3 | * Copyright (C) 2006 Jakub Vana |
3 | * Copyright (C) 2006 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | #ifndef __ia64_PAGE_H__ |
30 | #ifndef __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
31 | #define __ia64_PAGE_H__ |
32 | 32 | ||
33 | #ifndef __ASM__ |
- | |
34 | - | ||
35 | - | ||
36 | #include <arch/mm/frame.h> |
- | |
37 | #include <arch/barrier.h> |
- | |
38 | #include <genarch/mm/page_ht.h> |
- | |
39 | #include <arch/mm/asid.h> |
- | |
40 | #include <arch/types.h> |
- | |
41 | #include <typedefs.h> |
- | |
42 | #include <debug.h> |
- | |
43 | - | ||
44 | #endif |
- | |
45 | - | ||
46 | #define PAGE_SIZE FRAME_SIZE |
33 | #define PAGE_SIZE FRAME_SIZE |
47 | #define PAGE_WIDTH FRAME_WIDTH |
34 | #define PAGE_WIDTH FRAME_WIDTH |
48 | #define KERNEL_PAGE_WIDTH 28 |
- | |
49 | - | ||
50 | 35 | ||
- | 36 | /** Bit width of the TLB-locked portion of kernel address space. */ |
|
- | 37 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
|
51 | 38 | ||
52 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
39 | #define SET_PTL0_ADDRESS_ARCH(x) /**< To be removed as situation permits. */ |
53 | 40 | ||
54 | #define PPN_SHIFT 12 |
41 | #define PPN_SHIFT 12 |
55 | 42 | ||
56 | #define VRN_SHIFT 61 |
43 | #define VRN_SHIFT 61 |
57 | #define VRN_MASK (7LL << VRN_SHIFT) |
44 | #define VRN_MASK (7LL << VRN_SHIFT) |
- | 45 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
|
58 | 46 | ||
59 | #ifdef __ASM__ |
47 | #ifdef __ASM__ |
60 | #define VRN_KERNEL 7 |
48 | #define VRN_KERNEL 7 |
61 | #else |
49 | #else |
62 | #define VRN_KERNEL 7LL |
50 | #define VRN_KERNEL 7LL |
63 | #endif |
51 | #endif |
64 | 52 | ||
65 | #define REGION_REGISTERS 8 |
53 | #define REGION_REGISTERS 8 |
66 | 54 | ||
67 | #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) |
55 | #define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT))) |
68 | #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) |
56 | #define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT))) |
69 | 57 | ||
70 | - | ||
71 | #define VHPT_WIDTH 20 /* 1M */ |
58 | #define VHPT_WIDTH 20 /* 1M */ |
72 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
59 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
73 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
60 | #define VHPT_BASE 0 /* Must be aligned to VHPT_SIZE */ |
74 | 61 | ||
75 | #define PTA_BASE_SHIFT 15 |
62 | #define PTA_BASE_SHIFT 15 |
76 | 63 | ||
77 | /** Memory Attributes. */ |
64 | /** Memory Attributes. */ |
78 | #define MA_WRITEBACK 0x0 |
65 | #define MA_WRITEBACK 0x0 |
79 | #define MA_UNCACHEABLE 0x4 |
66 | #define MA_UNCACHEABLE 0x4 |
80 | 67 | ||
81 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
68 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
82 | #define PL_KERNEL 0x0 |
69 | #define PL_KERNEL 0x0 |
83 | #define PL_USER 0x3 |
70 | #define PL_USER 0x3 |
84 | 71 | ||
85 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
72 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
86 | #define AR_READ 0x0 |
73 | #define AR_READ 0x0 |
87 | #define AR_EXECUTE 0x1 |
74 | #define AR_EXECUTE 0x1 |
88 | #define AR_WRITE 0x2 |
75 | #define AR_WRITE 0x2 |
89 | 76 | ||
90 | - | ||
91 | #define VA_REGION_INDEX 61 |
- | |
92 | - | ||
93 | #define VA_REGION(va) (va>>VA_REGION_INDEX) |
- | |
94 | - | ||
95 | #ifndef __ASM__ |
77 | #ifndef __ASM__ |
96 | 78 | ||
- | 79 | #include <arch/mm/frame.h> |
|
- | 80 | #include <arch/barrier.h> |
|
- | 81 | #include <genarch/mm/page_ht.h> |
|
- | 82 | #include <arch/mm/asid.h> |
|
- | 83 | #include <arch/types.h> |
|
- | 84 | #include <typedefs.h> |
|
- | 85 | #include <debug.h> |
|
- | 86 | ||
97 | struct vhpt_tag_info { |
87 | struct vhpt_tag_info { |
98 | unsigned long long tag : 63; |
88 | unsigned long long tag : 63; |
99 | unsigned ti : 1; |
89 | unsigned ti : 1; |
100 | } __attribute__ ((packed)); |
90 | } __attribute__ ((packed)); |
101 | 91 | ||
102 | union vhpt_tag { |
92 | union vhpt_tag { |
103 | struct vhpt_tag_info tag_info; |
93 | struct vhpt_tag_info tag_info; |
104 | unsigned tag_word; |
94 | unsigned tag_word; |
105 | }; |
95 | }; |
106 | 96 | ||
107 | struct vhpt_entry_present { |
97 | struct vhpt_entry_present { |
108 | /* Word 0 */ |
98 | /* Word 0 */ |
109 | unsigned p : 1; |
99 | unsigned p : 1; |
110 | unsigned : 1; |
100 | unsigned : 1; |
111 | unsigned ma : 3; |
101 | unsigned ma : 3; |
112 | unsigned a : 1; |
102 | unsigned a : 1; |
113 | unsigned d : 1; |
103 | unsigned d : 1; |
114 | unsigned pl : 2; |
104 | unsigned pl : 2; |
115 | unsigned ar : 3; |
105 | unsigned ar : 3; |
116 | unsigned long long ppn : 38; |
106 | unsigned long long ppn : 38; |
117 | unsigned : 2; |
107 | unsigned : 2; |
118 | unsigned ed : 1; |
108 | unsigned ed : 1; |
119 | unsigned ig1 : 11; |
109 | unsigned ig1 : 11; |
120 | 110 | ||
121 | /* Word 1 */ |
111 | /* Word 1 */ |
122 | unsigned : 2; |
112 | unsigned : 2; |
123 | unsigned ps : 6; |
113 | unsigned ps : 6; |
124 | unsigned key : 24; |
114 | unsigned key : 24; |
125 | unsigned : 32; |
115 | unsigned : 32; |
126 | 116 | ||
127 | /* Word 2 */ |
117 | /* Word 2 */ |
128 | union vhpt_tag tag; |
118 | union vhpt_tag tag; |
129 | 119 | ||
130 | /* Word 3 */ |
120 | /* Word 3 */ |
131 | __u64 ig3 : 64; |
121 | __u64 ig3 : 64; |
132 | } __attribute__ ((packed)); |
122 | } __attribute__ ((packed)); |
133 | 123 | ||
134 | struct vhpt_entry_not_present { |
124 | struct vhpt_entry_not_present { |
135 | /* Word 0 */ |
125 | /* Word 0 */ |
136 | unsigned p : 1; |
126 | unsigned p : 1; |
137 | unsigned long long ig0 : 52; |
127 | unsigned long long ig0 : 52; |
138 | unsigned ig1 : 11; |
128 | unsigned ig1 : 11; |
139 | 129 | ||
140 | /* Word 1 */ |
130 | /* Word 1 */ |
141 | unsigned : 2; |
131 | unsigned : 2; |
142 | unsigned ps : 6; |
132 | unsigned ps : 6; |
143 | unsigned long long ig2 : 56; |
133 | unsigned long long ig2 : 56; |
144 | 134 | ||
145 | /* Word 2 */ |
135 | /* Word 2 */ |
146 | union vhpt_tag tag; |
136 | union vhpt_tag tag; |
147 | 137 | ||
148 | /* Word 3 */ |
138 | /* Word 3 */ |
149 | __u64 ig3 : 64; |
139 | __u64 ig3 : 64; |
150 | } __attribute__ ((packed)); |
140 | } __attribute__ ((packed)); |
151 | 141 | ||
152 | typedef union vhpt_entry { |
142 | typedef union vhpt_entry { |
153 | struct vhpt_entry_present present; |
143 | struct vhpt_entry_present present; |
154 | struct vhpt_entry_not_present not_present; |
144 | struct vhpt_entry_not_present not_present; |
155 | __u64 word[4]; |
145 | __u64 word[4]; |
156 | } vhpt_entry_t; |
146 | } vhpt_entry_t; |
157 | 147 | ||
158 | typedef vhpt_entry_t tlb_entry_t; |
- | |
159 | - | ||
160 | struct region_register_map { |
148 | struct region_register_map { |
161 | unsigned ve : 1; |
149 | unsigned ve : 1; |
162 | unsigned : 1; |
150 | unsigned : 1; |
163 | unsigned ps : 6; |
151 | unsigned ps : 6; |
164 | unsigned rid : 24; |
152 | unsigned rid : 24; |
165 | unsigned : 32; |
153 | unsigned : 32; |
166 | } __attribute__ ((packed)); |
154 | } __attribute__ ((packed)); |
167 | 155 | ||
168 | typedef union region_register { |
156 | typedef union region_register { |
169 | struct region_register_map map; |
157 | struct region_register_map map; |
170 | unsigned long long word; |
158 | unsigned long long word; |
171 | } region_register; |
159 | } region_register; |
172 | 160 | ||
173 | struct pta_register_map { |
161 | struct pta_register_map { |
174 | unsigned ve : 1; |
162 | unsigned ve : 1; |
175 | unsigned : 1; |
163 | unsigned : 1; |
176 | unsigned size : 6; |
164 | unsigned size : 6; |
177 | unsigned vf : 1; |
165 | unsigned vf : 1; |
178 | unsigned : 6; |
166 | unsigned : 6; |
179 | unsigned long long base : 49; |
167 | unsigned long long base : 49; |
180 | } __attribute__ ((packed)); |
168 | } __attribute__ ((packed)); |
181 | 169 | ||
182 | typedef union pta_register { |
170 | typedef union pta_register { |
183 | struct pta_register_map map; |
171 | struct pta_register_map map; |
184 | __u64 word; |
172 | __u64 word; |
185 | } pta_register; |
173 | } pta_register; |
186 | 174 | ||
187 | /** Return Translation Hashed Entry Address. |
175 | /** Return Translation Hashed Entry Address. |
188 | * |
176 | * |
189 | * VRN bits are used to read RID (ASID) from one |
177 | * VRN bits are used to read RID (ASID) from one |
190 | * of the eight region registers registers. |
178 | * of the eight region registers registers. |
191 | * |
179 | * |
192 | * @param va Virtual address including VRN bits. |
180 | * @param va Virtual address including VRN bits. |
193 | * |
181 | * |
194 | * @return Address of the head of VHPT collision chain. |
182 | * @return Address of the head of VHPT collision chain. |
195 | */ |
183 | */ |
196 | static inline __u64 thash(__u64 va) |
184 | static inline __u64 thash(__u64 va) |
197 | { |
185 | { |
198 | __u64 ret; |
186 | __u64 ret; |
199 | 187 | ||
200 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
188 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
201 | 189 | ||
202 | return ret; |
190 | return ret; |
203 | } |
191 | } |
204 | 192 | ||
205 | /** Return Translation Hashed Entry Tag. |
193 | /** Return Translation Hashed Entry Tag. |
206 | * |
194 | * |
207 | * VRN bits are used to read RID (ASID) from one |
195 | * VRN bits are used to read RID (ASID) from one |
208 | * of the eight region registers. |
196 | * of the eight region registers. |
209 | * |
197 | * |
210 | * @param va Virtual address including VRN bits. |
198 | * @param va Virtual address including VRN bits. |
211 | * |
199 | * |
212 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
200 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
213 | */ |
201 | */ |
214 | static inline __u64 ttag(__u64 va) |
202 | static inline __u64 ttag(__u64 va) |
215 | { |
203 | { |
216 | __u64 ret; |
204 | __u64 ret; |
217 | 205 | ||
218 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
206 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
219 | 207 | ||
220 | return ret; |
208 | return ret; |
221 | } |
209 | } |
222 | 210 | ||
223 | /** Read Region Register. |
211 | /** Read Region Register. |
224 | * |
212 | * |
225 | * @param i Region register index. |
213 | * @param i Region register index. |
226 | * |
214 | * |
227 | * @return Current contents of rr[i]. |
215 | * @return Current contents of rr[i]. |
228 | */ |
216 | */ |
229 | static inline __u64 rr_read(index_t i) |
217 | static inline __u64 rr_read(index_t i) |
230 | { |
218 | { |
231 | __u64 ret; |
219 | __u64 ret; |
232 | ASSERT(i < REGION_REGISTERS); |
220 | ASSERT(i < REGION_REGISTERS); |
233 | i=i<<VRN_SHIFT; |
- | |
234 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); |
221 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
235 | - | ||
236 | return ret; |
222 | return ret; |
237 | } |
223 | } |
238 | 224 | ||
239 | - | ||
240 | /** Write Region Register. |
225 | /** Write Region Register. |
241 | * |
226 | * |
242 | * @param i Region register index. |
227 | * @param i Region register index. |
243 | * @param v Value to be written to rr[i]. |
228 | * @param v Value to be written to rr[i]. |
244 | */ |
229 | */ |
245 | static inline void rr_write(index_t i, __u64 v) |
230 | static inline void rr_write(index_t i, __u64 v) |
246 | { |
231 | { |
247 | ASSERT(i < REGION_REGISTERS); |
232 | ASSERT(i < REGION_REGISTERS); |
248 | i=i<<VRN_SHIFT; |
- | |
249 | __asm__ volatile ( |
233 | __asm__ volatile ( |
250 | "mov rr[%0] = %1;;\n" |
234 | "mov rr[%0] = %1\n" |
251 | : |
235 | : |
252 | : "r" (i), "r" (v)); |
236 | : "r" (i << VRN_SHIFT), "r" (v) |
- | 237 | ); |
|
253 | } |
238 | } |
254 | 239 | ||
255 | /** Read Page Table Register. |
240 | /** Read Page Table Register. |
256 | * |
241 | * |
257 | * @return Current value stored in PTA. |
242 | * @return Current value stored in PTA. |
258 | */ |
243 | */ |
259 | static inline __u64 pta_read(void) |
244 | static inline __u64 pta_read(void) |
260 | { |
245 | { |
261 | __u64 ret; |
246 | __u64 ret; |
262 | 247 | ||
263 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
248 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
264 | 249 | ||
265 | return ret; |
250 | return ret; |
266 | } |
251 | } |
267 | 252 | ||
268 | /** Write Page Table Register. |
253 | /** Write Page Table Register. |
269 | * |
254 | * |
270 | * @param v New value to be stored in PTA. |
255 | * @param v New value to be stored in PTA. |
271 | */ |
256 | */ |
272 | static inline void pta_write(__u64 v) |
257 | static inline void pta_write(__u64 v) |
273 | { |
258 | { |
274 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
259 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
275 | } |
260 | } |
276 | 261 | ||
277 | extern void page_arch_init(void); |
262 | extern void page_arch_init(void); |
278 | 263 | ||
279 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
264 | extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid); |
280 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
265 | extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v); |
281 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
266 | extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags); |
282 | 267 | ||
283 | - | ||
284 | - | ||
285 | #endif |
268 | #endif |
286 | 269 | ||
287 | #endif |
270 | #endif |
288 | - | ||
289 | - | ||
290 | 271 |