Rev 1702 | Rev 1766 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1702 | Rev 1760 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32 |
29 | /** @addtogroup ia32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <smp/smp.h> |
35 | #include <smp/smp.h> |
36 | #include <arch/smp/smp.h> |
36 | #include <arch/smp/smp.h> |
37 | #include <arch/smp/mps.h> |
37 | #include <arch/smp/mps.h> |
38 | #include <arch/smp/ap.h> |
38 | #include <arch/smp/ap.h> |
39 | #include <arch/boot/boot.h> |
39 | #include <arch/boot/boot.h> |
40 | #include <genarch/acpi/acpi.h> |
40 | #include <genarch/acpi/acpi.h> |
41 | #include <genarch/acpi/madt.h> |
41 | #include <genarch/acpi/madt.h> |
42 | #include <config.h> |
42 | #include <config.h> |
43 | #include <synch/waitq.h> |
43 | #include <synch/waitq.h> |
44 | #include <synch/synch.h> |
44 | #include <synch/synch.h> |
45 | #include <arch/pm.h> |
45 | #include <arch/pm.h> |
46 | #include <func.h> |
46 | #include <func.h> |
47 | #include <panic.h> |
47 | #include <panic.h> |
48 | #include <debug.h> |
48 | #include <debug.h> |
49 | #include <arch/asm.h> |
49 | #include <arch/asm.h> |
50 | #include <mm/frame.h> |
50 | #include <mm/frame.h> |
51 | #include <mm/page.h> |
51 | #include <mm/page.h> |
52 | #include <mm/slab.h> |
52 | #include <mm/slab.h> |
53 | #include <mm/as.h> |
53 | #include <mm/as.h> |
54 | #include <print.h> |
54 | #include <print.h> |
55 | #include <memstr.h> |
55 | #include <memstr.h> |
56 | #include <arch/drivers/i8259.h> |
56 | #include <arch/drivers/i8259.h> |
57 | 57 | ||
58 | #ifdef CONFIG_SMP |
58 | #ifdef CONFIG_SMP |
59 | 59 | ||
60 | static struct smp_config_operations *ops = NULL; |
60 | static struct smp_config_operations *ops = NULL; |
61 | 61 | ||
62 | void smp_init(void) |
62 | void smp_init(void) |
63 | { |
63 | { |
64 | int status; |
64 | int status; |
65 | __address l_apic_address, io_apic_address; |
65 | __address l_apic_address, io_apic_address; |
66 | 66 | ||
67 | if (acpi_madt) { |
67 | if (acpi_madt) { |
68 | acpi_madt_parse(); |
68 | acpi_madt_parse(); |
69 | ops = &madt_config_operations; |
69 | ops = &madt_config_operations; |
70 | } |
70 | } |
71 | if (config.cpu_count == 1) { |
71 | if (config.cpu_count == 1) { |
72 | mps_init(); |
72 | mps_init(); |
73 | ops = &mps_config_operations; |
73 | ops = &mps_config_operations; |
74 | } |
74 | } |
75 | 75 | ||
76 | l_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status))); |
76 | l_apic_address = (__address) frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status); |
77 | if (status != FRAME_OK) |
77 | if (status != FRAME_OK) |
78 | panic("cannot allocate address for l_apic\n"); |
78 | panic("cannot allocate address for l_apic\n"); |
79 | 79 | ||
80 | io_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status))); |
80 | io_apic_address = (__address) frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status); |
81 | if (status != FRAME_OK) |
81 | if (status != FRAME_OK) |
82 | panic("cannot allocate address for io_apic\n"); |
82 | panic("cannot allocate address for io_apic\n"); |
83 | 83 | ||
84 | if (config.cpu_count > 1) { |
84 | if (config.cpu_count > 1) { |
85 | page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic, |
85 | page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic, |
86 | PAGE_NOT_CACHEABLE); |
86 | PAGE_NOT_CACHEABLE); |
87 | page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic, |
87 | page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic, |
88 | PAGE_NOT_CACHEABLE); |
88 | PAGE_NOT_CACHEABLE); |
89 | 89 | ||
90 | l_apic = (__u32 *) l_apic_address; |
90 | l_apic = (__u32 *) l_apic_address; |
91 | io_apic = (__u32 *) io_apic_address; |
91 | io_apic = (__u32 *) io_apic_address; |
92 | } |
92 | } |
93 | } |
93 | } |
94 | 94 | ||
95 | /* |
95 | /* |
96 | * Kernel thread for bringing up application processors. It becomes clear |
96 | * Kernel thread for bringing up application processors. It becomes clear |
97 | * that we need an arrangement like this (AP's being initialized by a kernel |
97 | * that we need an arrangement like this (AP's being initialized by a kernel |
98 | * thread), for a thread has its dedicated stack. (The stack used during the |
98 | * thread), for a thread has its dedicated stack. (The stack used during the |
99 | * BSP initialization (prior the very first call to scheduler()) will be used |
99 | * BSP initialization (prior the very first call to scheduler()) will be used |
100 | * as an initialization stack for each AP.) |
100 | * as an initialization stack for each AP.) |
101 | */ |
101 | */ |
102 | void kmp(void *arg) |
102 | void kmp(void *arg) |
103 | { |
103 | { |
104 | int i; |
104 | int i; |
105 | 105 | ||
106 | ASSERT(ops != NULL); |
106 | ASSERT(ops != NULL); |
107 | 107 | ||
108 | waitq_initialize(&ap_completion_wq); |
108 | waitq_initialize(&ap_completion_wq); |
109 | 109 | ||
110 | /* |
110 | /* |
111 | * We need to access data in frame 0. |
111 | * We need to access data in frame 0. |
112 | * We boldly make use of kernel address space mapping. |
112 | * We boldly make use of kernel address space mapping. |
113 | */ |
113 | */ |
114 | 114 | ||
115 | /* |
115 | /* |
116 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
116 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
117 | */ |
117 | */ |
118 | *((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */ |
118 | *((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */ |
119 | *((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */ |
119 | *((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */ |
120 | 120 | ||
121 | /* |
121 | /* |
122 | * Save 0xa to address 0xf of the CMOS RAM. |
122 | * Save 0xa to address 0xf of the CMOS RAM. |
123 | * BIOS will not do the POST after the INIT signal. |
123 | * BIOS will not do the POST after the INIT signal. |
124 | */ |
124 | */ |
125 | outb(0x70,0xf); |
125 | outb(0x70,0xf); |
126 | outb(0x71,0xa); |
126 | outb(0x71,0xa); |
127 | 127 | ||
128 | pic_disable_irqs(0xffff); |
128 | pic_disable_irqs(0xffff); |
129 | apic_init(); |
129 | apic_init(); |
130 | 130 | ||
131 | for (i = 0; i < ops->cpu_count(); i++) { |
131 | for (i = 0; i < ops->cpu_count(); i++) { |
132 | struct descriptor *gdt_new; |
132 | struct descriptor *gdt_new; |
133 | 133 | ||
134 | /* |
134 | /* |
135 | * Skip processors marked unusable. |
135 | * Skip processors marked unusable. |
136 | */ |
136 | */ |
137 | if (!ops->cpu_enabled(i)) |
137 | if (!ops->cpu_enabled(i)) |
138 | continue; |
138 | continue; |
139 | 139 | ||
140 | /* |
140 | /* |
141 | * The bootstrap processor is already up. |
141 | * The bootstrap processor is already up. |
142 | */ |
142 | */ |
143 | if (ops->cpu_bootstrap(i)) |
143 | if (ops->cpu_bootstrap(i)) |
144 | continue; |
144 | continue; |
145 | 145 | ||
146 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
146 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
147 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
147 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
148 | continue; |
148 | continue; |
149 | } |
149 | } |
150 | 150 | ||
151 | /* |
151 | /* |
152 | * Prepare new GDT for CPU in question. |
152 | * Prepare new GDT for CPU in question. |
153 | */ |
153 | */ |
154 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
154 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC))) |
155 | panic("couldn't allocate memory for GDT\n"); |
155 | panic("couldn't allocate memory for GDT\n"); |
156 | 156 | ||
157 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
157 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
158 | memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
158 | memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
159 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
159 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
160 | protected_ap_gdtr.base = KA2PA((__address) gdt_new); |
160 | protected_ap_gdtr.base = KA2PA((__address) gdt_new); |
161 | gdtr.base = (__address) gdt_new; |
161 | gdtr.base = (__address) gdt_new; |
162 | 162 | ||
163 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
163 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
164 | /* |
164 | /* |
165 | * There may be just one AP being initialized at |
165 | * There may be just one AP being initialized at |
166 | * the time. After it comes completely up, it is |
166 | * the time. After it comes completely up, it is |
167 | * supposed to wake us up. |
167 | * supposed to wake us up. |
168 | */ |
168 | */ |
169 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
169 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) |
170 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
170 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
171 | } else |
171 | } else |
172 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
172 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
173 | } |
173 | } |
174 | } |
174 | } |
175 | 175 | ||
176 | int smp_irq_to_pin(int irq) |
176 | int smp_irq_to_pin(int irq) |
177 | { |
177 | { |
178 | ASSERT(ops != NULL); |
178 | ASSERT(ops != NULL); |
179 | return ops->irq_to_pin(irq); |
179 | return ops->irq_to_pin(irq); |
180 | } |
180 | } |
181 | 181 | ||
182 | #endif /* CONFIG_SMP */ |
182 | #endif /* CONFIG_SMP */ |
183 | 183 | ||
184 | /** @} |
184 | /** @} |
185 | */ |
185 | */ |
186 | 186 | ||
187 | 187 |