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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <smp/smp.h> |
29 | #include <smp/smp.h> |
30 | #include <arch/smp/smp.h> |
30 | #include <arch/smp/smp.h> |
31 | #include <arch/smp/mps.h> |
31 | #include <arch/smp/mps.h> |
32 | #include <arch/smp/ap.h> |
32 | #include <arch/smp/ap.h> |
33 | #include <arch/boot/boot.h> |
33 | #include <arch/boot/boot.h> |
34 | #include <genarch/acpi/acpi.h> |
34 | #include <genarch/acpi/acpi.h> |
35 | #include <genarch/acpi/madt.h> |
35 | #include <genarch/acpi/madt.h> |
36 | #include <config.h> |
36 | #include <config.h> |
37 | #include <synch/waitq.h> |
37 | #include <synch/waitq.h> |
38 | #include <synch/synch.h> |
38 | #include <synch/synch.h> |
39 | #include <arch/pm.h> |
39 | #include <arch/pm.h> |
40 | #include <func.h> |
40 | #include <func.h> |
41 | #include <panic.h> |
41 | #include <panic.h> |
42 | #include <debug.h> |
42 | #include <debug.h> |
43 | #include <arch/asm.h> |
43 | #include <arch/asm.h> |
44 | #include <mm/frame.h> |
44 | #include <mm/frame.h> |
45 | #include <mm/page.h> |
45 | #include <mm/page.h> |
46 | #include <mm/heap.h> |
46 | #include <mm/heap.h> |
47 | #include <mm/as.h> |
47 | #include <mm/as.h> |
48 | #include <print.h> |
48 | #include <print.h> |
49 | #include <memstr.h> |
49 | #include <memstr.h> |
50 | #include <arch/i8259.h> |
50 | #include <arch/i8259.h> |
51 | 51 | ||
52 | #ifdef CONFIG_SMP |
52 | #ifdef CONFIG_SMP |
53 | 53 | ||
54 | static struct smp_config_operations *ops = NULL; |
54 | static struct smp_config_operations *ops = NULL; |
55 | 55 | ||
56 | void smp_init(void) |
56 | void smp_init(void) |
57 | { |
57 | { |
58 | if (acpi_madt) { |
58 | if (acpi_madt) { |
59 | acpi_madt_parse(); |
59 | acpi_madt_parse(); |
60 | ops = &madt_config_operations; |
60 | ops = &madt_config_operations; |
61 | } |
61 | } |
62 | if (config.cpu_count == 1) { |
62 | if (config.cpu_count == 1) { |
63 | mps_init(); |
63 | mps_init(); |
64 | ops = &mps_config_operations; |
64 | ops = &mps_config_operations; |
65 | } |
65 | } |
66 | 66 | ||
67 | if (config.cpu_count > 1) { |
67 | if (config.cpu_count > 1) { |
68 | page_mapping_insert(AS_KERNEL, (__address) l_apic, (__address) l_apic, |
68 | page_mapping_insert(AS_KERNEL, (__address) l_apic, (__address) l_apic, |
69 | PAGE_NOT_CACHEABLE, 0); |
69 | PAGE_NOT_CACHEABLE); |
70 | page_mapping_insert(AS_KERNEL, (__address) io_apic, (__address) io_apic, |
70 | page_mapping_insert(AS_KERNEL, (__address) io_apic, (__address) io_apic, |
71 | PAGE_NOT_CACHEABLE, 0); |
71 | PAGE_NOT_CACHEABLE); |
72 | } |
72 | } |
73 | 73 | ||
74 | /* |
74 | /* |
75 | * Must be initialized outside the kmp thread, since it is waited |
75 | * Must be initialized outside the kmp thread, since it is waited |
76 | * on before the kmp thread is created. |
76 | * on before the kmp thread is created. |
77 | */ |
77 | */ |
78 | waitq_initialize(&kmp_completion_wq); |
78 | waitq_initialize(&kmp_completion_wq); |
79 | 79 | ||
80 | } |
80 | } |
81 | 81 | ||
82 | /* |
82 | /* |
83 | * Kernel thread for bringing up application processors. It becomes clear |
83 | * Kernel thread for bringing up application processors. It becomes clear |
84 | * that we need an arrangement like this (AP's being initialized by a kernel |
84 | * that we need an arrangement like this (AP's being initialized by a kernel |
85 | * thread), for a thread has its dedicated stack. (The stack used during the |
85 | * thread), for a thread has its dedicated stack. (The stack used during the |
86 | * BSP initialization (prior the very first call to scheduler()) will be used |
86 | * BSP initialization (prior the very first call to scheduler()) will be used |
87 | * as an initialization stack for each AP.) |
87 | * as an initialization stack for each AP.) |
88 | */ |
88 | */ |
89 | void kmp(void *arg) |
89 | void kmp(void *arg) |
90 | { |
90 | { |
91 | int i; |
91 | int i; |
92 | 92 | ||
93 | ASSERT(ops != NULL); |
93 | ASSERT(ops != NULL); |
94 | 94 | ||
95 | waitq_initialize(&ap_completion_wq); |
95 | waitq_initialize(&ap_completion_wq); |
96 | 96 | ||
97 | /* |
97 | /* |
98 | * We need to access data in frame 0. |
98 | * We need to access data in frame 0. |
99 | * We boldly make use of kernel address space mapping. |
99 | * We boldly make use of kernel address space mapping. |
100 | */ |
100 | */ |
101 | 101 | ||
102 | /* |
102 | /* |
103 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
103 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
104 | */ |
104 | */ |
105 | *((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */ |
105 | *((__u16 *) (PA2KA(0x467+0))) = ((__address) ap_boot) >> 4; /* segment */ |
106 | *((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */ |
106 | *((__u16 *) (PA2KA(0x467+2))) = 0; /* offset */ |
107 | 107 | ||
108 | /* |
108 | /* |
109 | * Save 0xa to address 0xf of the CMOS RAM. |
109 | * Save 0xa to address 0xf of the CMOS RAM. |
110 | * BIOS will not do the POST after the INIT signal. |
110 | * BIOS will not do the POST after the INIT signal. |
111 | */ |
111 | */ |
112 | outb(0x70,0xf); |
112 | outb(0x70,0xf); |
113 | outb(0x71,0xa); |
113 | outb(0x71,0xa); |
114 | 114 | ||
115 | pic_disable_irqs(0xffff); |
115 | pic_disable_irqs(0xffff); |
116 | apic_init(); |
116 | apic_init(); |
117 | 117 | ||
118 | for (i = 0; i < ops->cpu_count(); i++) { |
118 | for (i = 0; i < ops->cpu_count(); i++) { |
119 | struct descriptor *gdt_new; |
119 | struct descriptor *gdt_new; |
120 | 120 | ||
121 | /* |
121 | /* |
122 | * Skip processors marked unusable. |
122 | * Skip processors marked unusable. |
123 | */ |
123 | */ |
124 | if (!ops->cpu_enabled(i)) |
124 | if (!ops->cpu_enabled(i)) |
125 | continue; |
125 | continue; |
126 | 126 | ||
127 | /* |
127 | /* |
128 | * The bootstrap processor is already up. |
128 | * The bootstrap processor is already up. |
129 | */ |
129 | */ |
130 | if (ops->cpu_bootstrap(i)) |
130 | if (ops->cpu_bootstrap(i)) |
131 | continue; |
131 | continue; |
132 | 132 | ||
133 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
133 | if (ops->cpu_apic_id(i) == l_apic_id()) { |
134 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
134 | printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i); |
135 | continue; |
135 | continue; |
136 | } |
136 | } |
137 | 137 | ||
138 | /* |
138 | /* |
139 | * Prepare new GDT for CPU in question. |
139 | * Prepare new GDT for CPU in question. |
140 | */ |
140 | */ |
141 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor)))) |
141 | if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor)))) |
142 | panic("couldn't allocate memory for GDT\n"); |
142 | panic("couldn't allocate memory for GDT\n"); |
143 | 143 | ||
144 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
144 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor)); |
145 | memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
145 | memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0); |
146 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
146 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor); |
147 | protected_ap_gdtr.base = KA2PA((__address) gdt_new); |
147 | protected_ap_gdtr.base = KA2PA((__address) gdt_new); |
148 | gdtr.base = (__address) gdt_new; |
148 | gdtr.base = (__address) gdt_new; |
149 | 149 | ||
150 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
150 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) { |
151 | /* |
151 | /* |
152 | * There may be just one AP being initialized at |
152 | * There may be just one AP being initialized at |
153 | * the time. After it comes completely up, it is |
153 | * the time. After it comes completely up, it is |
154 | * supposed to wake us up. |
154 | * supposed to wake us up. |
155 | */ |
155 | */ |
156 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT) |
156 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT) |
157 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
157 | printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i)); |
158 | } else |
158 | } else |
159 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
159 | printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i)); |
160 | } |
160 | } |
161 | 161 | ||
162 | /* |
162 | /* |
163 | * Wakeup the kinit thread so that |
163 | * Wakeup the kinit thread so that |
164 | * system initialization can go on. |
164 | * system initialization can go on. |
165 | */ |
165 | */ |
166 | waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST); |
166 | waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST); |
167 | } |
167 | } |
168 | 168 | ||
169 | int smp_irq_to_pin(int irq) |
169 | int smp_irq_to_pin(int irq) |
170 | { |
170 | { |
171 | ASSERT(ops != NULL); |
171 | ASSERT(ops != NULL); |
172 | return ops->irq_to_pin(irq); |
172 | return ops->irq_to_pin(irq); |
173 | } |
173 | } |
174 | 174 | ||
175 | #endif /* CONFIG_SMP */ |
175 | #endif /* CONFIG_SMP */ |
176 | 176 |