WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/smp/mps.c


/*
 * Copyright (C) 2001-2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mps_fs_check(__u8 *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(__u8 n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
waitq_t kmp_completion_wq;
 
 
/*
 * Implementation of IA-32 SMP configuration interface.
 */
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static __u8 get_cpu_apic_id(index_t i);
 
struct smp_config_operations mps_config_operations = {
    .cpu_count = get_cpu_count,
    .cpu_enabled = is_cpu_enabled,
    .cpu_bootstrap = is_bsp,
    .cpu_apic_id = get_cpu_apic_id
};
 
count_t get_cpu_count(void)
{
    return processor_entry_cnt;
}
 
bool is_cpu_enabled(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x1;
}
 
bool is_bsp(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x2;
}
 
__u8 get_cpu_apic_id(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].l_apic_id;
}
 
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(__u8 *base)
{
    int i;
    __u8 sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    __u8 *base = (__u8 *) ct;
    __u8 *ext = base + ct->base_table_length;
    __u8 sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    __u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) };
    int i, j, length[2] = { 1024, 64*1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%P: MPS Floating Pointer Structure\n", fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("%s: PIC mode not supported\n", __FUNCTION__);
            return;
        }
 
        ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    return;
}
 
int configure_via_ct(void)
{
    __u8 *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("%s: bad ct->signature\n", __FUNCTION__);
        return 1;
    }
    if (!mps_ct_check()) {
        printf("%s: bad ct checksum\n", __FUNCTION__);
        return 1;
    }
    if (ct->oem_table) {
        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
        return 1;
    }
   
    l_apic = (__u32 *)(__address)ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                cur += 8;
                break;
 
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("%s: ct badness\n", __FUNCTION__);
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(__u8 n)
{
    /*
     * Not yet implemented.
     */
    printf("%s: not supported\n", __FUNCTION__);
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcpy((void *) buf, (void *) bus->bus_type, 6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if (ioa->io_apic_flags & 1 == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    io_apic = (__u32 *)(__address)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    __u8 *ext = (__u8 *) ct + ct->base_table_length;
    __u8 *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
            default:
                printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
                break;
        }
    }
}
 
int mps_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* CONFIG_SMP */
 

Rev 368	Rev 458
1	/*	1	/*
2	* Copyright (C) 2001-2005 Jakub Jermar	2	* Copyright (C) 2001-2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifdef __SMP__	29	#ifdef CONFIG_SMP
30		30
31	#include <config.h>	31	#include <config.h>
32	#include <print.h>	32	#include <print.h>
33	#include <debug.h>	33	#include <debug.h>
34	#include <arch/smp/mps.h>	34	#include <arch/smp/mps.h>
35	#include <arch/smp/apic.h>	35	#include <arch/smp/apic.h>
36	#include <arch/smp/smp.h>	36	#include <arch/smp/smp.h>
37	#include <func.h>	37	#include <func.h>
38	#include <arch/types.h>	38	#include <arch/types.h>
39	#include <typedefs.h>	39	#include <typedefs.h>
40	#include <cpu.h>	40	#include <cpu.h>
41	#include <arch/asm.h>	41	#include <arch/asm.h>
42	#include <arch/bios/bios.h>	42	#include <arch/bios/bios.h>
43	#include <mm/frame.h>	43	#include <mm/frame.h>
44		44
45	/*	45	/*
46	* MultiProcessor Specification detection code.	46	* MultiProcessor Specification detection code.
47	*/	47	*/
48		48
49	#define FS_SIGNATURE 0x5f504d5f	49	#define FS_SIGNATURE 0x5f504d5f
50	#define CT_SIGNATURE 0x504d4350	50	#define CT_SIGNATURE 0x504d4350
51		51
52	int mps_fs_check(__u8 *base);	52	int mps_fs_check(__u8 *base);
53	int mps_ct_check(void);	53	int mps_ct_check(void);
54		54
55	int configure_via_ct(void);	55	int configure_via_ct(void);
56	int configure_via_default(__u8 n);	56	int configure_via_default(__u8 n);
57		57
58	int ct_processor_entry(struct __processor_entry *pr);	58	int ct_processor_entry(struct __processor_entry *pr);
59	void ct_bus_entry(struct __bus_entry *bus);	59	void ct_bus_entry(struct __bus_entry *bus);
60	void ct_io_apic_entry(struct __io_apic_entry *ioa);	60	void ct_io_apic_entry(struct __io_apic_entry *ioa);
61	void ct_io_intr_entry(struct __io_intr_entry *iointr);	61	void ct_io_intr_entry(struct __io_intr_entry *iointr);
62	void ct_l_intr_entry(struct __l_intr_entry *lintr);	62	void ct_l_intr_entry(struct __l_intr_entry *lintr);
63		63
64	void ct_extended_entries(void);	64	void ct_extended_entries(void);
65		65
66	static struct mps_fs *fs;	66	static struct mps_fs *fs;
67	static struct mps_ct *ct;	67	static struct mps_ct *ct;
68		68
69	struct __processor_entry *processor_entries = NULL;	69	struct __processor_entry *processor_entries = NULL;
70	struct __bus_entry *bus_entries = NULL;	70	struct __bus_entry *bus_entries = NULL;
71	struct __io_apic_entry *io_apic_entries = NULL;	71	struct __io_apic_entry *io_apic_entries = NULL;
72	struct __io_intr_entry *io_intr_entries = NULL;	72	struct __io_intr_entry *io_intr_entries = NULL;
73	struct __l_intr_entry *l_intr_entries = NULL;	73	struct __l_intr_entry *l_intr_entries = NULL;
74		74
75	int processor_entry_cnt = 0;	75	int processor_entry_cnt = 0;
76	int bus_entry_cnt = 0;	76	int bus_entry_cnt = 0;
77	int io_apic_entry_cnt = 0;	77	int io_apic_entry_cnt = 0;
78	int io_intr_entry_cnt = 0;	78	int io_intr_entry_cnt = 0;
79	int l_intr_entry_cnt = 0;	79	int l_intr_entry_cnt = 0;
80		80
81	waitq_t ap_completion_wq;	81	waitq_t ap_completion_wq;
82	waitq_t kmp_completion_wq;	82	waitq_t kmp_completion_wq;
83		83
84		84
85	/*	85	/*
86	* Implementation of IA-32 SMP configuration interface.	86	* Implementation of IA-32 SMP configuration interface.
87	*/	87	*/
88	static count_t get_cpu_count(void);	88	static count_t get_cpu_count(void);
89	static bool is_cpu_enabled(index_t i);	89	static bool is_cpu_enabled(index_t i);
90	static bool is_bsp(index_t i);	90	static bool is_bsp(index_t i);
91	static __u8 get_cpu_apic_id(index_t i);	91	static __u8 get_cpu_apic_id(index_t i);
92		92
93	struct smp_config_operations mps_config_operations = {	93	struct smp_config_operations mps_config_operations = {
94	.cpu_count = get_cpu_count,	94	.cpu_count = get_cpu_count,
95	.cpu_enabled = is_cpu_enabled,	95	.cpu_enabled = is_cpu_enabled,
96	.cpu_bootstrap = is_bsp,	96	.cpu_bootstrap = is_bsp,
97	.cpu_apic_id = get_cpu_apic_id	97	.cpu_apic_id = get_cpu_apic_id
98	};	98	};
99		99
100	count_t get_cpu_count(void)	100	count_t get_cpu_count(void)
101	{	101	{
102	return processor_entry_cnt;	102	return processor_entry_cnt;
103	}	103	}
104		104
105	bool is_cpu_enabled(index_t i)	105	bool is_cpu_enabled(index_t i)
106	{	106	{
107	ASSERT(i < processor_entry_cnt);	107	ASSERT(i < processor_entry_cnt);
108	return processor_entries[i].cpu_flags & 0x1;	108	return processor_entries[i].cpu_flags & 0x1;
109	}	109	}
110		110
111	bool is_bsp(index_t i)	111	bool is_bsp(index_t i)
112	{	112	{
113	ASSERT(i < processor_entry_cnt);	113	ASSERT(i < processor_entry_cnt);
114	return processor_entries[i].cpu_flags & 0x2;	114	return processor_entries[i].cpu_flags & 0x2;
115	}	115	}
116		116
117	__u8 get_cpu_apic_id(index_t i)	117	__u8 get_cpu_apic_id(index_t i)
118	{	118	{
119	ASSERT(i < processor_entry_cnt);	119	ASSERT(i < processor_entry_cnt);
120	return processor_entries[i].l_apic_id;	120	return processor_entries[i].l_apic_id;
121	}	121	}
122		122
123		123
124	/*	124	/*
125	* Used to check the integrity of the MP Floating Structure.	125	* Used to check the integrity of the MP Floating Structure.
126	*/	126	*/
127	int mps_fs_check(__u8 *base)	127	int mps_fs_check(__u8 *base)
128	{	128	{
129	int i;	129	int i;
130	__u8 sum;	130	__u8 sum;
131		131
132	for (i = 0, sum = 0; i < 16; i++)	132	for (i = 0, sum = 0; i < 16; i++)
133	sum += base[i];	133	sum += base[i];
134		134
135	return !sum;	135	return !sum;
136	}	136	}
137		137
138	/*	138	/*
139	* Used to check the integrity of the MP Configuration Table.	139	* Used to check the integrity of the MP Configuration Table.
140	*/	140	*/
141	int mps_ct_check(void)	141	int mps_ct_check(void)
142	{	142	{
143	__u8 base = (__u8 ) ct;	143	__u8 base = (__u8 ) ct;
144	__u8 *ext = base + ct->base_table_length;	144	__u8 *ext = base + ct->base_table_length;
145	__u8 sum;	145	__u8 sum;
146	int i;	146	int i;
147		147
148	/* count the checksum for the base table */	148	/* count the checksum for the base table */
149	for (i=0,sum=0; i < ct->base_table_length; i++)	149	for (i=0,sum=0; i < ct->base_table_length; i++)
150	sum += base[i];	150	sum += base[i];
151		151
152	if (sum)	152	if (sum)
153	return 0;	153	return 0;
154		154
155	/* count the checksum for the extended table */	155	/* count the checksum for the extended table */
156	for (i=0,sum=0; i < ct->ext_table_length; i++)	156	for (i=0,sum=0; i < ct->ext_table_length; i++)
157	sum += ext[i];	157	sum += ext[i];
158		158
159	return sum == ct->ext_table_checksum;	159	return sum == ct->ext_table_checksum;
160	}	160	}
161		161
162	void mps_init(void)	162	void mps_init(void)
163	{	163	{
164	__u8 addr[2] = { NULL, (__u8 ) PA2KA(0xf0000) };	164	__u8 addr[2] = { NULL, (__u8 ) PA2KA(0xf0000) };
165	int i, j, length[2] = { 1024, 64*1024 };	165	int i, j, length[2] = { 1024, 64*1024 };
166		166
167		167
168	/*	168	/*
169	* Find MP Floating Pointer Structure	169	* Find MP Floating Pointer Structure
170	* 1a. search first 1K of EBDA	170	* 1a. search first 1K of EBDA
171	* 1b. if EBDA is undefined, search last 1K of base memory	171	* 1b. if EBDA is undefined, search last 1K of base memory
172	* 2. search 64K starting at 0xf0000	172	* 2. search 64K starting at 0xf0000
173	*/	173	*/
174		174
175	addr[0] = (__u8 ) PA2KA(ebda ? ebda : 639 1024);	175	addr[0] = (__u8 ) PA2KA(ebda ? ebda : 639 1024);
176	for (i = 0; i < 2; i++) {	176	for (i = 0; i < 2; i++) {
177	for (j = 0; j < length[i]; j += 16) {	177	for (j = 0; j < length[i]; j += 16) {
178	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {	178	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
179	fs = (struct mps_fs *) &addr[i][j];	179	fs = (struct mps_fs *) &addr[i][j];
180	goto fs_found;	180	goto fs_found;
181	}	181	}
182	}	182	}
183	}	183	}
184		184
185	return;	185	return;
186		186
187	fs_found:	187	fs_found:
188	printf("%P: MPS Floating Pointer Structure\n", fs);	188	printf("%P: MPS Floating Pointer Structure\n", fs);
189		189
190	if (fs->config_type == 0 && fs->configuration_table) {	190	if (fs->config_type == 0 && fs->configuration_table) {
191	if (fs->mpfib2 >> 7) {	191	if (fs->mpfib2 >> 7) {
192	printf("%s: PIC mode not supported\n", __FUNCTION__);	192	printf("%s: PIC mode not supported\n", __FUNCTION__);
193	return;	193	return;
194	}	194	}
195		195
196	ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);	196	ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
197	config.cpu_count = configure_via_ct();	197	config.cpu_count = configure_via_ct();
198	}	198	}
199	else	199	else
200	config.cpu_count = configure_via_default(fs->config_type);	200	config.cpu_count = configure_via_default(fs->config_type);
201		201
202	return;	202	return;
203	}	203	}
204		204
205	int configure_via_ct(void)	205	int configure_via_ct(void)
206	{	206	{
207	__u8 *cur;	207	__u8 *cur;
208	int i, cnt;	208	int i, cnt;
209		209
210	if (ct->signature != CT_SIGNATURE) {	210	if (ct->signature != CT_SIGNATURE) {
211	printf("%s: bad ct->signature\n", __FUNCTION__);	211	printf("%s: bad ct->signature\n", __FUNCTION__);
212	return 1;	212	return 1;
213	}	213	}
214	if (!mps_ct_check()) {	214	if (!mps_ct_check()) {
215	printf("%s: bad ct checksum\n", __FUNCTION__);	215	printf("%s: bad ct checksum\n", __FUNCTION__);
216	return 1;	216	return 1;
217	}	217	}
218	if (ct->oem_table) {	218	if (ct->oem_table) {
219	printf("%s: ct->oem_table not supported\n", __FUNCTION__);	219	printf("%s: ct->oem_table not supported\n", __FUNCTION__);
220	return 1;	220	return 1;
221	}	221	}
222		222
223	l_apic = (__u32 *)(__address)ct->l_apic;	223	l_apic = (__u32 *)(__address)ct->l_apic;
224		224
225	cnt = 0;	225	cnt = 0;
226	cur = &ct->base_table[0];	226	cur = &ct->base_table[0];
227	for (i=0; i < ct->entry_count; i++) {	227	for (i=0; i < ct->entry_count; i++) {
228	switch (*cur) {	228	switch (*cur) {
229	/* Processor entry */	229	/* Processor entry */
230	case 0:	230	case 0:
231	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	231	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
232	processor_entry_cnt++;	232	processor_entry_cnt++;
233	cnt += ct_processor_entry((struct __processor_entry *) cur);	233	cnt += ct_processor_entry((struct __processor_entry *) cur);
234	cur += 20;	234	cur += 20;
235	break;	235	break;
236		236
237	/* Bus entry */	237	/* Bus entry */
238	case 1:	238	case 1:
239	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	239	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
240	bus_entry_cnt++;	240	bus_entry_cnt++;
241	ct_bus_entry((struct __bus_entry *) cur);	241	ct_bus_entry((struct __bus_entry *) cur);
242	cur += 8;	242	cur += 8;
243	break;	243	break;
244		244
245	/* I/O Apic */	245	/* I/O Apic */
246	case 2:	246	case 2:
247	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	247	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
248	io_apic_entry_cnt++;	248	io_apic_entry_cnt++;
249	ct_io_apic_entry((struct __io_apic_entry *) cur);	249	ct_io_apic_entry((struct __io_apic_entry *) cur);
250	cur += 8;	250	cur += 8;
251	break;	251	break;
252		252
253	/* I/O Interrupt Assignment */	253	/* I/O Interrupt Assignment */
254	case 3:	254	case 3:
255	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	255	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
256	io_intr_entry_cnt++;	256	io_intr_entry_cnt++;
257	ct_io_intr_entry((struct __io_intr_entry *) cur);	257	ct_io_intr_entry((struct __io_intr_entry *) cur);
258	cur += 8;	258	cur += 8;
259	break;	259	break;
260		260
261	/* Local Interrupt Assignment */	261	/* Local Interrupt Assignment */
262	case 4:	262	case 4:
263	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	263	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
264	l_intr_entry_cnt++;	264	l_intr_entry_cnt++;
265	ct_l_intr_entry((struct __l_intr_entry *) cur);	265	ct_l_intr_entry((struct __l_intr_entry *) cur);
266	cur += 8;	266	cur += 8;
267	break;	267	break;
268		268
269	default:	269	default:
270	/*	270	/*
271	* Something is wrong. Fallback to UP mode.	271	* Something is wrong. Fallback to UP mode.
272	*/	272	*/
273		273
274	printf("%s: ct badness\n", __FUNCTION__);	274	printf("%s: ct badness\n", __FUNCTION__);
275	return 1;	275	return 1;
276	}	276	}
277	}	277	}
278		278
279	/*	279	/*
280	* Process extended entries.	280	* Process extended entries.
281	*/	281	*/
282	ct_extended_entries();	282	ct_extended_entries();
283	return cnt;	283	return cnt;
284	}	284	}
285		285
286	int configure_via_default(__u8 n)	286	int configure_via_default(__u8 n)
287	{	287	{
288	/*	288	/*
289	* Not yet implemented.	289	* Not yet implemented.
290	*/	290	*/
291	printf("%s: not supported\n", __FUNCTION__);	291	printf("%s: not supported\n", __FUNCTION__);
292	return 1;	292	return 1;
293	}	293	}
294		294
295		295
296	int ct_processor_entry(struct __processor_entry *pr)	296	int ct_processor_entry(struct __processor_entry *pr)
297	{	297	{
298	/*	298	/*
299	* Ignore processors which are not marked enabled.	299	* Ignore processors which are not marked enabled.
300	*/	300	*/
301	if ((pr->cpu_flags & (1<<0)) == 0)	301	if ((pr->cpu_flags & (1<<0)) == 0)
302	return 0;	302	return 0;
303		303
304	apic_id_mask \|= (1<<pr->l_apic_id);	304	apic_id_mask \|= (1<<pr->l_apic_id);
305	return 1;	305	return 1;
306	}	306	}
307		307
308	void ct_bus_entry(struct __bus_entry *bus)	308	void ct_bus_entry(struct __bus_entry *bus)
309	{	309	{
310	#ifdef MPSCT_VERBOSE	310	#ifdef MPSCT_VERBOSE
311	char buf[7];	311	char buf[7];
312	memcpy((void ) buf, (void ) bus->bus_type, 6);	312	memcpy((void ) buf, (void ) bus->bus_type, 6);
313	buf[6] = 0;	313	buf[6] = 0;
314	printf("bus%d: %s\n", bus->bus_id, buf);	314	printf("bus%d: %s\n", bus->bus_id, buf);
315	#endif	315	#endif
316	}	316	}
317		317
318	void ct_io_apic_entry(struct __io_apic_entry *ioa)	318	void ct_io_apic_entry(struct __io_apic_entry *ioa)
319	{	319	{
320	static int io_apic_count = 0;	320	static int io_apic_count = 0;
321		321
322	/* this ioapic is marked unusable */	322	/* this ioapic is marked unusable */
323	if (ioa->io_apic_flags & 1 == 0)	323	if (ioa->io_apic_flags & 1 == 0)
324	return;	324	return;
325		325
326	if (io_apic_count++ > 0) {	326	if (io_apic_count++ > 0) {
327	/*	327	/*
328	* Multiple IO APIC's are currently not supported.	328	* Multiple IO APIC's are currently not supported.
329	*/	329	*/
330	return;	330	return;
331	}	331	}
332		332
333	io_apic = (__u32 *)(__address)ioa->io_apic;	333	io_apic = (__u32 *)(__address)ioa->io_apic;
334	}	334	}
335		335
336	//#define MPSCT_VERBOSE	336	//#define MPSCT_VERBOSE
337	void ct_io_intr_entry(struct __io_intr_entry *iointr)	337	void ct_io_intr_entry(struct __io_intr_entry *iointr)
338	{	338	{
339	#ifdef MPSCT_VERBOSE	339	#ifdef MPSCT_VERBOSE
340	switch (iointr->intr_type) {	340	switch (iointr->intr_type) {
341	case 0: printf("INT"); break;	341	case 0: printf("INT"); break;
342	case 1: printf("NMI"); break;	342	case 1: printf("NMI"); break;
343	case 2: printf("SMI"); break;	343	case 2: printf("SMI"); break;
344	case 3: printf("ExtINT"); break;	344	case 3: printf("ExtINT"); break;
345	}	345	}
346	putchar(',');	346	putchar(',');
347	switch (iointr->poel&3) {	347	switch (iointr->poel&3) {
348	case 0: printf("bus-like"); break;	348	case 0: printf("bus-like"); break;
349	case 1: printf("active high"); break;	349	case 1: printf("active high"); break;
350	case 2: printf("reserved"); break;	350	case 2: printf("reserved"); break;
351	case 3: printf("active low"); break;	351	case 3: printf("active low"); break;
352	}	352	}
353	putchar(',');	353	putchar(',');
354	switch ((iointr->poel>>2)&3) {	354	switch ((iointr->poel>>2)&3) {
355	case 0: printf("bus-like"); break;	355	case 0: printf("bus-like"); break;
356	case 1: printf("edge-triggered"); break;	356	case 1: printf("edge-triggered"); break;
357	case 2: printf("reserved"); break;	357	case 2: printf("reserved"); break;
358	case 3: printf("level-triggered"); break;	358	case 3: printf("level-triggered"); break;
359	}	359	}
360	putchar(',');	360	putchar(',');
361	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	361	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
362	putchar(',');	362	putchar(',');
363	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	363	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
364	putchar('\n');	364	putchar('\n');
365	#endif	365	#endif
366	}	366	}
367		367
368	void ct_l_intr_entry(struct __l_intr_entry *lintr)	368	void ct_l_intr_entry(struct __l_intr_entry *lintr)
369	{	369	{
370	#ifdef MPSCT_VERBOSE	370	#ifdef MPSCT_VERBOSE
371	switch (lintr->intr_type) {	371	switch (lintr->intr_type) {
372	case 0: printf("INT"); break;	372	case 0: printf("INT"); break;
373	case 1: printf("NMI"); break;	373	case 1: printf("NMI"); break;
374	case 2: printf("SMI"); break;	374	case 2: printf("SMI"); break;
375	case 3: printf("ExtINT"); break;	375	case 3: printf("ExtINT"); break;
376	}	376	}
377	putchar(',');	377	putchar(',');
378	switch (lintr->poel&3) {	378	switch (lintr->poel&3) {
379	case 0: printf("bus-like"); break;	379	case 0: printf("bus-like"); break;
380	case 1: printf("active high"); break;	380	case 1: printf("active high"); break;
381	case 2: printf("reserved"); break;	381	case 2: printf("reserved"); break;
382	case 3: printf("active low"); break;	382	case 3: printf("active low"); break;
383	}	383	}
384	putchar(',');	384	putchar(',');
385	switch ((lintr->poel>>2)&3) {	385	switch ((lintr->poel>>2)&3) {
386	case 0: printf("bus-like"); break;	386	case 0: printf("bus-like"); break;
387	case 1: printf("edge-triggered"); break;	387	case 1: printf("edge-triggered"); break;
388	case 2: printf("reserved"); break;	388	case 2: printf("reserved"); break;
389	case 3: printf("level-triggered"); break;	389	case 3: printf("level-triggered"); break;
390	}	390	}
391	putchar(',');	391	putchar(',');
392	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	392	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
393	putchar(',');	393	putchar(',');
394	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	394	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
395	putchar('\n');	395	putchar('\n');
396	#endif	396	#endif
397	}	397	}
398		398
399	void ct_extended_entries(void)	399	void ct_extended_entries(void)
400	{	400	{
401	__u8 ext = (__u8 ) ct + ct->base_table_length;	401	__u8 ext = (__u8 ) ct + ct->base_table_length;
402	__u8 *cur;	402	__u8 *cur;
403		403
404	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {	404	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
405	switch (cur[CT_EXT_ENTRY_TYPE]) {	405	switch (cur[CT_EXT_ENTRY_TYPE]) {
406	default:	406	default:
407	printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	407	printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
408	break;	408	break;
409	}	409	}
410	}	410	}
411	}	411	}
412		412
413	int mps_irq_to_pin(int irq)	413	int mps_irq_to_pin(int irq)
414	{	414	{
415	int i;	415	int i;
416		416
417	for(i=0;i<io_intr_entry_cnt;i++) {	417	for(i=0;i<io_intr_entry_cnt;i++) {
418	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)	418	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
419	return io_intr_entries[i].dst_io_apic_pin;	419	return io_intr_entries[i].dst_io_apic_pin;
420	}	420	}
421		421
422	return -1;	422	return -1;
423	}	423	}
424		424
425	#endif /* __SMP__ */	425	#endif /* CONFIG_SMP */
426		426

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(root)/kernel/trunk/arch/ia32/src/smp/mps.c @ 1780 – Rev 368 → 458