WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/smp/mps.c


/*
 * Copyright (C) 2001-2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifdef __SMP__
 
#include <arch/pm.h>
#include <config.h>
#include <print.h>
#include <panic.h>
#include <arch/smp/mps.h>
#include <arch/smp/ap.h>
#include <arch/smp/apic.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <synch/waitq.h>
#include <time/delay.h>
#include <mm/heap.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <cpu.h>
#include <arch/i8259.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <arch/acpi/madt.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mps_fs_check(__u8 *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(__u8 n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
waitq_t kmp_completion_wq;
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(__u8 *base)
{
    int i;
    __u8 sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    __u8 *base = (__u8 *) ct;
    __u8 *ext = base + ct->base_table_length;
    __u8 sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    __u8 *addr[2] = { NULL, (__u8 *) 0xf0000 };
    int i, j, length[2] = { 1024, 64*1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (__u8 *) (ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%L: MPS Floating Pointer Structure\n", fs);
 
    frame_not_free((__address) fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("mps_init: PIC mode not supported\n");
            return;
        }
 
        ct = fs->configuration_table;
        frame_not_free((__address) ct);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    if (config.cpu_count > 1) {
        map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
    }      
   
   
    /*
     * Must be initialized outside the kmp thread, since it is waited
     * on before the kmp thread is created.
     */
    waitq_initialize(&kmp_completion_wq);
    return;
}
 
int configure_via_ct(void)
{
    __u8 *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("configure_via_ct: bad ct->signature\n");
        return 1;
    }
    if (!mps_ct_check()) {
        printf("configure_via_ct: bad ct checksum\n");
        return 1;
    }
    if (ct->oem_table) {
        printf("configure_via_ct: ct->oem_table not supported\n");
        return 1;
    }
   
    l_apic = ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                    cur += 8;
                break;
       
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("configure_via_ct: ct badness\n");
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(__u8 n)
{
    /*
     * Not yet implemented.
     */
    printf("configure_via_default: not supported\n");
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcopy((__address) bus->bus_type, (__address) buf,6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if (ioa->io_apic_flags & 1 == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);
   
    io_apic = ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    __u8 *ext = (__u8 *) ct + ct->base_table_length;
    __u8 *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
            default:
                printf("%L: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
                break;
        }
    }
}
 
/*
 * Kernel thread for bringing up application processors. It becomes clear
 * that we need an arrangement like this (AP's being initialized by a kernel
 * thread), for a thread has its dedicated stack. (The stack used during the
 * BSP initialization (prior the very first call to scheduler()) will be used
 * as an initialization stack for each AP.)
 */
void kmp(void *arg)
{
    struct __processor_entry *pr;
    __address src, dst;
    __address frame;
    int i;
 
    waitq_initialize(&ap_completion_wq);
 
    /*
     * Processor entries immediately follow the configuration table header.
     */
    pr = processor_entries;
 
    /*
     * Grab a frame and map its address to page 0. This is a hack which
     * accesses data in frame 0. Note that page 0 is not present because
     * of nil reference bug catching.
     */
    frame = frame_alloc(FRAME_KA);
    map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
 
    /*
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
     */
    *((__u16 *) (frame + 0x467+0)) =  ((__address) ap_boot) >> 4;   /* segment */
    *((__u16 *) (frame + 0x467+2)) =  0x0;  /* offset */
   
    /*
     * Give back the borrowed frame and restore identity mapping for it.
     */
    map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
    frame_free(frame);
 
    /*
     * Save 0xa to address 0xf of the CMOS RAM.
     * BIOS will not do the POST after the INIT signal.
     */
    outb(0x70,0xf);
    outb(0x71,0xa);
 
    cpu_priority_high();
 
    pic_disable_irqs(0xffff);
    apic_init();
 
    for (i = 0; i < processor_entry_cnt; i++) {
        struct descriptor *gdt_new;
   
        /*
         * Skip processors marked unusable.
         */
        if (pr[i].cpu_flags & (1<<0) == 0)
            continue;
 
        /*
         * The bootstrap processor is already up.
         */
        if (pr[i].cpu_flags & (1<<1))
            continue;
 
        if (pr[i].l_apic_id == l_apic_id()) {
            printf("%L: bad processor entry #%d, will not send IPI to myself\n", &pr[i], i);
            continue;
        }
       
        /*
         * Prepare new GDT for CPU in question.
         */
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
            panic(PANIC "couldn't allocate memory for GDT\n");
 
        memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
        gdtr.base = (__address) gdt_new;
 
        if (l_apic_send_init_ipi(pr[i].l_apic_id)) {
            /*
                 * There may be just one AP being initialized at
             * the time. After it comes completely up, it is
             * supposed to wake us up.
                 */
            waitq_sleep(&ap_completion_wq);
            cpu_priority_high();
        }
        else {
            printf("INIT IPI for l_apic%d failed\n", pr[i].l_apic_id);
        }
    }
 
    /*
     * Wakeup the kinit thread so that
     * system initialization can go on.
     */
    waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
}
 
int mps_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* __SMP__ */
 

Rev 33	Rev 34
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifdef __SMP__	29	#ifdef __SMP__
30		30
31	#include <arch/pm.h>	31	#include <arch/pm.h>
32	#include <config.h>	32	#include <config.h>
33	#include <print.h>	33	#include <print.h>
34	#include <panic.h>	34	#include <panic.h>
35	#include <arch/smp/mp.h>	35	#include <arch/smp/mps.h>
36	#include <arch/smp/ap.h>	36	#include <arch/smp/ap.h>
37	#include <arch/smp/apic.h>	37	#include <arch/smp/apic.h>
38	#include <func.h>	38	#include <func.h>
39	#include <arch/types.h>	39	#include <arch/types.h>
40	#include <typedefs.h>	40	#include <typedefs.h>
41	#include <synch/waitq.h>	41	#include <synch/waitq.h>
42	#include <time/delay.h>	42	#include <time/delay.h>
43	#include <mm/heap.h>	43	#include <mm/heap.h>
44	#include <mm/page.h>	44	#include <mm/page.h>
45	#include <mm/frame.h>	45	#include <mm/frame.h>
46	#include <cpu.h>	46	#include <cpu.h>
47	#include <arch/i8259.h>	47	#include <arch/i8259.h>
48	#include <arch/asm.h>	48	#include <arch/asm.h>
49	#include <arch/bios/bios.h>	49	#include <arch/bios/bios.h>
50	#include <arch/acpi/madt.h>	50	#include <arch/acpi/madt.h>
51		51
52	/*	52	/*
53	* Multi-Processor Specification detection code.	53	* MultiProcessor Specification detection code.
54	*/	54	*/
55		55
56	#define FS_SIGNATURE 0x5f504d5f	56	#define FS_SIGNATURE 0x5f504d5f
57	#define CT_SIGNATURE 0x504d4350	57	#define CT_SIGNATURE 0x504d4350
58		58
59	int mp_fs_check(__u8 *base);	59	int mps_fs_check(__u8 *base);
60	int mp_ct_check(void);	60	int mps_ct_check(void);
61		61
62	int configure_via_ct(void);	62	int configure_via_ct(void);
63	int configure_via_default(__u8 n);	63	int configure_via_default(__u8 n);
64		64
65	int ct_processor_entry(struct __processor_entry *pr);	65	int ct_processor_entry(struct __processor_entry *pr);
66	void ct_bus_entry(struct __bus_entry *bus);	66	void ct_bus_entry(struct __bus_entry *bus);
67	void ct_io_apic_entry(struct __io_apic_entry *ioa);	67	void ct_io_apic_entry(struct __io_apic_entry *ioa);
68	void ct_io_intr_entry(struct __io_intr_entry *iointr);	68	void ct_io_intr_entry(struct __io_intr_entry *iointr);
69	void ct_l_intr_entry(struct __l_intr_entry *lintr);	69	void ct_l_intr_entry(struct __l_intr_entry *lintr);
70		70
71	void ct_extended_entries(void);	71	void ct_extended_entries(void);
72		72
73	static struct __mpfs *fs;	73	static struct mps_fs *fs;
74	static struct __mpct *ct;	74	static struct mps_ct *ct;
75		75
76	struct __processor_entry *processor_entries = NULL;	76	struct __processor_entry *processor_entries = NULL;
77	struct __bus_entry *bus_entries = NULL;	77	struct __bus_entry *bus_entries = NULL;
78	struct __io_apic_entry *io_apic_entries = NULL;	78	struct __io_apic_entry *io_apic_entries = NULL;
79	struct __io_intr_entry *io_intr_entries = NULL;	79	struct __io_intr_entry *io_intr_entries = NULL;
80	struct __l_intr_entry *l_intr_entries = NULL;	80	struct __l_intr_entry *l_intr_entries = NULL;
81		81
82	int processor_entry_cnt = 0;	82	int processor_entry_cnt = 0;
83	int bus_entry_cnt = 0;	83	int bus_entry_cnt = 0;
84	int io_apic_entry_cnt = 0;	84	int io_apic_entry_cnt = 0;
85	int io_intr_entry_cnt = 0;	85	int io_intr_entry_cnt = 0;
86	int l_intr_entry_cnt = 0;	86	int l_intr_entry_cnt = 0;
87		87
88	waitq_t ap_completion_wq;	88	waitq_t ap_completion_wq;
89	waitq_t kmp_completion_wq;	89	waitq_t kmp_completion_wq;
90		90
91	/*	91	/*
92	* Used to check the integrity of the MP Floating Structure.	92	* Used to check the integrity of the MP Floating Structure.
93	*/	93	*/
94	int mp_fs_check(__u8 *base)	94	int mps_fs_check(__u8 *base)
95	{	95	{
96	int i;	96	int i;
97	__u8 sum;	97	__u8 sum;
98		98
99	for (i = 0, sum = 0; i < 16; i++)	99	for (i = 0, sum = 0; i < 16; i++)
100	sum += base[i];	100	sum += base[i];
101		101
102	return !sum;	102	return !sum;
103	}	103	}
104		104
105	/*	105	/*
106	* Used to check the integrity of the MP Configuration Table.	106	* Used to check the integrity of the MP Configuration Table.
107	*/	107	*/
108	int mp_ct_check(void)	108	int mps_ct_check(void)
109	{	109	{
110	__u8 base = (__u8 ) ct;	110	__u8 base = (__u8 ) ct;
111	__u8 *ext = base + ct->base_table_length;	111	__u8 *ext = base + ct->base_table_length;
112	__u8 sum;	112	__u8 sum;
113	int i;	113	int i;
114		114
115	/* count the checksum for the base table */	115	/* count the checksum for the base table */
116	for (i=0,sum=0; i < ct->base_table_length; i++)	116	for (i=0,sum=0; i < ct->base_table_length; i++)
117	sum += base[i];	117	sum += base[i];
118		118
119	if (sum)	119	if (sum)
120	return 0;	120	return 0;
121		121
122	/* count the checksum for the extended table */	122	/* count the checksum for the extended table */
123	for (i=0,sum=0; i < ct->ext_table_length; i++)	123	for (i=0,sum=0; i < ct->ext_table_length; i++)
124	sum += ext[i];	124	sum += ext[i];
125		125
126	return sum == ct->ext_table_checksum;	126	return sum == ct->ext_table_checksum;
127	}	127	}
128		128
129	void mp_init(void)	129	void mps_init(void)
130	{	130	{
131	__u8 addr[2] = { NULL, (__u8 ) 0xf0000 };	131	__u8 addr[2] = { NULL, (__u8 ) 0xf0000 };
132	int i, j, length[2] = { 1024, 64*1024 };	132	int i, j, length[2] = { 1024, 64*1024 };
133		133
134		134
135	/*	135	/*
136	* Find MP Floating Pointer Structure	136	* Find MP Floating Pointer Structure
137	* 1a. search first 1K of EBDA	137	* 1a. search first 1K of EBDA
138	* 1b. if EBDA is undefined, search last 1K of base memory	138	* 1b. if EBDA is undefined, search last 1K of base memory
139	* 2. search 64K starting at 0xf0000	139	* 2. search 64K starting at 0xf0000
140	*/	140	*/
141		141
142	addr[0] = (__u8 ) (ebda ? ebda : 639 1024);	142	addr[0] = (__u8 ) (ebda ? ebda : 639 1024);
143	for (i = 0; i < 2; i++) {	143	for (i = 0; i < 2; i++) {
144	for (j = 0; j < length[i]; j += 16) {	144	for (j = 0; j < length[i]; j += 16) {
145	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mp_fs_check(&addr[i][j])) {	145	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
146	fs = (struct __mpfs *) &addr[i][j];	146	fs = (struct mps_fs *) &addr[i][j];
147	goto fs_found;	147	goto fs_found;
148	}	148	}
149	}	149	}
150	}	150	}
151		151
152	return;	152	return;
153		153
154	fs_found:	154	fs_found:
155	printf("%L: MP Floating Pointer Structure\n", fs);	155	printf("%L: MPS Floating Pointer Structure\n", fs);
156		156
157	frame_not_free((__address) fs);	157	frame_not_free((__address) fs);
158		158
159	if (fs->config_type == 0 && fs->configuration_table) {	159	if (fs->config_type == 0 && fs->configuration_table) {
160	if (fs->mpfib2 >> 7) {	160	if (fs->mpfib2 >> 7) {
161	printf("mp_init: PIC mode not supported\n");	161	printf("mps_init: PIC mode not supported\n");
162	return;	162	return;
163	}	163	}
164		164
165	ct = fs->configuration_table;	165	ct = fs->configuration_table;
166	frame_not_free((__address) ct);	166	frame_not_free((__address) ct);
167	config.cpu_count = configure_via_ct();	167	config.cpu_count = configure_via_ct();
168	}	168	}
169	else	169	else
170	config.cpu_count = configure_via_default(fs->config_type);	170	config.cpu_count = configure_via_default(fs->config_type);
171		171
172	if (config.cpu_count > 1) {	172	if (config.cpu_count > 1) {
173	map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);	173	map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
174	}	174	}
175		175
176		176
177	/*	177	/*
178	* Must be initialized outside the kmp thread, since it is waited	178	* Must be initialized outside the kmp thread, since it is waited
179	* on before the kmp thread is created.	179	* on before the kmp thread is created.
180	*/	180	*/
181	waitq_initialize(&kmp_completion_wq);	181	waitq_initialize(&kmp_completion_wq);
182	return;	182	return;
183	}	183	}
184		184
185	int configure_via_ct(void)	185	int configure_via_ct(void)
186	{	186	{
187	__u8 *cur;	187	__u8 *cur;
188	int i, cnt;	188	int i, cnt;
189		189
190	if (ct->signature != CT_SIGNATURE) {	190	if (ct->signature != CT_SIGNATURE) {
191	printf("configure_via_ct: bad ct->signature\n");	191	printf("configure_via_ct: bad ct->signature\n");
192	return 1;	192	return 1;
193	}	193	}
194	if (!mp_ct_check()) {	194	if (!mps_ct_check()) {
195	printf("configure_via_ct: bad ct checksum\n");	195	printf("configure_via_ct: bad ct checksum\n");
196	return 1;	196	return 1;
197	}	197	}
198	if (ct->oem_table) {	198	if (ct->oem_table) {
199	printf("configure_via_ct: ct->oem_table not supported\n");	199	printf("configure_via_ct: ct->oem_table not supported\n");
200	return 1;	200	return 1;
201	}	201	}
202		202
203	l_apic = ct->l_apic;	203	l_apic = ct->l_apic;
204		204
205	cnt = 0;	205	cnt = 0;
206	cur = &ct->base_table[0];	206	cur = &ct->base_table[0];
207	for (i=0; i < ct->entry_count; i++) {	207	for (i=0; i < ct->entry_count; i++) {
208	switch (*cur) {	208	switch (*cur) {
209	/* Processor entry */	209	/* Processor entry */
210	case 0:	210	case 0:
211	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	211	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
212	processor_entry_cnt++;	212	processor_entry_cnt++;
213	cnt += ct_processor_entry((struct __processor_entry *) cur);	213	cnt += ct_processor_entry((struct __processor_entry *) cur);
214	cur += 20;	214	cur += 20;
215	break;	215	break;
216		216
217	/* Bus entry */	217	/* Bus entry */
218	case 1:	218	case 1:
219	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	219	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
220	bus_entry_cnt++;	220	bus_entry_cnt++;
221	ct_bus_entry((struct __bus_entry *) cur);	221	ct_bus_entry((struct __bus_entry *) cur);
222	cur += 8;	222	cur += 8;
223	break;	223	break;
224		224
225	/* I/O Apic */	225	/* I/O Apic */
226	case 2:	226	case 2:
227	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	227	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
228	io_apic_entry_cnt++;	228	io_apic_entry_cnt++;
229	ct_io_apic_entry((struct __io_apic_entry *) cur);	229	ct_io_apic_entry((struct __io_apic_entry *) cur);
230	cur += 8;	230	cur += 8;
231	break;	231	break;
232		232
233	/* I/O Interrupt Assignment */	233	/* I/O Interrupt Assignment */
234	case 3:	234	case 3:
235	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	235	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
236	io_intr_entry_cnt++;	236	io_intr_entry_cnt++;
237	ct_io_intr_entry((struct __io_intr_entry *) cur);	237	ct_io_intr_entry((struct __io_intr_entry *) cur);
238	cur += 8;	238	cur += 8;
239	break;	239	break;
240		240
241	/* Local Interrupt Assignment */	241	/* Local Interrupt Assignment */
242	case 4:	242	case 4:
243	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	243	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
244	l_intr_entry_cnt++;	244	l_intr_entry_cnt++;
245	ct_l_intr_entry((struct __l_intr_entry *) cur);	245	ct_l_intr_entry((struct __l_intr_entry *) cur);
246	cur += 8;	246	cur += 8;
247	break;	247	break;
248		248
249	default:	249	default:
250	/*	250	/*
251	* Something is wrong. Fallback to UP mode.	251	* Something is wrong. Fallback to UP mode.
252	*/	252	*/
253		253
254	printf("configure_via_ct: ct badness\n");	254	printf("configure_via_ct: ct badness\n");
255	return 1;	255	return 1;
256	}	256	}
257	}	257	}
258		258
259	/*	259	/*
260	* Process extended entries.	260	* Process extended entries.
261	*/	261	*/
262	ct_extended_entries();	262	ct_extended_entries();
263	return cnt;	263	return cnt;
264	}	264	}
265		265
266	int configure_via_default(__u8 n)	266	int configure_via_default(__u8 n)
267	{	267	{
268	/*	268	/*
269	* Not yet implemented.	269	* Not yet implemented.
270	*/	270	*/
271	printf("configure_via_default: not supported\n");	271	printf("configure_via_default: not supported\n");
272	return 1;	272	return 1;
273	}	273	}
274		274
275		275
276	int ct_processor_entry(struct __processor_entry *pr)	276	int ct_processor_entry(struct __processor_entry *pr)
277	{	277	{
278	/*	278	/*
279	* Ignore processors which are not marked enabled.	279	* Ignore processors which are not marked enabled.
280	*/	280	*/
281	if ((pr->cpu_flags & (1<<0)) == 0)	281	if ((pr->cpu_flags & (1<<0)) == 0)
282	return 0;	282	return 0;
283		283
284	apic_id_mask \|= (1<<pr->l_apic_id);	284	apic_id_mask \|= (1<<pr->l_apic_id);
285	return 1;	285	return 1;
286	}	286	}
287		287
288	void ct_bus_entry(struct __bus_entry *bus)	288	void ct_bus_entry(struct __bus_entry *bus)
289	{	289	{
290	#ifdef MPCT_VERBOSE	290	#ifdef MPSCT_VERBOSE
291	char buf[7];	291	char buf[7];
292	memcopy((__address) bus->bus_type, (__address) buf,6);	292	memcopy((__address) bus->bus_type, (__address) buf,6);
293	buf[6] = 0;	293	buf[6] = 0;
294	printf("bus%d: %s\n", bus->bus_id, buf);	294	printf("bus%d: %s\n", bus->bus_id, buf);
295	#endif	295	#endif
296	}	296	}
297		297
298	void ct_io_apic_entry(struct __io_apic_entry *ioa)	298	void ct_io_apic_entry(struct __io_apic_entry *ioa)
299	{	299	{
300	static int io_apic_count = 0;	300	static int io_apic_count = 0;
301		301
302	/* this ioapic is marked unusable */	302	/* this ioapic is marked unusable */
303	if (ioa->io_apic_flags & 1 == 0)	303	if (ioa->io_apic_flags & 1 == 0)
304	return;	304	return;
305		305
306	if (io_apic_count++ > 0) {	306	if (io_apic_count++ > 0) {
307	/*	307	/*
308	* Multiple IO APIC's are currently not supported.	308	* Multiple IO APIC's are currently not supported.
309	*/	309	*/
310	return;	310	return;
311	}	311	}
312		312
313	map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);	313	map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);
314		314
315	io_apic = ioa->io_apic;	315	io_apic = ioa->io_apic;
316	}	316	}
317		317
318	//#define MPCT_VERBOSE	318	//#define MPSCT_VERBOSE
319	void ct_io_intr_entry(struct __io_intr_entry *iointr)	319	void ct_io_intr_entry(struct __io_intr_entry *iointr)
320	{	320	{
321	#ifdef MPCT_VERBOSE	321	#ifdef MPSCT_VERBOSE
322	switch (iointr->intr_type) {	322	switch (iointr->intr_type) {
323	case 0: printf("INT"); break;	323	case 0: printf("INT"); break;
324	case 1: printf("NMI"); break;	324	case 1: printf("NMI"); break;
325	case 2: printf("SMI"); break;	325	case 2: printf("SMI"); break;
326	case 3: printf("ExtINT"); break;	326	case 3: printf("ExtINT"); break;
327	}	327	}
328	putchar(',');	328	putchar(',');
329	switch (iointr->poel&3) {	329	switch (iointr->poel&3) {
330	case 0: printf("bus-like"); break;	330	case 0: printf("bus-like"); break;
331	case 1: printf("active high"); break;	331	case 1: printf("active high"); break;
332	case 2: printf("reserved"); break;	332	case 2: printf("reserved"); break;
333	case 3: printf("active low"); break;	333	case 3: printf("active low"); break;
334	}	334	}
335	putchar(',');	335	putchar(',');
336	switch ((iointr->poel>>2)&3) {	336	switch ((iointr->poel>>2)&3) {
337	case 0: printf("bus-like"); break;	337	case 0: printf("bus-like"); break;
338	case 1: printf("edge-triggered"); break;	338	case 1: printf("edge-triggered"); break;
339	case 2: printf("reserved"); break;	339	case 2: printf("reserved"); break;
340	case 3: printf("level-triggered"); break;	340	case 3: printf("level-triggered"); break;
341	}	341	}
342	putchar(',');	342	putchar(',');
343	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	343	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
344	putchar(',');	344	putchar(',');
345	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	345	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
346	putchar('\n');	346	putchar('\n');
347	#endif	347	#endif
348	}	348	}
349		349
350	void ct_l_intr_entry(struct __l_intr_entry *lintr)	350	void ct_l_intr_entry(struct __l_intr_entry *lintr)
351	{	351	{
352	#ifdef MPCT_VERBOSE	352	#ifdef MPSCT_VERBOSE
353	switch (lintr->intr_type) {	353	switch (lintr->intr_type) {
354	case 0: printf("INT"); break;	354	case 0: printf("INT"); break;
355	case 1: printf("NMI"); break;	355	case 1: printf("NMI"); break;
356	case 2: printf("SMI"); break;	356	case 2: printf("SMI"); break;
357	case 3: printf("ExtINT"); break;	357	case 3: printf("ExtINT"); break;
358	}	358	}
359	putchar(',');	359	putchar(',');
360	switch (lintr->poel&3) {	360	switch (lintr->poel&3) {
361	case 0: printf("bus-like"); break;	361	case 0: printf("bus-like"); break;
362	case 1: printf("active high"); break;	362	case 1: printf("active high"); break;
363	case 2: printf("reserved"); break;	363	case 2: printf("reserved"); break;
364	case 3: printf("active low"); break;	364	case 3: printf("active low"); break;
365	}	365	}
366	putchar(',');	366	putchar(',');
367	switch ((lintr->poel>>2)&3) {	367	switch ((lintr->poel>>2)&3) {
368	case 0: printf("bus-like"); break;	368	case 0: printf("bus-like"); break;
369	case 1: printf("edge-triggered"); break;	369	case 1: printf("edge-triggered"); break;
370	case 2: printf("reserved"); break;	370	case 2: printf("reserved"); break;
371	case 3: printf("level-triggered"); break;	371	case 3: printf("level-triggered"); break;
372	}	372	}
373	putchar(',');	373	putchar(',');
374	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	374	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
375	putchar(',');	375	putchar(',');
376	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	376	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
377	putchar('\n');	377	putchar('\n');
378	#endif	378	#endif
379	}	379	}
380		380
381	void ct_extended_entries(void)	381	void ct_extended_entries(void)
382	{	382	{
383	__u8 ext = (__u8 ) ct + ct->base_table_length;	383	__u8 ext = (__u8 ) ct + ct->base_table_length;
384	__u8 *cur;	384	__u8 *cur;
385		385
386	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {	386	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
387	switch (cur[CT_EXT_ENTRY_TYPE]) {	387	switch (cur[CT_EXT_ENTRY_TYPE]) {
388	default:	388	default:
389	printf("%L: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	389	printf("%L: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
390	break;	390	break;
391	}	391	}
392	}	392	}
393	}	393	}
394		394
395	/*	395	/*
396	* Kernel thread for bringing up application processors. It becomes clear	396	* Kernel thread for bringing up application processors. It becomes clear
397	* that we need an arrangement like this (AP's being initialized by a kernel	397	* that we need an arrangement like this (AP's being initialized by a kernel
398	* thread), for a thread has its dedicated stack. (The stack used during the	398	* thread), for a thread has its dedicated stack. (The stack used during the
399	* BSP initialization (prior the very first call to scheduler()) will be used	399	* BSP initialization (prior the very first call to scheduler()) will be used
400	* as an initialization stack for each AP.)	400	* as an initialization stack for each AP.)
401	*/	401	*/
402	void kmp(void *arg)	402	void kmp(void *arg)
403	{	403	{
404	struct __processor_entry *pr;	404	struct __processor_entry *pr;
405	__address src, dst;	405	__address src, dst;
406	__address frame;	406	__address frame;
407	int i;	407	int i;
408		408
409	waitq_initialize(&ap_completion_wq);	409	waitq_initialize(&ap_completion_wq);
410		410
411	/*	411	/*
412	* Processor entries immediately follow the configuration table header.	412	* Processor entries immediately follow the configuration table header.
413	*/	413	*/
414	pr = processor_entries;	414	pr = processor_entries;
415		415
416	/*	416	/*
417	* Grab a frame and map its address to page 0. This is a hack which	417	* Grab a frame and map its address to page 0. This is a hack which
418	* accesses data in frame 0. Note that page 0 is not present because	418	* accesses data in frame 0. Note that page 0 is not present because
419	* of nil reference bug catching.	419	* of nil reference bug catching.
420	*/	420	*/
421	frame = frame_alloc(FRAME_KA);	421	frame = frame_alloc(FRAME_KA);
422	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);	422	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
423		423
424	/*	424	/*
425	* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()	425	* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
426	*/	426	*/
427	((__u16 ) (frame + 0x467+0)) = ((__address) ap_boot) >> 4; /* segment */	427	((__u16 ) (frame + 0x467+0)) = ((__address) ap_boot) >> 4; /* segment */
428	((__u16 ) (frame + 0x467+2)) = 0x0; /* offset */	428	((__u16 ) (frame + 0x467+2)) = 0x0; /* offset */
429		429
430	/*	430	/*
431	* Give back the borrowed frame and restore identity mapping for it.	431	* Give back the borrowed frame and restore identity mapping for it.
432	*/	432	*/
433	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);	433	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
434	frame_free(frame);	434	frame_free(frame);
435		435
436	/*	436	/*
437	* Save 0xa to address 0xf of the CMOS RAM.	437	* Save 0xa to address 0xf of the CMOS RAM.
438	* BIOS will not do the POST after the INIT signal.	438	* BIOS will not do the POST after the INIT signal.
439	*/	439	*/
440	outb(0x70,0xf);	440	outb(0x70,0xf);
441	outb(0x71,0xa);	441	outb(0x71,0xa);
442		442
443	cpu_priority_high();	443	cpu_priority_high();
444		444
445	pic_disable_irqs(0xffff);	445	pic_disable_irqs(0xffff);
446	apic_init();	446	apic_init();
447		447
448	for (i = 0; i < processor_entry_cnt; i++) {	448	for (i = 0; i < processor_entry_cnt; i++) {
449	struct descriptor *gdt_new;	449	struct descriptor *gdt_new;
450		450
451	/*	451	/*
452	* Skip processors marked unusable.	452	* Skip processors marked unusable.
453	*/	453	*/
454	if (pr[i].cpu_flags & (1<<0) == 0)	454	if (pr[i].cpu_flags & (1<<0) == 0)
455	continue;	455	continue;
456		456
457	/*	457	/*
458	* The bootstrap processor is already up.	458	* The bootstrap processor is already up.
459	*/	459	*/
460	if (pr[i].cpu_flags & (1<<1))	460	if (pr[i].cpu_flags & (1<<1))
461	continue;	461	continue;
462		462
463	if (pr[i].l_apic_id == l_apic_id()) {	463	if (pr[i].l_apic_id == l_apic_id()) {
464	printf("%L: bad processor entry #%d, will not send IPI to myself\n", &pr[i], i);	464	printf("%L: bad processor entry #%d, will not send IPI to myself\n", &pr[i], i);
465	continue;	465	continue;
466	}	466	}
467		467
468	/*	468	/*
469	* Prepare new GDT for CPU in question.	469	* Prepare new GDT for CPU in question.
470	*/	470	*/
471	if (!(gdt_new = (struct descriptor ) malloc(GDT_ITEMSsizeof(struct descriptor))))	471	if (!(gdt_new = (struct descriptor ) malloc(GDT_ITEMSsizeof(struct descriptor))))
472	panic(PANIC "couldn't allocate memory for GDT\n");	472	panic(PANIC "couldn't allocate memory for GDT\n");
473		473
474	memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));	474	memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
475	gdtr.base = (__address) gdt_new;	475	gdtr.base = (__address) gdt_new;
476		476
477	if (l_apic_send_init_ipi(pr[i].l_apic_id)) {	477	if (l_apic_send_init_ipi(pr[i].l_apic_id)) {
478	/*	478	/*
479	* There may be just one AP being initialized at	479	* There may be just one AP being initialized at
480	* the time. After it comes completely up, it is	480	* the time. After it comes completely up, it is
481	* supposed to wake us up.	481	* supposed to wake us up.
482	*/	482	*/
483	waitq_sleep(&ap_completion_wq);	483	waitq_sleep(&ap_completion_wq);
484	cpu_priority_high();	484	cpu_priority_high();
485	}	485	}
486	else {	486	else {
487	printf("INIT IPI for l_apic%d failed\n", pr[i].l_apic_id);	487	printf("INIT IPI for l_apic%d failed\n", pr[i].l_apic_id);
488	}	488	}
489	}	489	}
490		490
491	/*	491	/*
492	* Wakeup the kinit thread so that	492	* Wakeup the kinit thread so that
493	* system initialization can go on.	493	* system initialization can go on.
494	*/	494	*/
495	waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);	495	waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
496	}	496	}
497		497
498	int mp_irq_to_pin(int irq)	498	int mps_irq_to_pin(int irq)
499	{	499	{
500	int i;	500	int i;

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(root)/kernel/trunk/arch/ia32/src/smp/mps.c @ 1780 – Rev 33 → 34