WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/smp/mps.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifdef __SMP__
 
#include <arch/pm.h>
#include <config.h>
#include <print.h>
#include <panic.h>
#include <arch/smp/mp.h>
#include <arch/smp/ap.h>
#include <arch/smp/apic.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <synch/waitq.h>
#include <time/delay.h>
#include <mm/heap.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <cpu.h>
#include <arch/i8259.h>
#include <arch/asm.h>
 
/*
 * Multi-Processor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mp_fs_check(__u8 *base);
int mp_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(__u8 n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct __mpfs *fs;
static struct __mpct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
waitq_t kmp_completion_wq;
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mp_fs_check(__u8 *base)
{
    int i;
    __u8 sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mp_ct_check(void)
{
    __u8 *base = (__u8 *) ct;
    __u8 *ext = base + ct->base_table_length;
    __u8 sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mp_init(void)
{
    __address addr, frame;
    int cnt, n;
   
 
    /*
     * First place to search the MP Floating Pointer Structure is the Extended
     * BIOS Data Area. We have to read EBDA segment address from the BIOS Data
     * Area. Unfortunatelly, this memory is in page 0, which has intentionally no
     * mapping.
     */
    frame = frame_alloc(FRAME_KA);
    map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
    addr = *((__u16 *) (frame + 0x40e)) * 16;
    map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
    frame_free(frame); 
 
    /*
     * EBDA can be undefined. In that case addr would be 0.
     */
    if (addr >= 0x1000) {
        cnt = 1024;
        while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
            if (mp_fs_check((__u8 *) addr))
                goto fs_found;
            addr++;
            cnt--;
        }
    }
   
    /*
     * Second place where the MP Floating Pointer Structure may live is the last
     * kilobyte of base memory.
     */
    addr = 639*1024;
    cnt = 1024;
    while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
        if (mp_fs_check((__u8 *) addr))
            goto fs_found;
        addr++;
        cnt--;
    }
 
    /*
     * As the last resort, MP Floating Pointer Structure is searched in the BIOS
     * ROM.
     */
    addr = 0xf0000;
    cnt = 64*1024;
    while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
        if (mp_fs_check((__u8 *) addr))
            goto fs_found;
        addr++;
        cnt--;
    }
 
    return;
   
fs_found:
    printf("%L: MP Floating Pointer Structure\n", addr);
 
    fs = (struct __mpfs *) addr;
    frame_not_free((__address) fs);
   
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("mp_init: PIC mode not supported\n");
            return;
        }
 
        ct = fs->configuration_table;
        frame_not_free((__address) ct);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    if (config.cpu_count > 1) {
        map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
    }      
   
   
    /*
     * Must be initialized outside the kmp thread, since it is waited
     * on before the kmp thread is created.
     */
    waitq_initialize(&kmp_completion_wq);
    return;
}
 
int configure_via_ct(void)
{
    __u8 *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("configure_via_ct: bad ct->signature\n");
        return 1;
    }
    if (!mp_ct_check()) {
        printf("configure_via_ct: bad ct checksum\n");
        return 1;
    }
    if (ct->oem_table) {
        printf("configure_via_ct: ct->oem_table not supported\n");
        return 1;
    }
   
    l_apic = ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                    cur += 8;
                break;
       
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("configure_via_ct: ct badness\n");
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(__u8 n)
{
    /*
     * Not yet implemented.
     */
    printf("configure_via_default: not supported\n");
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPCT_VERBOSE
    char buf[7];
    memcopy((__address) bus->bus_type, (__address) buf,6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if (ioa->io_apic_flags & 1 == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);
   
    io_apic = ioa->io_apic;
}
 
//#define MPCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    /*
     * Not yet implemented.
     */
    if (ct->ext_table_length)
        panic("ct_extended_entries: not supported\n");
}
 
/*
 * Kernel thread for bringing up application processors. It becomes clear
 * that we need an arrangement like this (AP's being initialized by a kernel
 * thread), for a thread has its dedicated stack. (The stack used during the
 * BSP initialization (prior the very first call to scheduler()) will be used
 * as an initialization stack for each AP.)
 */
void kmp(void *arg)
{
    struct __processor_entry *pr;
    __address src, dst;
    __address frame;
    int i;
 
    waitq_initialize(&ap_completion_wq);
 
    /*
     * Processor entries immediately follow the configuration table header.
     */
    pr = processor_entries;
 
    /*
     * Grab a frame and map its address to page 0. This is a hack which
     * accesses data in frame 0. Note that page 0 is not present because
     * of nil reference bug catching.
     */
    frame = frame_alloc(FRAME_KA);
    map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
 
    /*
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
     */
    *((__u16 *) (frame + 0x467+0)) =  ((__address) ap_boot) >> 4;   /* segment */
    *((__u16 *) (frame + 0x467+2)) =  0x0;  /* offset */
   
    /*
     * Give back the borrowed frame and restore identity mapping for it.
     */
    map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
    frame_free(frame);
 
    /*
     * Save 0xa to address 0xf of the CMOS RAM.
     * BIOS will not do the POST after the INIT signal.
     */
    outb(0x70,0xf);
    outb(0x71,0xa);
 
    cpu_priority_high();
 
    pic_disable_irqs(0xffff);
    apic_init();
 
    for (i = 0; i < processor_entry_cnt; i++) {
        struct descriptor *gdt_new;
   
        /*
         * Skip processors marked unusable.
         */
        if (pr[i].cpu_flags & (1<<0) == 0)
            continue;
   
        /*
         * The bootstrap processor is already up.
         */
        if (pr[i].cpu_flags & (1<<1))
            continue;
       
        /*
         * Prepare new GDT for CPU in question.
         */
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor))))
            panic(PANIC "couldn't allocate memory for GDT\n");
 
        memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
        gdtr.base = (__address) gdt_new;
       
        if (l_apic_send_init_ipi(pr[i].l_apic_id)) {
            /*
                 * There may be just one AP being initialized at
             * the time. After it comes completely up, it is
             * supposed to wake us up.
                 */
            waitq_sleep(&ap_completion_wq);
            cpu_priority_high();
        }
        else {
            printf("INIT IPI for l_apic%d failed\n", pr[i].l_apic_id);
        }
    }
 
    /*
     * Wakeup the kinit thread so that
     * system initialization can go on.
     */
    waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
}
 
int mp_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* __SMP__ */
 

Rev 11	Rev 12
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifdef __SMP__	29	#ifdef __SMP__
30		30
31	#include <arch/pm.h>	31	#include <arch/pm.h>
32	#include <config.h>	32	#include <config.h>
33	#include <print.h>	33	#include <print.h>
34	#include <panic.h>	34	#include <panic.h>
35	#include <arch/smp/mp.h>	35	#include <arch/smp/mp.h>
36	#include <arch/smp/ap.h>	36	#include <arch/smp/ap.h>
37	#include <arch/smp/apic.h>	37	#include <arch/smp/apic.h>
38	#include <func.h>	38	#include <func.h>
39	#include <arch/types.h>	39	#include <arch/types.h>
40	#include <typedefs.h>	40	#include <typedefs.h>
41	#include <synch/waitq.h>	41	#include <synch/waitq.h>
42	#include <time/delay.h>	42	#include <time/delay.h>
43	#include <mm/heap.h>	43	#include <mm/heap.h>
44	#include <mm/page.h>	44	#include <mm/page.h>
45	#include <mm/frame.h>	45	#include <mm/frame.h>
46	#include <cpu.h>	46	#include <cpu.h>
47	#include <arch/i8259.h>	47	#include <arch/i8259.h>
48	#include <arch/asm.h>	48	#include <arch/asm.h>
49		49
50	/*	50	/*
51	* Multi-Processor Specification detection code.	51	* Multi-Processor Specification detection code.
52	*/	52	*/
53		53
54	#define FS_SIGNATURE 0x5f504d5f	54	#define FS_SIGNATURE 0x5f504d5f
55	#define CT_SIGNATURE 0x504d4350	55	#define CT_SIGNATURE 0x504d4350
56		56
57	int mp_fs_check(__u8 *base);	57	int mp_fs_check(__u8 *base);
58	int mp_ct_check(void);	58	int mp_ct_check(void);
59		59
60	int configure_via_ct(void);	60	int configure_via_ct(void);
61	int configure_via_default(__u8 n);	61	int configure_via_default(__u8 n);
62		62
63	int ct_processor_entry(struct __processor_entry *pr);	63	int ct_processor_entry(struct __processor_entry *pr);
64	void ct_bus_entry(struct __bus_entry *bus);	64	void ct_bus_entry(struct __bus_entry *bus);
65	void ct_io_apic_entry(struct __io_apic_entry *ioa);	65	void ct_io_apic_entry(struct __io_apic_entry *ioa);
66	void ct_io_intr_entry(struct __io_intr_entry *iointr);	66	void ct_io_intr_entry(struct __io_intr_entry *iointr);
67	void ct_l_intr_entry(struct __l_intr_entry *lintr);	67	void ct_l_intr_entry(struct __l_intr_entry *lintr);
68		68
69	void ct_extended_entries(void);	69	void ct_extended_entries(void);
70		70
71	static struct __mpfs *fs;	71	static struct __mpfs *fs;
72	static struct __mpct *ct;	72	static struct __mpct *ct;
73		73
74	struct __processor_entry *processor_entries = NULL;	74	struct __processor_entry *processor_entries = NULL;
75	struct __bus_entry *bus_entries = NULL;	75	struct __bus_entry *bus_entries = NULL;
76	struct __io_apic_entry *io_apic_entries = NULL;	76	struct __io_apic_entry *io_apic_entries = NULL;
77	struct __io_intr_entry *io_intr_entries = NULL;	77	struct __io_intr_entry *io_intr_entries = NULL;
78	struct __l_intr_entry *l_intr_entries = NULL;	78	struct __l_intr_entry *l_intr_entries = NULL;
79		79
80	int processor_entry_cnt = 0;	80	int processor_entry_cnt = 0;
81	int bus_entry_cnt = 0;	81	int bus_entry_cnt = 0;
82	int io_apic_entry_cnt = 0;	82	int io_apic_entry_cnt = 0;
83	int io_intr_entry_cnt = 0;	83	int io_intr_entry_cnt = 0;
84	int l_intr_entry_cnt = 0;	84	int l_intr_entry_cnt = 0;
85		85
86	waitq_t ap_completion_wq;	86	waitq_t ap_completion_wq;
87	waitq_t kmp_completion_wq;	87	waitq_t kmp_completion_wq;
88		88
89	/*	89	/*
90	* Used to check the integrity of the MP Floating Structure.	90	* Used to check the integrity of the MP Floating Structure.
91	*/	91	*/
92	int mp_fs_check(__u8 *base)	92	int mp_fs_check(__u8 *base)
93	{	93	{
94	int i;	94	int i;
95	__u8 sum;	95	__u8 sum;
96		96
97	for (i = 0, sum = 0; i < 16; i++)	97	for (i = 0, sum = 0; i < 16; i++)
98	sum += base[i];	98	sum += base[i];
99		99
100	return !sum;	100	return !sum;
101	}	101	}
102		102
103	/*	103	/*
104	* Used to check the integrity of the MP Configuration Table.	104	* Used to check the integrity of the MP Configuration Table.
105	*/	105	*/
106	int mp_ct_check(void)	106	int mp_ct_check(void)
107	{	107	{
108	__u8 base = (__u8 ) ct;	108	__u8 base = (__u8 ) ct;
109	__u8 *ext = base + ct->base_table_length;	109	__u8 *ext = base + ct->base_table_length;
110	__u8 sum;	110	__u8 sum;
111	int i;	111	int i;
112		112
113	/* count the checksum for the base table */	113	/* count the checksum for the base table */
114	for (i=0,sum=0; i < ct->base_table_length; i++)	114	for (i=0,sum=0; i < ct->base_table_length; i++)
115	sum += base[i];	115	sum += base[i];
116		116
117	if (sum)	117	if (sum)
118	return 0;	118	return 0;
119		119
120	/* count the checksum for the extended table */	120	/* count the checksum for the extended table */
121	for (i=0,sum=0; i < ct->ext_table_length; i++)	121	for (i=0,sum=0; i < ct->ext_table_length; i++)
122	sum += ext[i];	122	sum += ext[i];
123		123
124	return !sum;	124	return sum == ct->ext_table_checksum;
125	}	125	}
126		126
127	void mp_init(void)	127	void mp_init(void)
128	{	128	{
129	__address addr, frame;	129	__address addr, frame;
130	int cnt, n;	130	int cnt, n;
131		131
132		132
133	/*	133	/*
134	* First place to search the MP Floating Pointer Structure is the Extended	134	* First place to search the MP Floating Pointer Structure is the Extended
135	* BIOS Data Area. We have to read EBDA segment address from the BIOS Data	135	* BIOS Data Area. We have to read EBDA segment address from the BIOS Data
136	* Area. Unfortunatelly, this memory is in page 0, which has intentionally no	136	* Area. Unfortunatelly, this memory is in page 0, which has intentionally no
137	* mapping.	137	* mapping.
138	*/	138	*/
139	frame = frame_alloc(FRAME_KA);	139	frame = frame_alloc(FRAME_KA);
140	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);	140	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
141	addr = ((__u16 ) (frame + 0x40e)) * 16;	141	addr = ((__u16 ) (frame + 0x40e)) * 16;
142	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);	142	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
143	frame_free(frame);	143	frame_free(frame);
144		144
145	/*	145	/*
146	* EBDA can be undefined. In that case addr would be 0.	146	* EBDA can be undefined. In that case addr would be 0.
147	*/	147	*/
148	if (addr >= 0x1000) {	148	if (addr >= 0x1000) {
149	cnt = 1024;	149	cnt = 1024;
150	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {	150	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
151	if (mp_fs_check((__u8 *) addr))	151	if (mp_fs_check((__u8 *) addr))
152	goto fs_found;	152	goto fs_found;
153	addr++;	153	addr++;
154	cnt--;	154	cnt--;
155	}	155	}
156	}	156	}
157		157
158	/*	158	/*
159	* Second place where the MP Floating Pointer Structure may live is the last	159	* Second place where the MP Floating Pointer Structure may live is the last
160	* kilobyte of base memory.	160	* kilobyte of base memory.
161	*/	161	*/
162	addr = 639*1024;	162	addr = 639*1024;
163	cnt = 1024;	163	cnt = 1024;
164	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {	164	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
165	if (mp_fs_check((__u8 *) addr))	165	if (mp_fs_check((__u8 *) addr))
166	goto fs_found;	166	goto fs_found;
167	addr++;	167	addr++;
168	cnt--;	168	cnt--;
169	}	169	}
170		170
171	/*	171	/*
172	* As the last resort, MP Floating Pointer Structure is searched in the BIOS	172	* As the last resort, MP Floating Pointer Structure is searched in the BIOS
173	* ROM.	173	* ROM.
174	*/	174	*/
175	addr = 0xf0000;	175	addr = 0xf0000;
176	cnt = 64*1024;	176	cnt = 64*1024;
177	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {	177	while (addr = __u32_search(addr,cnt,FS_SIGNATURE)) {
178	if (mp_fs_check((__u8 *) addr))	178	if (mp_fs_check((__u8 *) addr))
179	goto fs_found;	179	goto fs_found;
180	addr++;	180	addr++;
181	cnt--;	181	cnt--;
182	}	182	}
183		183
184	return;	184	return;
185		185
186	fs_found:	186	fs_found:
187	printf("%L: MP Floating Pointer Structure\n", addr);	187	printf("%L: MP Floating Pointer Structure\n", addr);
188		188
189	fs = (struct __mpfs *) addr;	189	fs = (struct __mpfs *) addr;
190	frame_not_free((__address) fs);	190	frame_not_free((__address) fs);
191		191
192	if (fs->config_type == 0 && fs->configuration_table) {	192	if (fs->config_type == 0 && fs->configuration_table) {
193	if (fs->mpfib2 >> 7) {	193	if (fs->mpfib2 >> 7) {
194	printf("mp_init: PIC mode not supported\n");	194	printf("mp_init: PIC mode not supported\n");
195	return;	195	return;
196	}	196	}
197		197
198	ct = fs->configuration_table;	198	ct = fs->configuration_table;
199	frame_not_free((__address) ct);	199	frame_not_free((__address) ct);
200	config.cpu_count = configure_via_ct();	200	config.cpu_count = configure_via_ct();
201	}	201	}
202	else	202	else
203	config.cpu_count = configure_via_default(fs->config_type);	203	config.cpu_count = configure_via_default(fs->config_type);
204		204
205	if (config.cpu_count > 1) {	205	if (config.cpu_count > 1) {
206	map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);	206	map_page_to_frame((__address) l_apic, (__address) l_apic, PAGE_NOT_CACHEABLE, 0);
207	}	207	}
208		208
209		209
210	/*	210	/*
211	* Must be initialized outside the kmp thread, since it is waited	211	* Must be initialized outside the kmp thread, since it is waited
212	* on before the kmp thread is created.	212	* on before the kmp thread is created.
213	*/	213	*/
214	waitq_initialize(&kmp_completion_wq);	214	waitq_initialize(&kmp_completion_wq);
215	return;	215	return;
216	}	216	}
217		217
218	int configure_via_ct(void)	218	int configure_via_ct(void)
219	{	219	{
220	__u8 *cur;	220	__u8 *cur;
221	int i, cnt;	221	int i, cnt;
222		222
223	if (ct->signature != CT_SIGNATURE) {	223	if (ct->signature != CT_SIGNATURE) {
224	printf("configure_via_ct: bad ct->signature\n");	224	printf("configure_via_ct: bad ct->signature\n");
225	return 1;	225	return 1;
226	}	226	}
227	if (!mp_ct_check()) {	227	if (!mp_ct_check()) {
228	printf("configure_via_ct: bad ct checksum\n");	228	printf("configure_via_ct: bad ct checksum\n");
229	return 1;	229	return 1;
230	}	230	}
231	if (ct->oem_table) {	231	if (ct->oem_table) {
232	printf("configure_via_ct: ct->oem_table not supported\n");	232	printf("configure_via_ct: ct->oem_table not supported\n");
233	return 1;	233	return 1;
234	}	234	}
235		235
236	l_apic = ct->l_apic;	236	l_apic = ct->l_apic;
237		237
238	cnt = 0;	238	cnt = 0;
239	cur = &ct->base_table[0];	239	cur = &ct->base_table[0];
240	for (i=0; i < ct->entry_count; i++) {	240	for (i=0; i < ct->entry_count; i++) {
241	switch (*cur) {	241	switch (*cur) {
242	/* Processor entry */	242	/* Processor entry */
243	case 0:	243	case 0:
244	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	244	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
245	processor_entry_cnt++;	245	processor_entry_cnt++;
246	cnt += ct_processor_entry((struct __processor_entry *) cur);	246	cnt += ct_processor_entry((struct __processor_entry *) cur);
247	cur += 20;	247	cur += 20;
248	break;	248	break;
249		249
250	/* Bus entry */	250	/* Bus entry */
251	case 1:	251	case 1:
252	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	252	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
253	bus_entry_cnt++;	253	bus_entry_cnt++;
254	ct_bus_entry((struct __bus_entry *) cur);	254	ct_bus_entry((struct __bus_entry *) cur);
255	cur += 8;	255	cur += 8;
256	break;	256	break;
257		257
258	/* I/O Apic */	258	/* I/O Apic */
259	case 2:	259	case 2:
260	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	260	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
261	io_apic_entry_cnt++;	261	io_apic_entry_cnt++;
262	ct_io_apic_entry((struct __io_apic_entry *) cur);	262	ct_io_apic_entry((struct __io_apic_entry *) cur);
263	cur += 8;	263	cur += 8;
264	break;	264	break;
265		265
266	/* I/O Interrupt Assignment */	266	/* I/O Interrupt Assignment */
267	case 3:	267	case 3:
268	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	268	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
269	io_intr_entry_cnt++;	269	io_intr_entry_cnt++;
270	ct_io_intr_entry((struct __io_intr_entry *) cur);	270	ct_io_intr_entry((struct __io_intr_entry *) cur);
271	cur += 8;	271	cur += 8;
272	break;	272	break;
273		273
274	/* Local Interrupt Assignment */	274	/* Local Interrupt Assignment */
275	case 4:	275	case 4:
276	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	276	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
277	l_intr_entry_cnt++;	277	l_intr_entry_cnt++;
278	ct_l_intr_entry((struct __l_intr_entry *) cur);	278	ct_l_intr_entry((struct __l_intr_entry *) cur);
279	cur += 8;	279	cur += 8;
280	break;	280	break;
281		281
282	default:	282	default:
283	/*	283	/*
284	* Something is wrong. Fallback to UP mode.	284	* Something is wrong. Fallback to UP mode.
285	*/	285	*/
286		286
287	printf("configure_via_ct: ct badness\n");	287	printf("configure_via_ct: ct badness\n");
288	return 1;	288	return 1;
289	}	289	}
290	}	290	}
291		291
292	/*	292	/*
293	* Process extended entries.	293	* Process extended entries.
294	*/	294	*/
295	ct_extended_entries();	295	ct_extended_entries();
296	return cnt;	296	return cnt;
297	}	297	}
298		298
299	int configure_via_default(__u8 n)	299	int configure_via_default(__u8 n)
300	{	300	{
301	/*	301	/*
302	* Not yet implemented.	302	* Not yet implemented.
303	*/	303	*/
304	printf("configure_via_default: not supported\n");	304	printf("configure_via_default: not supported\n");
305	return 1;	305	return 1;
306	}	306	}
307		307
308		308
309	int ct_processor_entry(struct __processor_entry *pr)	309	int ct_processor_entry(struct __processor_entry *pr)
310	{	310	{
311	/*	311	/*
312	* Ignore processors which are not marked enabled.	312	* Ignore processors which are not marked enabled.
313	*/	313	*/
314	if ((pr->cpu_flags & (1<<0)) == 0)	314	if ((pr->cpu_flags & (1<<0)) == 0)
315	return 0;	315	return 0;
316		316
317	apic_id_mask \|= (1<<pr->l_apic_id);	317	apic_id_mask \|= (1<<pr->l_apic_id);
318	return 1;	318	return 1;
319	}	319	}
320		320
321	void ct_bus_entry(struct __bus_entry *bus)	321	void ct_bus_entry(struct __bus_entry *bus)
322	{	322	{
323	#ifdef MPCT_VERBOSE	323	#ifdef MPCT_VERBOSE
324	char buf[7];	324	char buf[7];
325	memcopy((__address) bus->bus_type, (__address) buf,6);	325	memcopy((__address) bus->bus_type, (__address) buf,6);
326	buf[6] = 0;	326	buf[6] = 0;
327	printf("bus%d: %s\n", bus->bus_id, buf);	327	printf("bus%d: %s\n", bus->bus_id, buf);
328	#endif	328	#endif
329	}	329	}
330		330
331	void ct_io_apic_entry(struct __io_apic_entry *ioa)	331	void ct_io_apic_entry(struct __io_apic_entry *ioa)
332	{	332	{
333	static int io_apic_count = 0;	333	static int io_apic_count = 0;
334		334
335	/* this ioapic is marked unusable */	335	/* this ioapic is marked unusable */
336	if (ioa->io_apic_flags & 1 == 0)	336	if (ioa->io_apic_flags & 1 == 0)
337	return;	337	return;
338		338
339	if (io_apic_count++ > 0) {	339	if (io_apic_count++ > 0) {
340	/*	340	/*
341	* Multiple IO APIC's are currently not supported.	341	* Multiple IO APIC's are currently not supported.
342	*/	342	*/
343	return;	343	return;
344	}	344	}
345		345
346	map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);	346	map_page_to_frame((__address) ioa->io_apic, (__address) ioa->io_apic, PAGE_NOT_CACHEABLE, 0);
347		347
348	io_apic = ioa->io_apic;	348	io_apic = ioa->io_apic;
349	}	349	}
350		350
351	//#define MPCT_VERBOSE	351	//#define MPCT_VERBOSE
352	void ct_io_intr_entry(struct __io_intr_entry *iointr)	352	void ct_io_intr_entry(struct __io_intr_entry *iointr)
353	{	353	{
354	#ifdef MPCT_VERBOSE	354	#ifdef MPCT_VERBOSE
355	switch (iointr->intr_type) {	355	switch (iointr->intr_type) {
356	case 0: printf("INT"); break;	356	case 0: printf("INT"); break;
357	case 1: printf("NMI"); break;	357	case 1: printf("NMI"); break;
358	case 2: printf("SMI"); break;	358	case 2: printf("SMI"); break;
359	case 3: printf("ExtINT"); break;	359	case 3: printf("ExtINT"); break;
360	}	360	}
361	putchar(',');	361	putchar(',');
362	switch (iointr->poel&3) {	362	switch (iointr->poel&3) {
363	case 0: printf("bus-like"); break;	363	case 0: printf("bus-like"); break;
364	case 1: printf("active high"); break;	364	case 1: printf("active high"); break;
365	case 2: printf("reserved"); break;	365	case 2: printf("reserved"); break;
366	case 3: printf("active low"); break;	366	case 3: printf("active low"); break;
367	}	367	}
368	putchar(',');	368	putchar(',');
369	switch ((iointr->poel>>2)&3) {	369	switch ((iointr->poel>>2)&3) {
370	case 0: printf("bus-like"); break;	370	case 0: printf("bus-like"); break;
371	case 1: printf("edge-triggered"); break;	371	case 1: printf("edge-triggered"); break;
372	case 2: printf("reserved"); break;	372	case 2: printf("reserved"); break;
373	case 3: printf("level-triggered"); break;	373	case 3: printf("level-triggered"); break;
374	}	374	}
375	putchar(',');	375	putchar(',');
376	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	376	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
377	putchar(',');	377	putchar(',');
378	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	378	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
379	putchar('\n');	379	putchar('\n');
380	#endif	380	#endif
381	}	381	}
382		382
383	void ct_l_intr_entry(struct __l_intr_entry *lintr)	383	void ct_l_intr_entry(struct __l_intr_entry *lintr)
384	{	384	{
385	#ifdef MPCT_VERBOSE	385	#ifdef MPCT_VERBOSE
386	switch (lintr->intr_type) {	386	switch (lintr->intr_type) {
387	case 0: printf("INT"); break;	387	case 0: printf("INT"); break;
388	case 1: printf("NMI"); break;	388	case 1: printf("NMI"); break;
389	case 2: printf("SMI"); break;	389	case 2: printf("SMI"); break;
390	case 3: printf("ExtINT"); break;	390	case 3: printf("ExtINT"); break;
391	}	391	}
392	putchar(',');	392	putchar(',');
393	switch (lintr->poel&3) {	393	switch (lintr->poel&3) {
394	case 0: printf("bus-like"); break;	394	case 0: printf("bus-like"); break;
395	case 1: printf("active high"); break;	395	case 1: printf("active high"); break;
396	case 2: printf("reserved"); break;	396	case 2: printf("reserved"); break;
397	case 3: printf("active low"); break;	397	case 3: printf("active low"); break;
398	}	398	}
399	putchar(',');	399	putchar(',');
400	switch ((lintr->poel>>2)&3) {	400	switch ((lintr->poel>>2)&3) {
401	case 0: printf("bus-like"); break;	401	case 0: printf("bus-like"); break;
402	case 1: printf("edge-triggered"); break;	402	case 1: printf("edge-triggered"); break;
403	case 2: printf("reserved"); break;	403	case 2: printf("reserved"); break;
404	case 3: printf("level-triggered"); break;	404	case 3: printf("level-triggered"); break;
405	}	405	}
406	putchar(',');	406	putchar(',');
407	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	407	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
408	putchar(',');	408	putchar(',');
409	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	409	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
410	putchar('\n');	410	putchar('\n');
411	#endif	411	#endif
412	}	412	}
413		413
414	void ct_extended_entries(void)	414	void ct_extended_entries(void)
415	{	415	{
416	/*	416	/*
417	* Not yet implemented.	417	* Not yet implemented.
418	*/	418	*/
419	if (ct->ext_table_length)	419	if (ct->ext_table_length)
420	panic("ct_extended_entries: not supported\n");	420	panic("ct_extended_entries: not supported\n");
421	}	421	}
422		422
423	/*	423	/*
424	* Kernel thread for bringing up application processors. It becomes clear	424	* Kernel thread for bringing up application processors. It becomes clear
425	* that we need an arrangement like this (AP's being initialized by a kernel	425	* that we need an arrangement like this (AP's being initialized by a kernel
426	* thread), for a thread has its dedicated stack. (The stack used during the	426	* thread), for a thread has its dedicated stack. (The stack used during the
427	* BSP initialization (prior the very first call to scheduler()) will be used	427	* BSP initialization (prior the very first call to scheduler()) will be used
428	* as an initialization stack for each AP.)	428	* as an initialization stack for each AP.)
429	*/	429	*/
430	void kmp(void *arg)	430	void kmp(void *arg)
431	{	431	{
432	struct __processor_entry *pr;	432	struct __processor_entry *pr;
433	__address src, dst;	433	__address src, dst;
434	__address frame;	434	__address frame;
435	int i;	435	int i;
436		436
437	waitq_initialize(&ap_completion_wq);	437	waitq_initialize(&ap_completion_wq);
438		438
439	/*	439	/*
440	* Processor entries immediately follow the configuration table header.	440	* Processor entries immediately follow the configuration table header.
441	*/	441	*/
442	pr = processor_entries;	442	pr = processor_entries;
443		443
444	/*	444	/*
445	* Grab a frame and map its address to page 0. This is a hack which	445	* Grab a frame and map its address to page 0. This is a hack which
446	* accesses data in frame 0. Note that page 0 is not present because	446	* accesses data in frame 0. Note that page 0 is not present because
447	* of nil reference bug catching.	447	* of nil reference bug catching.
448	*/	448	*/
449	frame = frame_alloc(FRAME_KA);	449	frame = frame_alloc(FRAME_KA);
450	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);	450	map_page_to_frame(frame,0,PAGE_CACHEABLE,0);
451		451
452	/*	452	/*
453	* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()	453	* Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
454	*/	454	*/
455	((__u16 ) (frame + 0x467+0)) = ((__address) ap_boot) >> 4; /* segment */	455	((__u16 ) (frame + 0x467+0)) = ((__address) ap_boot) >> 4; /* segment */
456	((__u16 ) (frame + 0x467+2)) = 0x0; /* offset */	456	((__u16 ) (frame + 0x467+2)) = 0x0; /* offset */
457		457
458	/*	458	/*
459	* Give back the borrowed frame and restore identity mapping for it.	459	* Give back the borrowed frame and restore identity mapping for it.
460	*/	460	*/
461	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);	461	map_page_to_frame(frame,frame,PAGE_CACHEABLE,0);
462	frame_free(frame);	462	frame_free(frame);
463		463
464	/*	464	/*
465	* Save 0xa to address 0xf of the CMOS RAM.	465	* Save 0xa to address 0xf of the CMOS RAM.
466	* BIOS will not do the POST after the INIT signal.	466	* BIOS will not do the POST after the INIT signal.
467	*/	467	*/
468	outb(0x70,0xf);	468	outb(0x70,0xf);
469	outb(0x71,0xa);	469	outb(0x71,0xa);
470		470
471	cpu_priority_high();	471	cpu_priority_high();
472		472
473	pic_disable_irqs(0xffff);	473	pic_disable_irqs(0xffff);
474	apic_init();	474	apic_init();
475		475
476	for (i = 0; i < processor_entry_cnt; i++) {	476	for (i = 0; i < processor_entry_cnt; i++) {
477	struct descriptor *gdt_new;	477	struct descriptor *gdt_new;
478		478
479	/*	479	/*
480	* Skip processors marked unusable.	480	* Skip processors marked unusable.
481	*/	481	*/
482	if (pr[i].cpu_flags & (1<<0) == 0)	482	if (pr[i].cpu_flags & (1<<0) == 0)
483	continue;	483	continue;
484		484
485	/*	485	/*
486	* The bootstrap processor is already up.	486	* The bootstrap processor is already up.
487	*/	487	*/
488	if (pr[i].cpu_flags & (1<<1))	488	if (pr[i].cpu_flags & (1<<1))
489	continue;	489	continue;
490		490
491	/*	491	/*
492	* Prepare new GDT for CPU in question.	492	* Prepare new GDT for CPU in question.
493	*/	493	*/
494	if (!(gdt_new = (struct descriptor ) malloc(GDT_ITEMSsizeof(struct descriptor))))	494	if (!(gdt_new = (struct descriptor ) malloc(GDT_ITEMSsizeof(struct descriptor))))
495	panic(PANIC "couldn't allocate memory for GDT\n");	495	panic(PANIC "couldn't allocate memory for GDT\n");
496		496
497	memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));	497	memcopy(gdt, gdt_new, GDT_ITEMS*sizeof(struct descriptor));
498	gdtr.base = (__address) gdt_new;	498	gdtr.base = (__address) gdt_new;
499		499
500	if (l_apic_send_init_ipi(pr[i].l_apic_id)) {	500	if (l_apic_send_init_ipi(pr[i].l_apic_id)) {

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/src/smp/mps.c @ 1780 – Rev 11 → 12