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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32interrupt |
29 | /** @addtogroup ia32interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <syscall/syscall.h> |
36 | #include <syscall/syscall.h> |
37 | #include <print.h> |
37 | #include <print.h> |
38 | #include <debug.h> |
38 | #include <debug.h> |
39 | #include <panic.h> |
39 | #include <panic.h> |
40 | #include <arch/drivers/i8259.h> |
40 | #include <arch/drivers/i8259.h> |
41 | #include <func.h> |
41 | #include <func.h> |
42 | #include <cpu.h> |
42 | #include <cpu.h> |
43 | #include <arch/asm.h> |
43 | #include <arch/asm.h> |
44 | #include <mm/tlb.h> |
44 | #include <mm/tlb.h> |
45 | #include <mm/as.h> |
45 | #include <mm/as.h> |
46 | #include <arch.h> |
46 | #include <arch.h> |
47 | #include <symtab.h> |
47 | #include <symtab.h> |
48 | #include <proc/thread.h> |
48 | #include <proc/thread.h> |
49 | #include <proc/task.h> |
49 | #include <proc/task.h> |
50 | #include <synch/spinlock.h> |
50 | #include <synch/spinlock.h> |
51 | #include <arch/ddi/ddi.h> |
51 | #include <arch/ddi/ddi.h> |
52 | #include <ipc/sysipc.h> |
52 | #include <ipc/sysipc.h> |
53 | #include <interrupt.h> |
53 | #include <interrupt.h> |
54 | 54 | ||
55 | /* |
55 | /* |
56 | * Interrupt and exception dispatching. |
56 | * Interrupt and exception dispatching. |
57 | */ |
57 | */ |
58 | 58 | ||
59 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
59 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
60 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
60 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
61 | void (* eoi_function)(void) = NULL; |
61 | void (* eoi_function)(void) = NULL; |
62 | 62 | ||
63 | void PRINT_INFO_ERRCODE(istate_t *istate) |
63 | void PRINT_INFO_ERRCODE(istate_t *istate) |
64 | { |
64 | { |
65 | char *symbol = get_symtab_entry(istate->eip); |
65 | char *symbol = get_symtab_entry(istate->eip); |
66 | 66 | ||
67 | if (!symbol) |
67 | if (!symbol) |
68 | symbol = ""; |
68 | symbol = ""; |
69 | 69 | ||
70 | if (CPU) |
70 | if (CPU) |
71 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
71 | printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id); |
72 | else |
72 | else |
73 | printf("----------------EXCEPTION OCCURED----------------\n"); |
73 | printf("----------------EXCEPTION OCCURED----------------\n"); |
74 | 74 | ||
75 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
75 | printf("%%eip: %#x (%s)\n",istate->eip,symbol); |
76 | printf("ERROR_WORD=%#x\n", istate->error_word); |
76 | printf("ERROR_WORD=%#x\n", istate->error_word); |
77 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
77 | printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags); |
78 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
78 | printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n", istate->eax,istate->ecx,istate->edx,&istate->stack[0]); |
79 | #ifdef CONFIG_DEBUG_ALLREGS |
79 | #ifdef CONFIG_DEBUG_ALLREGS |
80 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
80 | printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n", istate->esi,istate->edi,istate->ebp,istate->ebx); |
81 | #endif |
81 | #endif |
82 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
82 | printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]); |
83 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
83 | printf(" %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]); |
84 | } |
84 | } |
85 | 85 | ||
86 | void null_interrupt(int n, istate_t *istate) |
86 | void null_interrupt(int n, istate_t *istate) |
87 | { |
87 | { |
88 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
88 | fault_if_from_uspace(istate, "unserviced interrupt: %d", n); |
89 | 89 | ||
90 | PRINT_INFO_ERRCODE(istate); |
90 | PRINT_INFO_ERRCODE(istate); |
91 | panic("unserviced interrupt: %d\n", n); |
91 | panic("unserviced interrupt: %d\n", n); |
92 | } |
92 | } |
93 | 93 | ||
94 | /** General Protection Fault. */ |
94 | /** General Protection Fault. */ |
95 | void gp_fault(int n, istate_t *istate) |
95 | void gp_fault(int n, istate_t *istate) |
96 | { |
96 | { |
97 | if (TASK) { |
97 | if (TASK) { |
98 | count_t ver; |
98 | count_t ver; |
99 | 99 | ||
100 | spinlock_lock(&TASK->lock); |
100 | spinlock_lock(&TASK->lock); |
101 | ver = TASK->arch.iomapver; |
101 | ver = TASK->arch.iomapver; |
102 | spinlock_unlock(&TASK->lock); |
102 | spinlock_unlock(&TASK->lock); |
103 | 103 | ||
104 | if (CPU->arch.iomapver_copy != ver) { |
104 | if (CPU->arch.iomapver_copy != ver) { |
105 | /* |
105 | /* |
106 | * This fault can be caused by an early access |
106 | * This fault can be caused by an early access |
107 | * to I/O port because of an out-dated |
107 | * to I/O port because of an out-dated |
108 | * I/O Permission bitmap installed on CPU. |
108 | * I/O Permission bitmap installed on CPU. |
109 | * Install the fresh copy and restart |
109 | * Install the fresh copy and restart |
110 | * the instruction. |
110 | * the instruction. |
111 | */ |
111 | */ |
112 | io_perm_bitmap_install(); |
112 | io_perm_bitmap_install(); |
113 | return; |
113 | return; |
114 | } |
114 | } |
115 | fault_if_from_uspace(istate, "general protection fault"); |
115 | fault_if_from_uspace(istate, "general protection fault"); |
116 | } |
116 | } |
117 | 117 | ||
118 | PRINT_INFO_ERRCODE(istate); |
118 | PRINT_INFO_ERRCODE(istate); |
119 | panic("general protection fault\n"); |
119 | panic("general protection fault\n"); |
120 | } |
120 | } |
121 | 121 | ||
122 | void ss_fault(int n, istate_t *istate) |
122 | void ss_fault(int n, istate_t *istate) |
123 | { |
123 | { |
124 | fault_if_from_uspace(istate, "stack fault"); |
124 | fault_if_from_uspace(istate, "stack fault"); |
125 | 125 | ||
126 | PRINT_INFO_ERRCODE(istate); |
126 | PRINT_INFO_ERRCODE(istate); |
127 | panic("stack fault\n"); |
127 | panic("stack fault\n"); |
128 | } |
128 | } |
129 | 129 | ||
130 | void simd_fp_exception(int n, istate_t *istate) |
130 | void simd_fp_exception(int n, istate_t *istate) |
131 | { |
131 | { |
132 | __u32 mxcsr; |
132 | __u32 mxcsr; |
133 | asm |
133 | asm |
134 | ( |
134 | ( |
135 | "stmxcsr %0;\n" |
135 | "stmxcsr %0;\n" |
136 | :"=m"(mxcsr) |
136 | :"=m"(mxcsr) |
137 | ); |
137 | ); |
138 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zX", |
138 | fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zX", |
139 | (__native)mxcsr); |
139 | (__native)mxcsr); |
140 | 140 | ||
141 | PRINT_INFO_ERRCODE(istate); |
141 | PRINT_INFO_ERRCODE(istate); |
142 | printf("MXCSR: %#zX\n",(__native)(mxcsr)); |
142 | printf("MXCSR: %#zX\n",(__native)(mxcsr)); |
143 | panic("SIMD FP exception(19)\n"); |
143 | panic("SIMD FP exception(19)\n"); |
144 | } |
144 | } |
145 | 145 | ||
146 | void nm_fault(int n, istate_t *istate) |
146 | void nm_fault(int n, istate_t *istate) |
147 | { |
147 | { |
148 | #ifdef CONFIG_FPU_LAZY |
148 | #ifdef CONFIG_FPU_LAZY |
149 | scheduler_fpu_lazy_request(); |
149 | scheduler_fpu_lazy_request(); |
150 | #else |
150 | #else |
151 | fault_if_from_uspace(istate, "fpu fault"); |
151 | fault_if_from_uspace(istate, "fpu fault"); |
152 | panic("fpu fault"); |
152 | panic("fpu fault"); |
153 | #endif |
153 | #endif |
154 | } |
154 | } |
155 | 155 | ||
156 | void syscall(int n, istate_t *istate) |
156 | void syscall(int n, istate_t *istate) |
157 | { |
157 | { |
158 | panic("Obsolete syscall handler."); |
158 | panic("Obsolete syscall handler."); |
159 | } |
159 | } |
160 | 160 | ||
161 | void tlb_shootdown_ipi(int n, istate_t *istate) |
161 | void tlb_shootdown_ipi(int n, istate_t *istate) |
162 | { |
162 | { |
163 | trap_virtual_eoi(); |
163 | trap_virtual_eoi(); |
164 | tlb_shootdown_ipi_recv(); |
164 | tlb_shootdown_ipi_recv(); |
165 | } |
165 | } |
166 | 166 | ||
167 | void trap_virtual_enable_irqs(__u16 irqmask) |
167 | void trap_virtual_enable_irqs(__u16 irqmask) |
168 | { |
168 | { |
169 | if (enable_irqs_function) |
169 | if (enable_irqs_function) |
170 | enable_irqs_function(irqmask); |
170 | enable_irqs_function(irqmask); |
171 | else |
171 | else |
172 | panic("no enable_irqs_function\n"); |
172 | panic("no enable_irqs_function\n"); |
173 | } |
173 | } |
174 | 174 | ||
175 | void trap_virtual_disable_irqs(__u16 irqmask) |
175 | void trap_virtual_disable_irqs(__u16 irqmask) |
176 | { |
176 | { |
177 | if (disable_irqs_function) |
177 | if (disable_irqs_function) |
178 | disable_irqs_function(irqmask); |
178 | disable_irqs_function(irqmask); |
179 | else |
179 | else |
180 | panic("no disable_irqs_function\n"); |
180 | panic("no disable_irqs_function\n"); |
181 | } |
181 | } |
182 | 182 | ||
183 | void trap_virtual_eoi(void) |
183 | void trap_virtual_eoi(void) |
184 | { |
184 | { |
185 | if (eoi_function) |
185 | if (eoi_function) |
186 | eoi_function(); |
186 | eoi_function(); |
187 | else |
187 | else |
188 | panic("no eoi_function\n"); |
188 | panic("no eoi_function\n"); |
189 | 189 | ||
190 | } |
190 | } |
191 | 191 | ||
192 | static void ipc_int(int n, istate_t *istate) |
192 | static void ipc_int(int n, istate_t *istate) |
193 | { |
193 | { |
194 | ipc_irq_send_notif(n-IVT_IRQBASE); |
194 | ipc_irq_send_notif(n-IVT_IRQBASE); |
195 | trap_virtual_eoi(); |
195 | trap_virtual_eoi(); |
196 | } |
196 | } |
197 | 197 | ||
198 | 198 | ||
199 | /* Reregister irq to be IPC-ready */ |
199 | /* Reregister irq to be IPC-ready */ |
200 | void irq_ipc_bind_arch(__native irq) |
200 | void irq_ipc_bind_arch(__native irq) |
201 | { |
201 | { |
202 | if (irq == IRQ_CLK) |
202 | if (irq == IRQ_CLK) |
203 | return; |
203 | return; |
204 | trap_virtual_enable_irqs(1 << irq); |
- | |
205 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
204 | exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int); |
- | 205 | trap_virtual_enable_irqs(1 << irq); |
|
206 | } |
206 | } |
207 | 207 | ||
208 | /** @} |
208 | /** @} |
209 | */ |
209 | */ |
210 | 210 | ||
211 | 211 |