WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/drivers/i8259.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup ia32  
 * @{
 */
/** @file
 */
 
#include <arch/drivers/i8259.h>
#include <cpu.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch.h>
#include <print.h>
#include <interrupt.h>
 
/*
 * This is the PIC driver.
 * Programmable Interrupt Controller for UP systems.
 */
 
static void pic_spurious(int n, istate_t *istate);
 
void i8259_init(void)
{
    /* ICW1: this is ICW1, ICW4 to follow */
    outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
    /* ICW2: IRQ 0 maps to INT IRQBASE */
    outb(PIC_PIC0PORT2, IVT_IRQBASE);
 
    /* ICW3: pic1 using IRQ IRQ_PIC1 */
    outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
 
    /* ICW4: i8086 mode */
    outb(PIC_PIC0PORT2, 1);
 
    /* ICW1: ICW1, ICW4 to follow */
    outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
 
    /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
    outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
 
    /* ICW3: pic1 is known as IRQ_PIC1 */
    outb(PIC_PIC1PORT2, IRQ_PIC1);
 
    /* ICW4: i8086 mode */
    outb(PIC_PIC1PORT2, 1);
 
    /*
     * Register interrupt handler for the PIC spurious interrupt.
     */
    exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
 
    /*
     * Set the enable/disable IRQs handlers.
     * Set the End-of-Interrupt handler.
     */
    enable_irqs_function = pic_enable_irqs;
    disable_irqs_function = pic_disable_irqs;
    eoi_function = pic_eoi;
 
    pic_disable_irqs(0xffff);       /* disable all irq's */
    pic_enable_irqs(1<<IRQ_PIC1);       /* but enable pic1 */
}
 
void pic_enable_irqs(__u16 irqmask)
{
    __u8 x;
 
    if (irqmask & 0xff) {
        x = inb(PIC_PIC0PORT2);
        outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
    }
    if (irqmask >> 8) {
        x = inb(PIC_PIC1PORT2);
        outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
    }
}
 
void pic_disable_irqs(__u16 irqmask)
{
    __u8 x;
 
    if (irqmask & 0xff) {
        x = inb(PIC_PIC0PORT2);
        outb(PIC_PIC0PORT2, x | (irqmask & 0xff));
    }
    if (irqmask >> 8) {
        x = inb(PIC_PIC1PORT2);
        outb(PIC_PIC1PORT2, x | (irqmask >> 8));
    }
}
 
void pic_eoi(void)
{
    outb(0x20,0x20);
    outb(0xa0,0x20);
}
 
void pic_spurious(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
    printf("cpu%d: PIC spurious interrupt\n", CPU->id);
#endif
}
 
 /** @}
 */
 
 

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/src/drivers/i8259.c @ 1780 – Rev 1667 → 1702

Rev 1667		Rev 1702
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
-		29	/** @addtogroup ia32
-		30	* @{
-		31	*/
-		32	/** @file
-		33	*/
-		34
29	#include <arch/drivers/i8259.h>	35	#include <arch/drivers/i8259.h>
30	#include <cpu.h>	36	#include <cpu.h>
31	#include <arch/types.h>	37	#include <arch/types.h>
32	#include <arch/asm.h>	38	#include <arch/asm.h>
33	#include <arch.h>	39	#include <arch.h>
34	#include <print.h>	40	#include <print.h>
35	#include <interrupt.h>	41	#include <interrupt.h>
36		42
37	/*	43	/*
38	* This is the PIC driver.	44	* This is the PIC driver.
39	* Programmable Interrupt Controller for UP systems.	45	* Programmable Interrupt Controller for UP systems.
40	*/	46	*/
41		47
42	static void pic_spurious(int n, istate_t *istate);	48	static void pic_spurious(int n, istate_t *istate);
43		49
44	void i8259_init(void)	50	void i8259_init(void)
45	{	51	{
46	/* ICW1: this is ICW1, ICW4 to follow */	52	/* ICW1: this is ICW1, ICW4 to follow */
47	outb(PIC_PIC0PORT1, PIC_ICW1 \| PIC_NEEDICW4);	53	outb(PIC_PIC0PORT1, PIC_ICW1 \| PIC_NEEDICW4);
48		54
49	/* ICW2: IRQ 0 maps to INT IRQBASE */	55	/* ICW2: IRQ 0 maps to INT IRQBASE */
50	outb(PIC_PIC0PORT2, IVT_IRQBASE);	56	outb(PIC_PIC0PORT2, IVT_IRQBASE);
51		57
52	/* ICW3: pic1 using IRQ IRQ_PIC1 */	58	/* ICW3: pic1 using IRQ IRQ_PIC1 */
53	outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);	59	outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
54		60
55	/* ICW4: i8086 mode */	61	/* ICW4: i8086 mode */
56	outb(PIC_PIC0PORT2, 1);	62	outb(PIC_PIC0PORT2, 1);
57		63
58	/* ICW1: ICW1, ICW4 to follow */	64	/* ICW1: ICW1, ICW4 to follow */
59	outb(PIC_PIC1PORT1, PIC_ICW1 \| PIC_NEEDICW4);	65	outb(PIC_PIC1PORT1, PIC_ICW1 \| PIC_NEEDICW4);
60		66
61	/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */	67	/* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
62	outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);	68	outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
63		69
64	/* ICW3: pic1 is known as IRQ_PIC1 */	70	/* ICW3: pic1 is known as IRQ_PIC1 */
65	outb(PIC_PIC1PORT2, IRQ_PIC1);	71	outb(PIC_PIC1PORT2, IRQ_PIC1);
66		72
67	/* ICW4: i8086 mode */	73	/* ICW4: i8086 mode */
68	outb(PIC_PIC1PORT2, 1);	74	outb(PIC_PIC1PORT2, 1);
69		75
70	/*	76	/*
71	* Register interrupt handler for the PIC spurious interrupt.	77	* Register interrupt handler for the PIC spurious interrupt.
72	*/	78	*/
73	exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);	79	exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
74		80
75	/*	81	/*
76	* Set the enable/disable IRQs handlers.	82	* Set the enable/disable IRQs handlers.
77	* Set the End-of-Interrupt handler.	83	* Set the End-of-Interrupt handler.
78	*/	84	*/
79	enable_irqs_function = pic_enable_irqs;	85	enable_irqs_function = pic_enable_irqs;
80	disable_irqs_function = pic_disable_irqs;	86	disable_irqs_function = pic_disable_irqs;
81	eoi_function = pic_eoi;	87	eoi_function = pic_eoi;
82		88
83	pic_disable_irqs(0xffff); /* disable all irq's */	89	pic_disable_irqs(0xffff); /* disable all irq's */
84	pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */	90	pic_enable_irqs(1<<IRQ_PIC1); /* but enable pic1 */
85	}	91	}
86		92
87	void pic_enable_irqs(__u16 irqmask)	93	void pic_enable_irqs(__u16 irqmask)
88	{	94	{
89	__u8 x;	95	__u8 x;
90		96
91	if (irqmask & 0xff) {	97	if (irqmask & 0xff) {
92	x = inb(PIC_PIC0PORT2);	98	x = inb(PIC_PIC0PORT2);
93	outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));	99	outb(PIC_PIC0PORT2, x & (~(irqmask & 0xff)));
94	}	100	}
95	if (irqmask >> 8) {	101	if (irqmask >> 8) {
96	x = inb(PIC_PIC1PORT2);	102	x = inb(PIC_PIC1PORT2);
97	outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));	103	outb(PIC_PIC1PORT2, x & (~(irqmask >> 8)));
98	}	104	}
99	}	105	}
100		106
101	void pic_disable_irqs(__u16 irqmask)	107	void pic_disable_irqs(__u16 irqmask)
102	{	108	{
103	__u8 x;	109	__u8 x;
104		110
105	if (irqmask & 0xff) {	111	if (irqmask & 0xff) {
106	x = inb(PIC_PIC0PORT2);	112	x = inb(PIC_PIC0PORT2);
107	outb(PIC_PIC0PORT2, x \| (irqmask & 0xff));	113	outb(PIC_PIC0PORT2, x \| (irqmask & 0xff));
108	}	114	}
109	if (irqmask >> 8) {	115	if (irqmask >> 8) {
110	x = inb(PIC_PIC1PORT2);	116	x = inb(PIC_PIC1PORT2);
111	outb(PIC_PIC1PORT2, x \| (irqmask >> 8));	117	outb(PIC_PIC1PORT2, x \| (irqmask >> 8));
112	}	118	}
113	}	119	}
114		120
115	void pic_eoi(void)	121	void pic_eoi(void)
116	{	122	{
117	outb(0x20,0x20);	123	outb(0x20,0x20);
118	outb(0xa0,0x20);	124	outb(0xa0,0x20);
119	}	125	}
120		126
121	void pic_spurious(int n, istate_t *istate)	127	void pic_spurious(int n, istate_t *istate)
122	{	128	{
123	#ifdef CONFIG_DEBUG	129	#ifdef CONFIG_DEBUG
124	printf("cpu%d: PIC spurious interrupt\n", CPU->id);	130	printf("cpu%d: PIC spurious interrupt\n", CPU->id);
125	#endif	131	#endif
126	}	132	}
-		133
-		134	/** @}
-		135	*/
-		136
127		137