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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
- | 29 | /** @addtogroup ia32 |
|
- | 30 | * @{ |
|
- | 31 | */ |
|
- | 32 | /** @file |
|
- | 33 | */ |
|
- | 34 | ||
29 | #include <arch/types.h> |
35 | #include <arch/types.h> |
30 | #include <time/clock.h> |
36 | #include <time/clock.h> |
31 | #include <time/delay.h> |
37 | #include <time/delay.h> |
32 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
33 | #include <arch/drivers/i8259.h> |
39 | #include <arch/drivers/i8259.h> |
34 | #include <arch/drivers/i8254.h> |
40 | #include <arch/drivers/i8254.h> |
35 | #include <cpu.h> |
41 | #include <cpu.h> |
36 | #include <config.h> |
42 | #include <config.h> |
37 | #include <arch/pm.h> |
43 | #include <arch/pm.h> |
38 | #include <arch/asm.h> |
44 | #include <arch/asm.h> |
39 | #include <arch/cpuid.h> |
45 | #include <arch/cpuid.h> |
40 | #include <arch.h> |
46 | #include <arch.h> |
41 | #include <time/delay.h> |
47 | #include <time/delay.h> |
42 | #include <interrupt.h> |
48 | #include <interrupt.h> |
43 | 49 | ||
44 | /* |
50 | /* |
45 | * i8254 chip driver. |
51 | * i8254 chip driver. |
46 | * Low level time functions. |
52 | * Low level time functions. |
47 | */ |
53 | */ |
48 | 54 | ||
49 | #define CLK_PORT1 0x40 |
55 | #define CLK_PORT1 0x40 |
50 | #define CLK_PORT4 0x43 |
56 | #define CLK_PORT4 0x43 |
51 | 57 | ||
52 | 58 | ||
53 | #define CLK_CONST 1193180 |
59 | #define CLK_CONST 1193180 |
54 | #define MAGIC_NUMBER 1194 |
60 | #define MAGIC_NUMBER 1194 |
55 | 61 | ||
56 | static void i8254_interrupt(int n, istate_t *istate); |
62 | static void i8254_interrupt(int n, istate_t *istate); |
57 | 63 | ||
58 | void i8254_init(void) |
64 | void i8254_init(void) |
59 | { |
65 | { |
60 | i8254_normal_operation(); |
66 | i8254_normal_operation(); |
61 | } |
67 | } |
62 | 68 | ||
63 | void i8254_normal_operation(void) |
69 | void i8254_normal_operation(void) |
64 | { |
70 | { |
65 | outb(CLK_PORT4, 0x36); |
71 | outb(CLK_PORT4, 0x36); |
66 | pic_disable_irqs(1<<IRQ_CLK); |
72 | pic_disable_irqs(1<<IRQ_CLK); |
67 | outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf); |
73 | outb(CLK_PORT1, (CLK_CONST/HZ) & 0xf); |
68 | outb(CLK_PORT1, (CLK_CONST/HZ) >> 8); |
74 | outb(CLK_PORT1, (CLK_CONST/HZ) >> 8); |
69 | pic_enable_irqs(1<<IRQ_CLK); |
75 | pic_enable_irqs(1<<IRQ_CLK); |
70 | exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt); |
76 | exc_register(VECTOR_CLK, "i8254_clock", (iroutine) i8254_interrupt); |
71 | } |
77 | } |
72 | 78 | ||
73 | #define LOOPS 150000 |
79 | #define LOOPS 150000 |
74 | #define SHIFT 11 |
80 | #define SHIFT 11 |
75 | void i8254_calibrate_delay_loop(void) |
81 | void i8254_calibrate_delay_loop(void) |
76 | { |
82 | { |
77 | __u64 clk1, clk2; |
83 | __u64 clk1, clk2; |
78 | __u32 t1, t2, o1, o2; |
84 | __u32 t1, t2, o1, o2; |
79 | __u8 not_ok; |
85 | __u8 not_ok; |
80 | 86 | ||
81 | 87 | ||
82 | /* |
88 | /* |
83 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
89 | * One-shot timer. Count-down from 0xffff at 1193180Hz |
84 | * MAGIC_NUMBER is the magic value for 1ms. |
90 | * MAGIC_NUMBER is the magic value for 1ms. |
85 | */ |
91 | */ |
86 | outb(CLK_PORT4, 0x30); |
92 | outb(CLK_PORT4, 0x30); |
87 | outb(CLK_PORT1, 0xff); |
93 | outb(CLK_PORT1, 0xff); |
88 | outb(CLK_PORT1, 0xff); |
94 | outb(CLK_PORT1, 0xff); |
89 | 95 | ||
90 | do { |
96 | do { |
91 | /* will read both status and count */ |
97 | /* will read both status and count */ |
92 | outb(CLK_PORT4, 0xc2); |
98 | outb(CLK_PORT4, 0xc2); |
93 | not_ok = (inb(CLK_PORT1)>>6)&1; |
99 | not_ok = (inb(CLK_PORT1)>>6)&1; |
94 | t1 = inb(CLK_PORT1); |
100 | t1 = inb(CLK_PORT1); |
95 | t1 |= inb(CLK_PORT1) << 8; |
101 | t1 |= inb(CLK_PORT1) << 8; |
96 | } while (not_ok); |
102 | } while (not_ok); |
97 | 103 | ||
98 | asm_delay_loop(LOOPS); |
104 | asm_delay_loop(LOOPS); |
99 | 105 | ||
100 | outb(CLK_PORT4, 0xd2); |
106 | outb(CLK_PORT4, 0xd2); |
101 | t2 = inb(CLK_PORT1); |
107 | t2 = inb(CLK_PORT1); |
102 | t2 |= inb(CLK_PORT1) << 8; |
108 | t2 |= inb(CLK_PORT1) << 8; |
103 | 109 | ||
104 | /* |
110 | /* |
105 | * We want to determine the overhead of the calibrating mechanism. |
111 | * We want to determine the overhead of the calibrating mechanism. |
106 | */ |
112 | */ |
107 | outb(CLK_PORT4, 0xd2); |
113 | outb(CLK_PORT4, 0xd2); |
108 | o1 = inb(CLK_PORT1); |
114 | o1 = inb(CLK_PORT1); |
109 | o1 |= inb(CLK_PORT1) << 8; |
115 | o1 |= inb(CLK_PORT1) << 8; |
110 | 116 | ||
111 | asm_fake_loop(LOOPS); |
117 | asm_fake_loop(LOOPS); |
112 | 118 | ||
113 | outb(CLK_PORT4, 0xd2); |
119 | outb(CLK_PORT4, 0xd2); |
114 | o2 = inb(CLK_PORT1); |
120 | o2 = inb(CLK_PORT1); |
115 | o2 |= inb(CLK_PORT1) << 8; |
121 | o2 |= inb(CLK_PORT1) << 8; |
116 | 122 | ||
117 | CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
123 | CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) + (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0); |
118 | 124 | ||
119 | clk1 = rdtsc(); |
125 | clk1 = rdtsc(); |
120 | delay(1<<SHIFT); |
126 | delay(1<<SHIFT); |
121 | clk2 = rdtsc(); |
127 | clk2 = rdtsc(); |
122 | 128 | ||
123 | CPU->frequency_mhz = (clk2-clk1)>>SHIFT; |
129 | CPU->frequency_mhz = (clk2-clk1)>>SHIFT; |
124 | 130 | ||
125 | return; |
131 | return; |
126 | } |
132 | } |
127 | 133 | ||
128 | void i8254_interrupt(int n, istate_t *istate) |
134 | void i8254_interrupt(int n, istate_t *istate) |
129 | { |
135 | { |
130 | trap_virtual_eoi(); |
136 | trap_virtual_eoi(); |
131 | clock(); |
137 | clock(); |
132 | } |
138 | } |
- | 139 | ||
- | 140 | /** @} |
|
- | 141 | */ |
|
- | 142 | ||
133 | 143 |