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/*
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/*
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 * Copyright (C) 2006 Jakub Jermar
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 * Copyright (C) 2006 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#include <ddi/ddi.h>
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#include <ddi/ddi.h>
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#include <arch/ddi/ddi.h>
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#include <arch/ddi/ddi.h>
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#include <proc/task.h>
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#include <proc/task.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <typedefs.h>
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#include <typedefs.h>
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#include <adt/bitmap.h>
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#include <adt/bitmap.h>
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#include <mm/slab.h>
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#include <mm/slab.h>
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#include <arch/pm.h>
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#include <arch/pm.h>
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#include <errno.h>
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#include <errno.h>
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#include <arch/cpu.h>
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#include <arch/cpu.h>
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#include <cpu.h>
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#include <cpu.h>
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#include <arch.h>
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#include <arch.h>
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#include <align.h>
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#include <align.h>
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/** Enable I/O space range for task.
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/** Enable I/O space range for task.
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 *
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 *
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 * Interrupts are disabled and task is locked.
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 * Interrupts are disabled and task is locked.
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 *
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 *
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 * @param task Task.
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 * @param task Task.
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 * @param ioaddr Startign I/O space address.
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 * @param ioaddr Startign I/O space address.
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 * @param size Size of the enabled I/O range.
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 * @param size Size of the enabled I/O range.
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 *
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 *
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 * @return 0 on success or an error code from errno.h.
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 * @return 0 on success or an error code from errno.h.
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 */
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 */
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int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
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int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
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{
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{
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    count_t bits;
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    count_t bits;
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    bits = ioaddr + size;
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    bits = ioaddr + size;
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    if (bits > IO_PORTS)
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    if (bits > IO_PORTS)
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        return ENOENT;
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        return ENOENT;
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    if (task->arch.iomap.bits < bits) {
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    if (task->arch.iomap.bits < bits) {
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        bitmap_t oldiomap;
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        bitmap_t oldiomap;
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        __u8 *newmap;
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        __u8 *newmap;
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        /*
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        /*
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         * The I/O permission bitmap is too small and needs to be grown.
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         * The I/O permission bitmap is too small and needs to be grown.
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         */
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         */
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        newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
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        newmap = (__u8 *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
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        if (!newmap)
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        if (!newmap)
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            return ENOMEM;
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            return ENOMEM;
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        bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
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        bitmap_initialize(&oldiomap, task->arch.iomap.map, task->arch.iomap.bits);
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        bitmap_initialize(&task->arch.iomap, newmap, bits);
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        bitmap_initialize(&task->arch.iomap, newmap, bits);
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        /*
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        /*
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         * Mark the new range inaccessible.
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         * Mark the new range inaccessible.
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         */
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         */
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        bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
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        bitmap_set_range(&task->arch.iomap, oldiomap.bits, bits - oldiomap.bits);
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        /*
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        /*
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         * In case there really existed smaller iomap,
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         * In case there really existed smaller iomap,
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         * copy its contents and deallocate it.
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         * copy its contents and deallocate it.
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         */    
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         */    
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        if (oldiomap.bits) {
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        if (oldiomap.bits) {
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            bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
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            bitmap_copy(&task->arch.iomap, &oldiomap, oldiomap.bits);
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            free(oldiomap.map);
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            free(oldiomap.map);
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        }
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        }
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    }
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    }
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    /*
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    /*
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     * Enable the range and we are done.
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     * Enable the range and we are done.
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     */
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     */
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    bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
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    bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
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    /*
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    /*
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     * Increment I/O Permission bitmap generation counter.
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     * Increment I/O Permission bitmap generation counter.
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     */
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     */
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    task->arch.iomapver++;
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    task->arch.iomapver++;
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    return 0;
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    return 0;
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}
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}
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/** Enable/disable interrupts for syscall
-
 
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 *
-
 
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 * @param enable If non-zero, interrupts are enabled, otherwise disabled
-
 
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 * @param flags EFLAGS flags register
-
 
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 */
-
 
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__native ddi_int_control_arch(__native enable, __native *flags)
-
 
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{
-
 
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    if (enable)
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        *flags |= EFLAGS_IF;
-
 
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    else
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        *flags &= ~EFLAGS_IF;
-
 
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    return 0;
-
 
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}
-
 
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-
 
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/** Install I/O Permission bitmap.
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/** Install I/O Permission bitmap.
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 *
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 *
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 * Current task's I/O permission bitmap, if any, is installed
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 * Current task's I/O permission bitmap, if any, is installed
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 * in the current CPU's TSS.
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 * in the current CPU's TSS.
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 *
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 *
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 * Interrupts must be disabled prior this call.
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 * Interrupts must be disabled prior this call.
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 */
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 */
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void io_perm_bitmap_install(void)
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void io_perm_bitmap_install(void)
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{
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{
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    count_t bits;
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    count_t bits;
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    ptr_16_32_t cpugdtr;
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    ptr_16_32_t cpugdtr;
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    descriptor_t *gdt_p;
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    descriptor_t *gdt_p;
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    count_t ver;
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    count_t ver;
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    /* First, copy the I/O Permission Bitmap. */
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    /* First, copy the I/O Permission Bitmap. */
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    spinlock_lock(&TASK->lock);
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    spinlock_lock(&TASK->lock);
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    ver = TASK->arch.iomapver;
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    ver = TASK->arch.iomapver;
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    if ((bits = TASK->arch.iomap.bits)) {
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    if ((bits = TASK->arch.iomap.bits)) {
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        bitmap_t iomap;
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        bitmap_t iomap;
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        ASSERT(TASK->arch.iomap.map);
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        ASSERT(TASK->arch.iomap.map);
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        bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
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        bitmap_initialize(&iomap, CPU->arch.tss->iomap, TSS_IOMAP_SIZE * 8);
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        bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
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        bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
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        /*
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        /*
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         * It is safe to set the trailing eight bits because of the extra
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         * It is safe to set the trailing eight bits because of the extra
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         * convenience byte in TSS_IOMAP_SIZE.
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         * convenience byte in TSS_IOMAP_SIZE.
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         */
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         */
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        bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
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        bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
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    }
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    }
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    spinlock_unlock(&TASK->lock);
133
    spinlock_unlock(&TASK->lock);
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134
 
149
    /*
135
    /*
150
     * Second, adjust TSS segment limit.
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     * Second, adjust TSS segment limit.
151
     * Take the extra ending byte with all bits set into account.
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     * Take the extra ending byte with all bits set into account.
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     */
138
     */
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    gdtr_store(&cpugdtr);
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    gdtr_store(&cpugdtr);
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    gdt_p = (descriptor_t *) cpugdtr.base;
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    gdt_p = (descriptor_t *) cpugdtr.base;
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    gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
141
    gdt_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
156
    gdtr_load(&cpugdtr);
142
    gdtr_load(&cpugdtr);
157
 
143
 
158
    /*
144
    /*
159
     * Before we load new TSS limit, the current TSS descriptor
145
     * Before we load new TSS limit, the current TSS descriptor
160
     * type must be changed to describe inactive TSS.
146
     * type must be changed to describe inactive TSS.
161
     */
147
     */
162
    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
148
    gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
163
    tr_load(selector(TSS_DES));
149
    tr_load(selector(TSS_DES));
164
   
150
   
165
    /*
151
    /*
166
     * Update the generation count so that faults caused by
152
     * Update the generation count so that faults caused by
167
     * early accesses can be serviced.
153
     * early accesses can be serviced.
168
     */
154
     */
169
    CPU->arch.iomapver_copy = ver;
155
    CPU->arch.iomapver_copy = ver;
170
}
156
}
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